spl.c 2.6 KB

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  1. /* Copyright 2013 Freescale Semiconductor, Inc.
  2. *
  3. * SPDX-License-Identifier: GPL-2.0+
  4. */
  5. #include <common.h>
  6. #include <console.h>
  7. #include <ns16550.h>
  8. #include <malloc.h>
  9. #include <mmc.h>
  10. #include <nand.h>
  11. #include <i2c.h>
  12. #include <fsl_esdhc.h>
  13. #include <spi_flash.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. phys_size_t get_effective_memsize(void)
  16. {
  17. return CONFIG_SYS_L2_SIZE;
  18. }
  19. void board_init_f(ulong bootflag)
  20. {
  21. u32 plat_ratio;
  22. ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  23. struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
  24. console_init_f();
  25. /* Clock configuration to access CPLD using IFC(GPCM) */
  26. setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
  27. #ifdef CONFIG_P1010RDB_PB
  28. setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
  29. #endif
  30. /* initialize selected port with appropriate baud rate */
  31. plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  32. plat_ratio >>= 1;
  33. gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
  34. NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  35. gd->bus_clk / 16 / CONFIG_BAUDRATE);
  36. #ifdef CONFIG_SPL_MMC_BOOT
  37. puts("\nSD boot...\n");
  38. #elif defined(CONFIG_SPL_SPI_BOOT)
  39. puts("\nSPI Flash boot...\n");
  40. #endif
  41. /* copy code to RAM and jump to it - this should not return */
  42. /* NOTE - code has to be copied out of NAND buffer before
  43. * other blocks can be read.
  44. */
  45. relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  46. }
  47. void board_init_r(gd_t *gd, ulong dest_addr)
  48. {
  49. /* Pointer is writable since we allocated a register for it */
  50. gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  51. bd_t *bd;
  52. memset(gd, 0, sizeof(gd_t));
  53. bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  54. memset(bd, 0, sizeof(bd_t));
  55. gd->bd = bd;
  56. bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
  57. bd->bi_memsize = CONFIG_SYS_L2_SIZE;
  58. probecpu();
  59. get_clocks();
  60. mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  61. CONFIG_SPL_RELOC_MALLOC_SIZE);
  62. gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  63. #ifndef CONFIG_SPL_NAND_BOOT
  64. env_init();
  65. #endif
  66. #ifdef CONFIG_SPL_MMC_BOOT
  67. mmc_initialize(bd);
  68. #endif
  69. /* relocate environment function pointers etc. */
  70. #ifdef CONFIG_SPL_NAND_BOOT
  71. nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  72. (uchar *)CONFIG_ENV_ADDR);
  73. gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
  74. gd->env_valid = 1;
  75. #else
  76. env_relocate();
  77. #endif
  78. i2c_init_all();
  79. gd->ram_size = initdram(0);
  80. #ifdef CONFIG_SPL_NAND_BOOT
  81. puts("\nTertiary program loader running in sram...");
  82. #else
  83. puts("\nSecond program loader running in sram...");
  84. #endif
  85. #ifdef CONFIG_SPL_MMC_BOOT
  86. mmc_boot();
  87. #elif defined(CONFIG_SPL_SPI_BOOT)
  88. spi_boot();
  89. #elif defined(CONFIG_SPL_NAND_BOOT)
  90. nand_boot();
  91. #endif
  92. }