sf_internal.h 6.2 KB

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  1. /*
  2. * SPI flash internal definitions
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef _SF_INTERNAL_H_
  10. #define _SF_INTERNAL_H_
  11. #include <linux/types.h>
  12. #include <linux/compiler.h>
  13. /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
  14. enum spi_dual_flash {
  15. SF_SINGLE_FLASH = 0,
  16. SF_DUAL_STACKED_FLASH = 1 << 0,
  17. SF_DUAL_PARALLEL_FLASH = 1 << 1,
  18. };
  19. /* Enum list - Full read commands */
  20. enum spi_read_cmds {
  21. ARRAY_SLOW = 1 << 0,
  22. ARRAY_FAST = 1 << 1,
  23. DUAL_OUTPUT_FAST = 1 << 2,
  24. DUAL_IO_FAST = 1 << 3,
  25. QUAD_OUTPUT_FAST = 1 << 4,
  26. QUAD_IO_FAST = 1 << 5,
  27. };
  28. /* Normal - Extended - Full command set */
  29. #define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
  30. #define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
  31. #define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
  32. /* sf param flags */
  33. enum {
  34. SECT_4K = 1 << 0,
  35. SECT_32K = 1 << 1,
  36. E_FSR = 1 << 2,
  37. SST_BP = 1 << 3,
  38. SST_WP = 1 << 4,
  39. WR_QPP = 1 << 5,
  40. };
  41. #define SST_WR (SST_BP | SST_WP)
  42. #define SPI_FLASH_3B_ADDR_LEN 3
  43. #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
  44. #define SPI_FLASH_16MB_BOUN 0x1000000
  45. /* CFI Manufacture ID's */
  46. #define SPI_FLASH_CFI_MFR_SPANSION 0x01
  47. #define SPI_FLASH_CFI_MFR_STMICRO 0x20
  48. #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
  49. #define SPI_FLASH_CFI_MFR_WINBOND 0xef
  50. /* Erase commands */
  51. #define CMD_ERASE_4K 0x20
  52. #define CMD_ERASE_32K 0x52
  53. #define CMD_ERASE_CHIP 0xc7
  54. #define CMD_ERASE_64K 0xd8
  55. /* Write commands */
  56. #define CMD_WRITE_STATUS 0x01
  57. #define CMD_PAGE_PROGRAM 0x02
  58. #define CMD_WRITE_DISABLE 0x04
  59. #define CMD_READ_STATUS 0x05
  60. #define CMD_QUAD_PAGE_PROGRAM 0x32
  61. #define CMD_READ_STATUS1 0x35
  62. #define CMD_WRITE_ENABLE 0x06
  63. #define CMD_READ_CONFIG 0x35
  64. #define CMD_FLAG_STATUS 0x70
  65. /* Read commands */
  66. #define CMD_READ_ARRAY_SLOW 0x03
  67. #define CMD_READ_ARRAY_FAST 0x0b
  68. #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
  69. #define CMD_READ_DUAL_IO_FAST 0xbb
  70. #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
  71. #define CMD_READ_QUAD_IO_FAST 0xeb
  72. #define CMD_READ_ID 0x9f
  73. /* Bank addr access commands */
  74. #ifdef CONFIG_SPI_FLASH_BAR
  75. # define CMD_BANKADDR_BRWR 0x17
  76. # define CMD_BANKADDR_BRRD 0x16
  77. # define CMD_EXTNADDR_WREAR 0xC5
  78. # define CMD_EXTNADDR_RDEAR 0xC8
  79. #endif
  80. /* Common status */
  81. #define STATUS_WIP (1 << 0)
  82. #define STATUS_QEB_WINSPAN (1 << 1)
  83. #define STATUS_QEB_MXIC (1 << 6)
  84. #define STATUS_PEC (1 << 7)
  85. /* Flash timeout values */
  86. #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
  87. #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
  88. #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
  89. /* SST specific */
  90. #ifdef CONFIG_SPI_FLASH_SST
  91. # define CMD_SST_BP 0x02 /* Byte Program */
  92. # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
  93. int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
  94. const void *buf);
  95. int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
  96. const void *buf);
  97. #endif
  98. /**
  99. * struct spi_flash_params - SPI/QSPI flash device params structure
  100. *
  101. * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
  102. * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
  103. * @ext_jedec: Device ext_jedec ID
  104. * @sector_size: Isn't necessarily a sector size from vendor,
  105. * the size listed here is what works with CMD_ERASE_64K
  106. * @nr_sectors: No.of sectors on this device
  107. * @e_rd_cmd: Enum list for read commands
  108. * @flags: Important param, for flash specific behaviour
  109. */
  110. struct spi_flash_params {
  111. const char *name;
  112. u32 jedec;
  113. u16 ext_jedec;
  114. u32 sector_size;
  115. u32 nr_sectors;
  116. u8 e_rd_cmd;
  117. u16 flags;
  118. };
  119. extern const struct spi_flash_params spi_flash_params_table[];
  120. /* Send a single-byte command to the device and read the response */
  121. int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
  122. /*
  123. * Send a multi-byte command to the device and read the response. Used
  124. * for flash array reads, etc.
  125. */
  126. int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
  127. size_t cmd_len, void *data, size_t data_len);
  128. /*
  129. * Send a multi-byte command to the device followed by (optional)
  130. * data. Used for programming the flash array, etc.
  131. */
  132. int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
  133. const void *data, size_t data_len);
  134. /* Flash erase(sectors) operation, support all possible erase commands */
  135. int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
  136. /* Read the status register */
  137. int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
  138. /* Program the status register */
  139. int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
  140. /* Read the config register */
  141. int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
  142. /* Program the config register */
  143. int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
  144. /* Enable writing on the SPI flash */
  145. static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
  146. {
  147. return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
  148. }
  149. /* Disable writing on the SPI flash */
  150. static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
  151. {
  152. return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
  153. }
  154. /*
  155. * Send the read status command to the device and wait for the wip
  156. * (write-in-progress) bit to clear itself.
  157. */
  158. int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
  159. /*
  160. * Used for spi_flash write operation
  161. * - SPI claim
  162. * - spi_flash_cmd_write_enable
  163. * - spi_flash_cmd_write
  164. * - spi_flash_cmd_wait_ready
  165. * - SPI release
  166. */
  167. int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
  168. size_t cmd_len, const void *buf, size_t buf_len);
  169. /*
  170. * Flash write operation, support all possible write commands.
  171. * Write the requested data out breaking it up into multiple write
  172. * commands as needed per the write size.
  173. */
  174. int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
  175. size_t len, const void *buf);
  176. /*
  177. * Same as spi_flash_cmd_read() except it also claims/releases the SPI
  178. * bus. Used as common part of the ->read() operation.
  179. */
  180. int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
  181. size_t cmd_len, void *data, size_t data_len);
  182. /* Flash read operation, support all possible read commands */
  183. int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
  184. size_t len, void *data);
  185. #endif /* _SF_INTERNAL_H_ */