tegra.h 973 B

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  1. /*
  2. * (C) Copyright 2013-2015
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef _TEGRA210_TEGRA_H_
  8. #define _TEGRA210_TEGRA_H_
  9. #define GICD_BASE 0x50041000 /* Generic Int Cntrlr Distrib */
  10. #define GICC_BASE 0x50042000 /* Generic Int Cntrlr CPU I/F */
  11. #define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */
  12. #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
  13. #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
  14. #define NV_PA_SDRAM_BASE 0x80000000
  15. #include <asm/arch-tegra/tegra.h>
  16. #define BCT_ODMDATA_OFFSET 1288 /* offset to ODMDATA word */
  17. #undef NVBOOTINFOTABLE_BCTSIZE
  18. #undef NVBOOTINFOTABLE_BCTPTR
  19. #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
  20. #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
  21. #define MAX_NUM_CPU 4
  22. #define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8)
  23. #define TEGRA_USB1_BASE 0x7D000000
  24. #endif /* _TEGRA210_TEGRA_H_ */