zynq-zc770-xm010.dts 1.3 KB

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  1. /*
  2. * Xilinx ZC770 XM010 board DTS
  3. *
  4. * Copyright (C) 2013 - 2015 Xilinx, Inc.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. /dts-v1/;
  9. #include "zynq-7000.dtsi"
  10. / {
  11. compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
  12. model = "Xilinx Zynq";
  13. aliases {
  14. ethernet0 = &gem0;
  15. i2c0 = &i2c0;
  16. serial0 = &uart1;
  17. spi0 = &qspi;
  18. spi1 = &spi1;
  19. };
  20. chosen {
  21. bootargs = "root=/dev/ram rw earlyprintk";
  22. stdout-path = "serial0:115200n8";
  23. };
  24. memory {
  25. device_type = "memory";
  26. reg = <0x0 0x40000000>;
  27. };
  28. usb_phy0: phy0 {
  29. compatible = "usb-nop-xceiv";
  30. #phy-cells = <0>;
  31. };
  32. };
  33. &spi1 {
  34. status = "okay";
  35. num-cs = <4>;
  36. is-decoded-cs = <0>;
  37. flash@0 {
  38. compatible = "sst25wf080";
  39. reg = <1>;
  40. spi-max-frequency = <1000000>;
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. partition@test {
  44. label = "spi-flash";
  45. reg = <0x0 0x100000>;
  46. };
  47. };
  48. };
  49. &qspi {
  50. status = "okay";
  51. };
  52. &can0 {
  53. status = "okay";
  54. };
  55. &gem0 {
  56. status = "okay";
  57. phy-mode = "rgmii-id";
  58. phy-handle = <&ethernet_phy>;
  59. ethernet_phy: ethernet-phy@7 {
  60. reg = <7>;
  61. };
  62. };
  63. &i2c0 {
  64. status = "okay";
  65. clock-frequency = <400000>;
  66. m24c02_eeprom@52 {
  67. compatible = "at,24c02";
  68. reg = <0x52>;
  69. };
  70. };
  71. &sdhci0 {
  72. status = "okay";
  73. };
  74. &uart1 {
  75. u-boot,dm-pre-reloc;
  76. status = "okay";
  77. };
  78. &usb0 {
  79. status = "okay";
  80. dr_mode = "host";
  81. usb-phy = <&usb_phy0>;
  82. };