tpm_tis_lpc.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. /*
  6. * The code in this file is based on the article "Writing a TPM Device Driver"
  7. * published on http://ptgmedia.pearsoncmg.com.
  8. *
  9. * One principal difference is that in the simplest config the other than 0
  10. * TPM localities do not get mapped by some devices (for instance, by Infineon
  11. * slb9635), so this driver provides access to locality 0 only.
  12. */
  13. #include <common.h>
  14. #include <dm.h>
  15. #include <mapmem.h>
  16. #include <tpm-v1.h>
  17. #include <asm/io.h>
  18. #define PREFIX "lpc_tpm: "
  19. enum i2c_chip_type {
  20. SLB9635,
  21. AT97SC3204,
  22. };
  23. static const char * const chip_name[] = {
  24. [SLB9635] = "Infineon SLB9635 TT 1.2",
  25. [AT97SC3204] = "Atmel AT97SC3204",
  26. };
  27. static const u32 chip_didvid[] = {
  28. [SLB9635] = 0xb15d1,
  29. [AT97SC3204] = 0x32041114,
  30. };
  31. struct tpm_locality {
  32. u32 access;
  33. u8 padding0[4];
  34. u32 int_enable;
  35. u8 vector;
  36. u8 padding1[3];
  37. u32 int_status;
  38. u32 int_capability;
  39. u32 tpm_status;
  40. u8 padding2[8];
  41. u8 data;
  42. u8 padding3[3803];
  43. u32 did_vid;
  44. u8 rid;
  45. u8 padding4[251];
  46. };
  47. struct tpm_tis_lpc_priv {
  48. struct tpm_locality *regs;
  49. };
  50. /*
  51. * This pointer refers to the TPM chip, 5 of its localities are mapped as an
  52. * array.
  53. */
  54. #define TPM_TOTAL_LOCALITIES 5
  55. /* Some registers' bit field definitions */
  56. #define TIS_STS_VALID (1 << 7) /* 0x80 */
  57. #define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
  58. #define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
  59. #define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
  60. #define TIS_STS_EXPECT (1 << 3) /* 0x08 */
  61. #define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
  62. #define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
  63. #define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
  64. #define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
  65. #define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
  66. #define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
  67. #define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
  68. #define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
  69. #define TIS_STS_BURST_COUNT_MASK (0xffff)
  70. #define TIS_STS_BURST_COUNT_SHIFT (8)
  71. /* 1 second is plenty for anything TPM does. */
  72. #define MAX_DELAY_US (1000 * 1000)
  73. /* Retrieve burst count value out of the status register contents. */
  74. static u16 burst_count(u32 status)
  75. {
  76. return (status >> TIS_STS_BURST_COUNT_SHIFT) &
  77. TIS_STS_BURST_COUNT_MASK;
  78. }
  79. /* TPM access wrappers to support tracing */
  80. static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
  81. {
  82. u8 ret = readb(ptr);
  83. debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
  84. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
  85. return ret;
  86. }
  87. static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
  88. {
  89. u32 ret = readl(ptr);
  90. debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
  91. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
  92. return ret;
  93. }
  94. static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
  95. {
  96. debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
  97. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
  98. writeb(value, ptr);
  99. }
  100. static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
  101. u32 *ptr)
  102. {
  103. debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
  104. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
  105. writel(value, ptr);
  106. }
  107. /*
  108. * tis_wait_reg()
  109. *
  110. * Wait for at least a second for a register to change its state to match the
  111. * expected state. Normally the transition happens within microseconds.
  112. *
  113. * @reg - pointer to the TPM register
  114. * @mask - bitmask for the bitfield(s) to watch
  115. * @expected - value the field(s) are supposed to be set to
  116. *
  117. * Returns the register contents in case the expected value was found in the
  118. * appropriate register bits, or -ETIMEDOUT on timeout.
  119. */
  120. static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
  121. u8 expected)
  122. {
  123. u32 time_us = MAX_DELAY_US;
  124. while (time_us > 0) {
  125. u32 value = tpm_read_word(priv, reg);
  126. if ((value & mask) == expected)
  127. return value;
  128. udelay(1); /* 1 us */
  129. time_us--;
  130. }
  131. return -ETIMEDOUT;
  132. }
  133. /*
  134. * Probe the TPM device and try determining its manufacturer/device name.
  135. *
  136. * Returns 0 on success, -ve on error
  137. */
  138. static int tpm_tis_lpc_probe(struct udevice *dev)
  139. {
  140. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  141. fdt_addr_t addr;
  142. u32 didvid;
  143. ulong chip_type = dev_get_driver_data(dev);
  144. addr = dev_read_addr(dev);
  145. if (addr == FDT_ADDR_T_NONE)
  146. return -EINVAL;
  147. priv->regs = map_sysmem(addr, 0);
  148. didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
  149. if (didvid != chip_didvid[chip_type]) {
  150. u32 vid, did;
  151. vid = didvid & 0xffff;
  152. did = (didvid >> 16) & 0xffff;
  153. debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
  154. return -ENODEV;
  155. }
  156. debug("Found TPM: %s\n", chip_name[chip_type]);
  157. return 0;
  158. }
  159. /*
  160. * tis_senddata()
  161. *
  162. * send the passed in data to the TPM device.
  163. *
  164. * @data - address of the data to send, byte by byte
  165. * @len - length of the data to send
  166. *
  167. * Returns 0 on success, -ve on error (in case the device does not accept
  168. * the entire command).
  169. */
  170. static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
  171. {
  172. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  173. struct tpm_locality *regs = priv->regs;
  174. u32 offset = 0;
  175. u16 burst = 0;
  176. u32 max_cycles = 0;
  177. u8 locality = 0;
  178. u32 value;
  179. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  180. TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
  181. if (value == -ETIMEDOUT) {
  182. printf("%s:%d - failed to get 'command_ready' status\n",
  183. __FILE__, __LINE__);
  184. return value;
  185. }
  186. burst = burst_count(value);
  187. while (1) {
  188. unsigned count;
  189. /* Wait till the device is ready to accept more data. */
  190. while (!burst) {
  191. if (max_cycles++ == MAX_DELAY_US) {
  192. printf("%s:%d failed to feed %zd bytes of %zd\n",
  193. __FILE__, __LINE__, len - offset, len);
  194. return -ETIMEDOUT;
  195. }
  196. udelay(1);
  197. burst = burst_count(tpm_read_word(priv,
  198. &regs[locality].tpm_status));
  199. }
  200. max_cycles = 0;
  201. /*
  202. * Calculate number of bytes the TPM is ready to accept in one
  203. * shot.
  204. *
  205. * We want to send the last byte outside of the loop (hence
  206. * the -1 below) to make sure that the 'expected' status bit
  207. * changes to zero exactly after the last byte is fed into the
  208. * FIFO.
  209. */
  210. count = min((size_t)burst, len - offset - 1);
  211. while (count--)
  212. tpm_write_byte(priv, data[offset++],
  213. &regs[locality].data);
  214. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  215. TIS_STS_VALID, TIS_STS_VALID);
  216. if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
  217. printf("%s:%d TPM command feed overflow\n",
  218. __FILE__, __LINE__);
  219. return value == -ETIMEDOUT ? value : -EIO;
  220. }
  221. burst = burst_count(value);
  222. if ((offset == (len - 1)) && burst) {
  223. /*
  224. * We need to be able to send the last byte to the
  225. * device, so burst size must be nonzero before we
  226. * break out.
  227. */
  228. break;
  229. }
  230. }
  231. /* Send the last byte. */
  232. tpm_write_byte(priv, data[offset++], &regs[locality].data);
  233. /*
  234. * Verify that TPM does not expect any more data as part of this
  235. * command.
  236. */
  237. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  238. TIS_STS_VALID, TIS_STS_VALID);
  239. if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
  240. printf("%s:%d unexpected TPM status 0x%x\n",
  241. __FILE__, __LINE__, value);
  242. return value == -ETIMEDOUT ? value : -EIO;
  243. }
  244. /* OK, sitting pretty, let's start the command execution. */
  245. tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
  246. return 0;
  247. }
  248. /*
  249. * tis_readresponse()
  250. *
  251. * read the TPM device response after a command was issued.
  252. *
  253. * @buffer - address where to read the response, byte by byte.
  254. * @len - pointer to the size of buffer
  255. *
  256. * On success stores the number of received bytes to len and returns 0. On
  257. * errors (misformatted TPM data or synchronization problems) returns
  258. * -ve value.
  259. */
  260. static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
  261. {
  262. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  263. struct tpm_locality *regs = priv->regs;
  264. u16 burst;
  265. u32 value;
  266. u32 offset = 0;
  267. u8 locality = 0;
  268. const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
  269. u32 expected_count = len;
  270. int max_cycles = 0;
  271. /* Wait for the TPM to process the command. */
  272. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  273. has_data, has_data);
  274. if (value == -ETIMEDOUT) {
  275. printf("%s:%d failed processing command\n",
  276. __FILE__, __LINE__);
  277. return value;
  278. }
  279. do {
  280. while ((burst = burst_count(value)) == 0) {
  281. if (max_cycles++ == MAX_DELAY_US) {
  282. printf("%s:%d TPM stuck on read\n",
  283. __FILE__, __LINE__);
  284. return -EIO;
  285. }
  286. udelay(1);
  287. value = tpm_read_word(priv, &regs[locality].tpm_status);
  288. }
  289. max_cycles = 0;
  290. while (burst-- && (offset < expected_count)) {
  291. buffer[offset++] = tpm_read_byte(priv,
  292. &regs[locality].data);
  293. if (offset == 6) {
  294. /*
  295. * We got the first six bytes of the reply,
  296. * let's figure out how many bytes to expect
  297. * total - it is stored as a 4 byte number in
  298. * network order, starting with offset 2 into
  299. * the body of the reply.
  300. */
  301. u32 real_length;
  302. memcpy(&real_length,
  303. buffer + 2,
  304. sizeof(real_length));
  305. expected_count = be32_to_cpu(real_length);
  306. if ((expected_count < offset) ||
  307. (expected_count > len)) {
  308. printf("%s:%d bad response size %d\n",
  309. __FILE__, __LINE__,
  310. expected_count);
  311. return -ENOSPC;
  312. }
  313. }
  314. }
  315. /* Wait for the next portion. */
  316. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  317. TIS_STS_VALID, TIS_STS_VALID);
  318. if (value == -ETIMEDOUT) {
  319. printf("%s:%d failed to read response\n",
  320. __FILE__, __LINE__);
  321. return value;
  322. }
  323. if (offset == expected_count)
  324. break; /* We got all we needed. */
  325. } while ((value & has_data) == has_data);
  326. /*
  327. * Make sure we indeed read all there was. The TIS_STS_VALID bit is
  328. * known to be set.
  329. */
  330. if (value & TIS_STS_DATA_AVAILABLE) {
  331. printf("%s:%d wrong receive status %x\n",
  332. __FILE__, __LINE__, value);
  333. return -EBADMSG;
  334. }
  335. /* Tell the TPM that we are done. */
  336. tpm_write_word(priv, TIS_STS_COMMAND_READY,
  337. &regs[locality].tpm_status);
  338. return offset;
  339. }
  340. static int tpm_tis_lpc_open(struct udevice *dev)
  341. {
  342. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  343. struct tpm_locality *regs = priv->regs;
  344. u8 locality = 0; /* we use locality zero for everything. */
  345. int ret;
  346. /* now request access to locality. */
  347. tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);
  348. /* did we get a lock? */
  349. ret = tis_wait_reg(priv, &regs[locality].access,
  350. TIS_ACCESS_ACTIVE_LOCALITY,
  351. TIS_ACCESS_ACTIVE_LOCALITY);
  352. if (ret == -ETIMEDOUT) {
  353. printf("%s:%d - failed to lock locality %d\n",
  354. __FILE__, __LINE__, locality);
  355. return ret;
  356. }
  357. tpm_write_word(priv, TIS_STS_COMMAND_READY,
  358. &regs[locality].tpm_status);
  359. return 0;
  360. }
  361. static int tpm_tis_lpc_close(struct udevice *dev)
  362. {
  363. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  364. struct tpm_locality *regs = priv->regs;
  365. u8 locality = 0;
  366. if (tpm_read_word(priv, &regs[locality].access) &
  367. TIS_ACCESS_ACTIVE_LOCALITY) {
  368. tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
  369. &regs[locality].access);
  370. if (tis_wait_reg(priv, &regs[locality].access,
  371. TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
  372. printf("%s:%d - failed to release locality %d\n",
  373. __FILE__, __LINE__, locality);
  374. return -ETIMEDOUT;
  375. }
  376. }
  377. return 0;
  378. }
  379. static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
  380. {
  381. ulong chip_type = dev_get_driver_data(dev);
  382. if (size < 50)
  383. return -ENOSPC;
  384. return snprintf(buf, size, "1.2 TPM (%s)",
  385. chip_name[chip_type]);
  386. }
  387. static const struct tpm_ops tpm_tis_lpc_ops = {
  388. .open = tpm_tis_lpc_open,
  389. .close = tpm_tis_lpc_close,
  390. .get_desc = tpm_tis_get_desc,
  391. .send = tis_senddata,
  392. .recv = tis_readresponse,
  393. };
  394. static const struct udevice_id tpm_tis_lpc_ids[] = {
  395. { .compatible = "infineon,slb9635lpc", .data = SLB9635 },
  396. { .compatible = "atmel,at97sc3204", .data = AT97SC3204 },
  397. { }
  398. };
  399. U_BOOT_DRIVER(tpm_tis_lpc) = {
  400. .name = "tpm_tis_lpc",
  401. .id = UCLASS_TPM,
  402. .of_match = tpm_tis_lpc_ids,
  403. .ops = &tpm_tis_lpc_ops,
  404. .probe = tpm_tis_lpc_probe,
  405. .priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
  406. };