mc.c 33 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421
  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <linux/bug.h>
  9. #include <asm/io.h>
  10. #include <libfdt.h>
  11. #include <net.h>
  12. #include <fdt_support.h>
  13. #include <fsl-mc/fsl_mc.h>
  14. #include <fsl-mc/fsl_mc_sys.h>
  15. #include <fsl-mc/fsl_mc_private.h>
  16. #include <fsl-mc/fsl_dpmng.h>
  17. #include <fsl-mc/fsl_dprc.h>
  18. #include <fsl-mc/fsl_dpio.h>
  19. #include <fsl-mc/fsl_dpni.h>
  20. #include <fsl-mc/fsl_qbman_portal.h>
  21. #include <fsl-mc/ldpaa_wriop.h>
  22. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  23. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  24. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  25. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  26. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  27. DECLARE_GLOBAL_DATA_PTR;
  28. static int mc_boot_status = -1;
  29. static int mc_dpl_applied = -1;
  30. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  31. static int mc_aiop_applied = -1;
  32. #endif
  33. struct fsl_mc_io *root_mc_io = NULL;
  34. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  35. uint16_t root_dprc_handle = 0;
  36. uint16_t dflt_dprc_handle = 0;
  37. int child_dprc_id;
  38. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  39. struct fsl_dpio_obj *dflt_dpio = NULL;
  40. struct fsl_dpni_obj *dflt_dpni = NULL;
  41. static u64 mc_lazy_dpl_addr;
  42. #ifdef DEBUG
  43. void dump_ram_words(const char *title, void *addr)
  44. {
  45. int i;
  46. uint32_t *words = addr;
  47. printf("Dumping beginning of %s (%p):\n", title, addr);
  48. for (i = 0; i < 16; i++)
  49. printf("%#x ", words[i]);
  50. printf("\n");
  51. }
  52. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  53. {
  54. printf("MC CCSR registers:\n"
  55. "reg_gcr1 %#x\n"
  56. "reg_gsr %#x\n"
  57. "reg_sicbalr %#x\n"
  58. "reg_sicbahr %#x\n"
  59. "reg_sicapr %#x\n"
  60. "reg_mcfbalr %#x\n"
  61. "reg_mcfbahr %#x\n"
  62. "reg_mcfapr %#x\n"
  63. "reg_psr %#x\n",
  64. mc_ccsr_regs->reg_gcr1,
  65. mc_ccsr_regs->reg_gsr,
  66. mc_ccsr_regs->reg_sicbalr,
  67. mc_ccsr_regs->reg_sicbahr,
  68. mc_ccsr_regs->reg_sicapr,
  69. mc_ccsr_regs->reg_mcfbalr,
  70. mc_ccsr_regs->reg_mcfbahr,
  71. mc_ccsr_regs->reg_mcfapr,
  72. mc_ccsr_regs->reg_psr);
  73. }
  74. #else
  75. #define dump_ram_words(title, addr)
  76. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  77. #endif /* DEBUG */
  78. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  79. /**
  80. * Copying MC firmware or DPL image to DDR
  81. */
  82. static int mc_copy_image(const char *title,
  83. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  84. {
  85. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  86. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  87. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  88. return 0;
  89. }
  90. /**
  91. * MC firmware FIT image parser checks if the image is in FIT
  92. * format, verifies integrity of the image and calculates
  93. * raw image address and size values.
  94. * Returns 0 on success and a negative errno on error.
  95. * task fail.
  96. **/
  97. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  98. const void **raw_image_addr,
  99. size_t *raw_image_size)
  100. {
  101. int format;
  102. void *fit_hdr;
  103. int node_offset;
  104. const void *data;
  105. size_t size;
  106. const char *uname = "firmware";
  107. fit_hdr = (void *)mc_fw_addr;
  108. /* Check if Image is in FIT format */
  109. format = genimg_get_format(fit_hdr);
  110. if (format != IMAGE_FORMAT_FIT) {
  111. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  112. return -EINVAL;
  113. }
  114. if (!fit_check_format(fit_hdr)) {
  115. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  116. return -EINVAL;
  117. }
  118. node_offset = fit_image_get_node(fit_hdr, uname);
  119. if (node_offset < 0) {
  120. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  121. return -ENOENT;
  122. }
  123. /* Verify MC firmware image */
  124. if (!(fit_image_verify(fit_hdr, node_offset))) {
  125. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  126. return -EINVAL;
  127. }
  128. /* Get address and size of raw image */
  129. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  130. *raw_image_addr = data;
  131. *raw_image_size = size;
  132. return 0;
  133. }
  134. #endif
  135. /*
  136. * Calculates the values to be used to specify the address range
  137. * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
  138. * It returns the highest 512MB-aligned address within the given
  139. * address range, in '*aligned_base_addr', and the number of 256 MiB
  140. * blocks in it, in 'num_256mb_blocks'.
  141. */
  142. static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
  143. size_t mc_ram_size,
  144. u64 *aligned_base_addr,
  145. u8 *num_256mb_blocks)
  146. {
  147. u64 addr;
  148. u16 num_blocks;
  149. if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
  150. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  151. mc_ram_size);
  152. return -EINVAL;
  153. }
  154. num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  155. if (num_blocks < 1 || num_blocks > 0xff) {
  156. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  157. mc_ram_size);
  158. return -EINVAL;
  159. }
  160. addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
  161. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  162. if (addr < mc_private_ram_start_addr) {
  163. printf("fsl-mc: ERROR: bad start address %#llx\n",
  164. mc_private_ram_start_addr);
  165. return -EFAULT;
  166. }
  167. *aligned_base_addr = addr;
  168. *num_256mb_blocks = num_blocks;
  169. return 0;
  170. }
  171. static int mc_fixup_dpc_mac_addr(void *blob, int noff, int dpmac_id,
  172. struct eth_device *eth_dev)
  173. {
  174. int nodeoffset, err = 0;
  175. char mac_name[10];
  176. const char link_type_mode[] = "FIXED_LINK";
  177. unsigned char env_enetaddr[6];
  178. sprintf(mac_name, "mac@%d", dpmac_id);
  179. /* node not found - create it */
  180. nodeoffset = fdt_subnode_offset(blob, noff, (const char *) mac_name);
  181. if (nodeoffset < 0) {
  182. err = fdt_increase_size(blob, 200);
  183. if (err) {
  184. printf("fdt_increase_size: err=%s\n",
  185. fdt_strerror(err));
  186. return err;
  187. }
  188. nodeoffset = fdt_add_subnode(blob, noff, mac_name);
  189. /* add default property of fixed link */
  190. err = fdt_appendprop_string(blob, nodeoffset,
  191. "link_type", link_type_mode);
  192. if (err) {
  193. printf("fdt_appendprop_string: err=%s\n",
  194. fdt_strerror(err));
  195. return err;
  196. }
  197. }
  198. /* port_mac_address property present in DPC */
  199. if (fdt_get_property(blob, nodeoffset, "port_mac_address", NULL)) {
  200. /* MAC addr randomly assigned - leave the one in DPC */
  201. eth_getenv_enetaddr_by_index("eth", eth_dev->index,
  202. env_enetaddr);
  203. if (is_zero_ethaddr(env_enetaddr))
  204. return err;
  205. /* replace DPC MAC address with u-boot env one */
  206. err = fdt_setprop(blob, nodeoffset, "port_mac_address",
  207. eth_dev->enetaddr, 6);
  208. if (err) {
  209. printf("fdt_setprop mac: err=%s\n", fdt_strerror(err));
  210. return err;
  211. }
  212. return 0;
  213. }
  214. /* append port_mac_address property to mac node in DPC */
  215. err = fdt_increase_size(blob, 80);
  216. if (err) {
  217. printf("fdt_increase_size: err=%s\n", fdt_strerror(err));
  218. return err;
  219. }
  220. err = fdt_appendprop(blob, nodeoffset,
  221. "port_mac_address", eth_dev->enetaddr, 6);
  222. if (err) {
  223. printf("fdt_appendprop: err=%s\n", fdt_strerror(err));
  224. return err;
  225. }
  226. return err;
  227. }
  228. static int mc_fixup_dpc(u64 dpc_addr)
  229. {
  230. void *blob = (void *)dpc_addr;
  231. int nodeoffset, err = 0;
  232. char ethname[10];
  233. struct eth_device *eth_dev;
  234. int i;
  235. /* delete any existing ICID pools */
  236. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  237. if (fdt_del_node(blob, nodeoffset) < 0)
  238. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  239. /* add a new pool */
  240. nodeoffset = fdt_path_offset(blob, "/resources");
  241. if (nodeoffset < 0) {
  242. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  243. return -EINVAL;
  244. }
  245. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  246. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  247. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  248. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  249. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  250. "num",
  251. FSL_DPAA2_STREAM_ID_END -
  252. FSL_DPAA2_STREAM_ID_START + 1, 1);
  253. /* fixup MAC addresses for dpmac ports */
  254. nodeoffset = fdt_path_offset(blob, "/board_info/ports");
  255. if (nodeoffset < 0)
  256. goto out;
  257. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
  258. /* port not enabled */
  259. if ((wriop_is_enabled_dpmac(i) != 1) ||
  260. (wriop_get_phy_address(i) == -1))
  261. continue;
  262. sprintf(ethname, "DPMAC%d@%s", i,
  263. phy_interface_strings[wriop_get_enet_if(i)]);
  264. eth_dev = eth_get_dev_by_name(ethname);
  265. if (eth_dev == NULL)
  266. continue;
  267. err = mc_fixup_dpc_mac_addr(blob, nodeoffset, i, eth_dev);
  268. if (err) {
  269. printf("mc_fixup_dpc_mac_addr failed: err=%s\n",
  270. fdt_strerror(err));
  271. goto out;
  272. }
  273. }
  274. out:
  275. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  276. return err;
  277. }
  278. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  279. {
  280. u64 mc_dpc_offset;
  281. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  282. int error;
  283. void *dpc_fdt_hdr;
  284. int dpc_size;
  285. #endif
  286. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  287. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  288. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  289. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  290. #else
  291. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  292. #endif
  293. /*
  294. * Load the MC DPC blob in the MC private DRAM block:
  295. */
  296. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  297. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  298. #else
  299. /*
  300. * Get address and size of the DPC blob stored in flash:
  301. */
  302. dpc_fdt_hdr = (void *)mc_dpc_addr;
  303. error = fdt_check_header(dpc_fdt_hdr);
  304. if (error != 0) {
  305. /*
  306. * Don't return with error here, since the MC firmware can
  307. * still boot without a DPC
  308. */
  309. printf("\nfsl-mc: WARNING: No DPC image found");
  310. return 0;
  311. }
  312. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  313. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  314. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  315. dpc_size);
  316. return -EINVAL;
  317. }
  318. mc_copy_image("MC DPC blob",
  319. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  320. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  321. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  322. return -EINVAL;
  323. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  324. return 0;
  325. }
  326. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  327. {
  328. u64 mc_dpl_offset;
  329. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  330. int error;
  331. void *dpl_fdt_hdr;
  332. int dpl_size;
  333. #endif
  334. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  335. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  336. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  337. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  338. #else
  339. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  340. #endif
  341. /*
  342. * Load the MC DPL blob in the MC private DRAM block:
  343. */
  344. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  345. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  346. #else
  347. /*
  348. * Get address and size of the DPL blob stored in flash:
  349. */
  350. dpl_fdt_hdr = (void *)mc_dpl_addr;
  351. error = fdt_check_header(dpl_fdt_hdr);
  352. if (error != 0) {
  353. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  354. return error;
  355. }
  356. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  357. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  358. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  359. dpl_size);
  360. return -EINVAL;
  361. }
  362. mc_copy_image("MC DPL blob",
  363. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  364. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  365. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  366. return 0;
  367. }
  368. /**
  369. * Return the MC boot timeout value in milliseconds
  370. */
  371. static unsigned long get_mc_boot_timeout_ms(void)
  372. {
  373. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  374. char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
  375. if (timeout_ms_env_var) {
  376. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  377. if (timeout_ms == 0) {
  378. printf("fsl-mc: WARNING: Invalid value for \'"
  379. MC_BOOT_TIMEOUT_ENV_VAR
  380. "\' environment variable: %lu\n",
  381. timeout_ms);
  382. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  383. }
  384. }
  385. return timeout_ms;
  386. }
  387. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  388. __weak bool soc_has_aiop(void)
  389. {
  390. return false;
  391. }
  392. static int load_mc_aiop_img(u64 aiop_fw_addr)
  393. {
  394. u64 mc_ram_addr = mc_get_dram_addr();
  395. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  396. void *aiop_img;
  397. #endif
  398. /* Check if AIOP is available */
  399. if (!soc_has_aiop())
  400. return -ENODEV;
  401. /*
  402. * Load the MC AIOP image in the MC private DRAM block:
  403. */
  404. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  405. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  406. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  407. #else
  408. aiop_img = (void *)aiop_fw_addr;
  409. mc_copy_image("MC AIOP image",
  410. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  411. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  412. #endif
  413. mc_aiop_applied = 0;
  414. return 0;
  415. }
  416. #endif
  417. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  418. {
  419. u32 reg_gsr;
  420. u32 mc_fw_boot_status;
  421. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  422. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  423. dmb();
  424. assert(timeout_ms > 0);
  425. for (;;) {
  426. udelay(1000); /* throttle polling */
  427. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  428. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  429. if (mc_fw_boot_status & 0x1)
  430. break;
  431. timeout_ms--;
  432. if (timeout_ms == 0)
  433. break;
  434. }
  435. if (timeout_ms == 0) {
  436. printf("ERROR: timeout\n");
  437. /* TODO: Get an error status from an MC CCSR register */
  438. return -ETIMEDOUT;
  439. }
  440. if (mc_fw_boot_status != 0x1) {
  441. /*
  442. * TODO: Identify critical errors from the GSR register's FS
  443. * field and for those errors, set error to -ENODEV or other
  444. * appropriate errno, so that the status property is set to
  445. * failure in the fsl,dprc device tree node.
  446. */
  447. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  448. reg_gsr);
  449. } else {
  450. printf("SUCCESS\n");
  451. }
  452. *final_reg_gsr = reg_gsr;
  453. return 0;
  454. }
  455. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  456. {
  457. int error = 0;
  458. int portal_id = 0;
  459. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  460. u64 mc_ram_addr = mc_get_dram_addr();
  461. u32 reg_gsr;
  462. u32 reg_mcfbalr;
  463. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  464. const void *raw_image_addr;
  465. size_t raw_image_size = 0;
  466. #endif
  467. struct mc_version mc_ver_info;
  468. u64 mc_ram_aligned_base_addr;
  469. u8 mc_ram_num_256mb_blocks;
  470. size_t mc_ram_size = mc_get_dram_block_size();
  471. error = calculate_mc_private_ram_params(mc_ram_addr,
  472. mc_ram_size,
  473. &mc_ram_aligned_base_addr,
  474. &mc_ram_num_256mb_blocks);
  475. if (error != 0)
  476. goto out;
  477. /*
  478. * Management Complex cores should be held at reset out of POR.
  479. * U-Boot should be the first software to touch MC. To be safe,
  480. * we reset all cores again by setting GCR1 to 0. It doesn't do
  481. * anything if they are held at reset. After we setup the firmware
  482. * we kick off MC by deasserting the reset bit for core 0, and
  483. * deasserting the reset bits for Command Portal Managers.
  484. * The stop bits are not touched here. They are used to stop the
  485. * cores when they are active. Setting stop bits doesn't stop the
  486. * cores from fetching instructions when they are released from
  487. * reset.
  488. */
  489. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  490. dmb();
  491. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  492. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  493. #else
  494. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  495. &raw_image_size);
  496. if (error != 0)
  497. goto out;
  498. /*
  499. * Load the MC FW at the beginning of the MC private DRAM block:
  500. */
  501. mc_copy_image("MC Firmware",
  502. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  503. #endif
  504. dump_ram_words("firmware", (void *)mc_ram_addr);
  505. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  506. if (error != 0)
  507. goto out;
  508. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  509. dump_mc_ccsr_regs(mc_ccsr_regs);
  510. /*
  511. * Tell MC what is the address range of the DRAM block assigned to it:
  512. */
  513. reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
  514. (mc_ram_num_256mb_blocks - 1);
  515. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  516. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  517. (u32)(mc_ram_aligned_base_addr >> 32));
  518. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  519. /*
  520. * Tell the MC that we want delayed DPL deployment.
  521. */
  522. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  523. printf("\nfsl-mc: Booting Management Complex ... ");
  524. /*
  525. * Deassert reset and release MC core 0 to run
  526. */
  527. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  528. error = wait_for_mc(true, &reg_gsr);
  529. if (error != 0)
  530. goto out;
  531. /*
  532. * TODO: need to obtain the portal_id for the root container from the
  533. * DPL
  534. */
  535. portal_id = 0;
  536. /*
  537. * Initialize the global default MC portal
  538. * And check that the MC firmware is responding portal commands:
  539. */
  540. root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  541. if (!root_mc_io) {
  542. printf(" No memory: malloc() failed\n");
  543. return -ENOMEM;
  544. }
  545. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  546. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  547. portal_id, root_mc_io->mmio_regs);
  548. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  549. if (error != 0) {
  550. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  551. error);
  552. goto out;
  553. }
  554. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  555. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  556. reg_gsr & GSR_FS_MASK);
  557. out:
  558. if (error != 0)
  559. mc_boot_status = error;
  560. else
  561. mc_boot_status = 0;
  562. return error;
  563. }
  564. int mc_apply_dpl(u64 mc_dpl_addr)
  565. {
  566. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  567. int error = 0;
  568. u32 reg_gsr;
  569. u64 mc_ram_addr = mc_get_dram_addr();
  570. size_t mc_ram_size = mc_get_dram_block_size();
  571. if (!mc_dpl_addr)
  572. return -1;
  573. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  574. if (error != 0)
  575. return error;
  576. /*
  577. * Tell the MC to deploy the DPL:
  578. */
  579. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  580. printf("fsl-mc: Deploying data path layout ... ");
  581. error = wait_for_mc(false, &reg_gsr);
  582. if (!error)
  583. mc_dpl_applied = 0;
  584. return error;
  585. }
  586. int get_mc_boot_status(void)
  587. {
  588. return mc_boot_status;
  589. }
  590. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  591. int get_aiop_apply_status(void)
  592. {
  593. return mc_aiop_applied;
  594. }
  595. #endif
  596. int get_dpl_apply_status(void)
  597. {
  598. return mc_dpl_applied;
  599. }
  600. /**
  601. * Return the MC address of private DRAM block.
  602. */
  603. u64 mc_get_dram_addr(void)
  604. {
  605. u64 mc_ram_addr;
  606. /*
  607. * The MC private DRAM block was already carved at the end of DRAM
  608. * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
  609. */
  610. if (gd->bd->bi_dram[1].start) {
  611. mc_ram_addr =
  612. gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
  613. } else {
  614. mc_ram_addr =
  615. gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  616. }
  617. return mc_ram_addr;
  618. }
  619. /**
  620. * Return the actual size of the MC private DRAM block.
  621. */
  622. unsigned long mc_get_dram_block_size(void)
  623. {
  624. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  625. char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
  626. if (dram_block_size_env_var) {
  627. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  628. 10);
  629. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  630. printf("fsl-mc: WARNING: Invalid value for \'"
  631. MC_MEM_SIZE_ENV_VAR
  632. "\' environment variable: %lu\n",
  633. dram_block_size);
  634. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  635. }
  636. }
  637. return dram_block_size;
  638. }
  639. int fsl_mc_ldpaa_init(bd_t *bis)
  640. {
  641. int i;
  642. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  643. if ((wriop_is_enabled_dpmac(i) == 1) &&
  644. (wriop_get_phy_address(i) != -1))
  645. ldpaa_eth_init(i, wriop_get_enet_if(i));
  646. return 0;
  647. }
  648. static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
  649. {
  650. struct dprc_attributes attr;
  651. int error;
  652. memset(&attr, 0, sizeof(struct dprc_attributes));
  653. error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr);
  654. if (error == 0) {
  655. if ((attr.version.major != DPRC_VER_MAJOR) ||
  656. (attr.version.minor != DPRC_VER_MINOR)) {
  657. printf("DPRC version mismatch found %u.%u,",
  658. attr.version.major,
  659. attr.version.minor);
  660. printf("supported version is %u.%u\n",
  661. DPRC_VER_MAJOR, DPRC_VER_MINOR);
  662. }
  663. }
  664. return error;
  665. }
  666. static int dpio_init(void)
  667. {
  668. struct qbman_swp_desc p_des;
  669. struct dpio_attr attr;
  670. struct dpio_cfg dpio_cfg;
  671. int err = 0;
  672. dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
  673. if (!dflt_dpio) {
  674. printf("No memory: malloc() failed\n");
  675. err = -ENOMEM;
  676. goto err_malloc;
  677. }
  678. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  679. dpio_cfg.num_priorities = 8;
  680. err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
  681. &dflt_dpio->dpio_handle);
  682. if (err < 0) {
  683. printf("dpio_create() failed: %d\n", err);
  684. err = -ENODEV;
  685. goto err_create;
  686. }
  687. memset(&attr, 0, sizeof(struct dpio_attr));
  688. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  689. dflt_dpio->dpio_handle, &attr);
  690. if (err < 0) {
  691. printf("dpio_get_attributes() failed: %d\n", err);
  692. goto err_get_attr;
  693. }
  694. if ((attr.version.major != DPIO_VER_MAJOR) ||
  695. (attr.version.minor != DPIO_VER_MINOR)) {
  696. printf("DPIO version mismatch found %u.%u,",
  697. attr.version.major, attr.version.minor);
  698. printf("supported version is %u.%u\n",
  699. DPIO_VER_MAJOR, DPIO_VER_MINOR);
  700. }
  701. dflt_dpio->dpio_id = attr.id;
  702. #ifdef DEBUG
  703. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  704. #endif
  705. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  706. if (err < 0) {
  707. printf("dpio_enable() failed %d\n", err);
  708. goto err_get_enable;
  709. }
  710. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  711. attr.qbman_portal_ce_offset,
  712. attr.qbman_portal_ci_offset,
  713. attr.qbman_portal_id,
  714. attr.num_priorities);
  715. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  716. + attr.qbman_portal_ce_offset);
  717. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  718. + attr.qbman_portal_ci_offset);
  719. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  720. if (dflt_dpio->sw_portal == NULL) {
  721. printf("qbman_swp_init() failed\n");
  722. goto err_get_swp_init;
  723. }
  724. return 0;
  725. err_get_swp_init:
  726. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  727. err_get_enable:
  728. err_get_attr:
  729. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  730. dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  731. err_create:
  732. free(dflt_dpio);
  733. err_malloc:
  734. return err;
  735. }
  736. static int dpio_exit(void)
  737. {
  738. int err;
  739. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  740. if (err < 0) {
  741. printf("dpio_disable() failed: %d\n", err);
  742. goto err;
  743. }
  744. err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  745. if (err < 0) {
  746. printf("dpio_destroy() failed: %d\n", err);
  747. goto err;
  748. }
  749. #ifdef DEBUG
  750. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  751. #endif
  752. if (dflt_dpio)
  753. free(dflt_dpio);
  754. return 0;
  755. err:
  756. return err;
  757. }
  758. static int dprc_init(void)
  759. {
  760. int err, child_portal_id, container_id;
  761. struct dprc_cfg cfg;
  762. uint64_t mc_portal_offset;
  763. /* Open root container */
  764. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  765. if (err < 0) {
  766. printf("dprc_get_container_id(): Root failed: %d\n", err);
  767. goto err_root_container_id;
  768. }
  769. #ifdef DEBUG
  770. printf("Root container id = %d\n", container_id);
  771. #endif
  772. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  773. &root_dprc_handle);
  774. if (err < 0) {
  775. printf("dprc_open(): Root Container failed: %d\n", err);
  776. goto err_root_open;
  777. }
  778. if (!root_dprc_handle) {
  779. printf("dprc_open(): Root Container Handle is not valid\n");
  780. goto err_root_open;
  781. }
  782. err = dprc_version_check(root_mc_io, root_dprc_handle);
  783. if (err < 0) {
  784. printf("dprc_version_check() failed: %d\n", err);
  785. goto err_root_open;
  786. }
  787. memset(&cfg, 0, sizeof(struct dprc_cfg));
  788. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  789. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  790. DPRC_CFG_OPT_ALLOC_ALLOWED;
  791. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  792. cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
  793. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  794. root_dprc_handle,
  795. &cfg,
  796. &child_dprc_id,
  797. &mc_portal_offset);
  798. if (err < 0) {
  799. printf("dprc_create_container() failed: %d\n", err);
  800. goto err_create;
  801. }
  802. dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  803. if (!dflt_mc_io) {
  804. err = -ENOMEM;
  805. printf(" No memory: malloc() failed\n");
  806. goto err_malloc;
  807. }
  808. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  809. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  810. #ifdef DEBUG
  811. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  812. child_dprc_id, dflt_mc_io->mmio_regs);
  813. #endif
  814. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  815. &dflt_dprc_handle);
  816. if (err < 0) {
  817. printf("dprc_open(): Child container failed: %d\n", err);
  818. goto err_child_open;
  819. }
  820. if (!dflt_dprc_handle) {
  821. printf("dprc_open(): Child container Handle is not valid\n");
  822. goto err_child_open;
  823. }
  824. return 0;
  825. err_child_open:
  826. free(dflt_mc_io);
  827. err_malloc:
  828. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  829. root_dprc_handle, child_dprc_id);
  830. err_create:
  831. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  832. err_root_open:
  833. err_root_container_id:
  834. return err;
  835. }
  836. static int dprc_exit(void)
  837. {
  838. int err;
  839. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  840. if (err < 0) {
  841. printf("dprc_close(): Child failed: %d\n", err);
  842. goto err;
  843. }
  844. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  845. root_dprc_handle, child_dprc_id);
  846. if (err < 0) {
  847. printf("dprc_destroy_container() failed: %d\n", err);
  848. goto err;
  849. }
  850. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  851. if (err < 0) {
  852. printf("dprc_close(): Root failed: %d\n", err);
  853. goto err;
  854. }
  855. if (dflt_mc_io)
  856. free(dflt_mc_io);
  857. if (root_mc_io)
  858. free(root_mc_io);
  859. return 0;
  860. err:
  861. return err;
  862. }
  863. static int dpbp_init(void)
  864. {
  865. int err;
  866. struct dpbp_attr dpbp_attr;
  867. struct dpbp_cfg dpbp_cfg;
  868. dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
  869. if (!dflt_dpbp) {
  870. printf("No memory: malloc() failed\n");
  871. err = -ENOMEM;
  872. goto err_malloc;
  873. }
  874. dpbp_cfg.options = 512;
  875. err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
  876. &dflt_dpbp->dpbp_handle);
  877. if (err < 0) {
  878. err = -ENODEV;
  879. printf("dpbp_create() failed: %d\n", err);
  880. goto err_create;
  881. }
  882. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  883. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  884. dflt_dpbp->dpbp_handle,
  885. &dpbp_attr);
  886. if (err < 0) {
  887. printf("dpbp_get_attributes() failed: %d\n", err);
  888. goto err_get_attr;
  889. }
  890. if ((dpbp_attr.version.major != DPBP_VER_MAJOR) ||
  891. (dpbp_attr.version.minor != DPBP_VER_MINOR)) {
  892. printf("DPBP version mismatch found %u.%u,",
  893. dpbp_attr.version.major, dpbp_attr.version.minor);
  894. printf("supported version is %u.%u\n",
  895. DPBP_VER_MAJOR, DPBP_VER_MINOR);
  896. }
  897. dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
  898. #ifdef DEBUG
  899. printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  900. #endif
  901. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  902. if (err < 0) {
  903. printf("dpbp_close() failed: %d\n", err);
  904. goto err_close;
  905. }
  906. return 0;
  907. err_close:
  908. free(dflt_dpbp);
  909. err_get_attr:
  910. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  911. dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  912. err_create:
  913. err_malloc:
  914. return err;
  915. }
  916. static int dpbp_exit(void)
  917. {
  918. int err;
  919. err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
  920. &dflt_dpbp->dpbp_handle);
  921. if (err < 0) {
  922. printf("dpbp_open() failed: %d\n", err);
  923. goto err;
  924. }
  925. err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  926. dflt_dpbp->dpbp_handle);
  927. if (err < 0) {
  928. printf("dpbp_destroy() failed: %d\n", err);
  929. goto err;
  930. }
  931. #ifdef DEBUG
  932. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  933. #endif
  934. if (dflt_dpbp)
  935. free(dflt_dpbp);
  936. return 0;
  937. err:
  938. return err;
  939. }
  940. static int dpni_init(void)
  941. {
  942. int err;
  943. struct dpni_attr dpni_attr;
  944. uint8_t ext_cfg_buf[256] = {0};
  945. struct dpni_extended_cfg dpni_extended_cfg;
  946. struct dpni_cfg dpni_cfg;
  947. dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
  948. if (!dflt_dpni) {
  949. printf("No memory: malloc() failed\n");
  950. err = -ENOMEM;
  951. goto err_malloc;
  952. }
  953. memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
  954. err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]);
  955. if (err < 0) {
  956. err = -ENODEV;
  957. printf("dpni_prepare_extended_cfg() failed: %d\n", err);
  958. goto err_prepare_extended_cfg;
  959. }
  960. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  961. dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
  962. DPNI_OPT_MULTICAST_FILTER;
  963. dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0];
  964. err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
  965. &dflt_dpni->dpni_handle);
  966. if (err < 0) {
  967. err = -ENODEV;
  968. printf("dpni_create() failed: %d\n", err);
  969. goto err_create;
  970. }
  971. memset(&dpni_attr, 0, sizeof(struct dpni_attr));
  972. err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  973. dflt_dpni->dpni_handle,
  974. &dpni_attr);
  975. if (err < 0) {
  976. printf("dpni_get_attributes() failed: %d\n", err);
  977. goto err_get_attr;
  978. }
  979. if ((dpni_attr.version.major != DPNI_VER_MAJOR) ||
  980. (dpni_attr.version.minor != DPNI_VER_MINOR)) {
  981. printf("DPNI version mismatch found %u.%u,",
  982. dpni_attr.version.major, dpni_attr.version.minor);
  983. printf("supported version is %u.%u\n",
  984. DPNI_VER_MAJOR, DPNI_VER_MINOR);
  985. }
  986. dflt_dpni->dpni_id = dpni_attr.id;
  987. #ifdef DEBUG
  988. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  989. #endif
  990. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  991. if (err < 0) {
  992. printf("dpni_close() failed: %d\n", err);
  993. goto err_close;
  994. }
  995. return 0;
  996. err_close:
  997. err_get_attr:
  998. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  999. dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  1000. err_create:
  1001. err_prepare_extended_cfg:
  1002. free(dflt_dpni);
  1003. err_malloc:
  1004. return err;
  1005. }
  1006. static int dpni_exit(void)
  1007. {
  1008. int err;
  1009. err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
  1010. &dflt_dpni->dpni_handle);
  1011. if (err < 0) {
  1012. printf("dpni_open() failed: %d\n", err);
  1013. goto err;
  1014. }
  1015. err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  1016. dflt_dpni->dpni_handle);
  1017. if (err < 0) {
  1018. printf("dpni_destroy() failed: %d\n", err);
  1019. goto err;
  1020. }
  1021. #ifdef DEBUG
  1022. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  1023. #endif
  1024. if (dflt_dpni)
  1025. free(dflt_dpni);
  1026. return 0;
  1027. err:
  1028. return err;
  1029. }
  1030. static int mc_init_object(void)
  1031. {
  1032. int err = 0;
  1033. err = dprc_init();
  1034. if (err < 0) {
  1035. printf("dprc_init() failed: %d\n", err);
  1036. goto err;
  1037. }
  1038. err = dpbp_init();
  1039. if (err < 0) {
  1040. printf("dpbp_init() failed: %d\n", err);
  1041. goto err;
  1042. }
  1043. err = dpio_init();
  1044. if (err < 0) {
  1045. printf("dpio_init() failed: %d\n", err);
  1046. goto err;
  1047. }
  1048. err = dpni_init();
  1049. if (err < 0) {
  1050. printf("dpni_init() failed: %d\n", err);
  1051. goto err;
  1052. }
  1053. return 0;
  1054. err:
  1055. return err;
  1056. }
  1057. int fsl_mc_ldpaa_exit(bd_t *bd)
  1058. {
  1059. int err = 0;
  1060. if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
  1061. mc_apply_dpl(mc_lazy_dpl_addr);
  1062. mc_lazy_dpl_addr = 0;
  1063. }
  1064. /* MC is not loaded intentionally, So return success. */
  1065. if (bd && get_mc_boot_status() != 0)
  1066. return 0;
  1067. if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
  1068. printf("ERROR: fsl-mc: DPL is not applied\n");
  1069. err = -ENODEV;
  1070. return err;
  1071. }
  1072. if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
  1073. return err;
  1074. err = dpbp_exit();
  1075. if (err < 0) {
  1076. printf("dpbp_exit() failed: %d\n", err);
  1077. goto err;
  1078. }
  1079. err = dpio_exit();
  1080. if (err < 0) {
  1081. printf("dpio_exit() failed: %d\n", err);
  1082. goto err;
  1083. }
  1084. err = dpni_exit();
  1085. if (err < 0) {
  1086. printf("dpni_exit() failed: %d\n", err);
  1087. goto err;
  1088. }
  1089. err = dprc_exit();
  1090. if (err < 0) {
  1091. printf("dprc_exit() failed: %d\n", err);
  1092. goto err;
  1093. }
  1094. return 0;
  1095. err:
  1096. return err;
  1097. }
  1098. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  1099. {
  1100. int err = 0;
  1101. if (argc < 3)
  1102. goto usage;
  1103. switch (argv[1][0]) {
  1104. case 's': {
  1105. char sub_cmd;
  1106. u64 mc_fw_addr, mc_dpc_addr;
  1107. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1108. u64 aiop_fw_addr;
  1109. #endif
  1110. sub_cmd = argv[2][0];
  1111. switch (sub_cmd) {
  1112. case 'm':
  1113. if (argc < 5)
  1114. goto usage;
  1115. if (get_mc_boot_status() == 0) {
  1116. printf("fsl-mc: MC is already booted");
  1117. printf("\n");
  1118. return err;
  1119. }
  1120. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  1121. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  1122. 16);
  1123. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  1124. err = mc_init_object();
  1125. break;
  1126. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1127. case 'a':
  1128. if (argc < 4)
  1129. goto usage;
  1130. if (get_aiop_apply_status() == 0) {
  1131. printf("fsl-mc: AIOP FW is already");
  1132. printf(" applied\n");
  1133. return err;
  1134. }
  1135. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  1136. 16);
  1137. /* if SoC doesn't have AIOP, err = -ENODEV */
  1138. err = load_mc_aiop_img(aiop_fw_addr);
  1139. if (!err)
  1140. printf("fsl-mc: AIOP FW applied\n");
  1141. break;
  1142. #endif
  1143. default:
  1144. printf("Invalid option: %s\n", argv[2]);
  1145. goto usage;
  1146. break;
  1147. }
  1148. }
  1149. break;
  1150. case 'l':
  1151. case 'a': {
  1152. u64 mc_dpl_addr;
  1153. if (argc < 4)
  1154. goto usage;
  1155. if (get_dpl_apply_status() == 0) {
  1156. printf("fsl-mc: DPL already applied\n");
  1157. return err;
  1158. }
  1159. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1160. 16);
  1161. if (get_mc_boot_status() != 0) {
  1162. printf("fsl-mc: Deploying data path layout ..");
  1163. printf("ERROR (MC is not booted)\n");
  1164. return -ENODEV;
  1165. }
  1166. if (argv[1][0] == 'l') {
  1167. /*
  1168. * We will do the actual dpaa exit and dpl apply
  1169. * later from announce_and_cleanup().
  1170. */
  1171. mc_lazy_dpl_addr = mc_dpl_addr;
  1172. } else {
  1173. /* The user wants it applied now */
  1174. if (!fsl_mc_ldpaa_exit(NULL))
  1175. err = mc_apply_dpl(mc_dpl_addr);
  1176. }
  1177. break;
  1178. }
  1179. default:
  1180. printf("Invalid option: %s\n", argv[1]);
  1181. goto usage;
  1182. break;
  1183. }
  1184. return err;
  1185. usage:
  1186. return CMD_RET_USAGE;
  1187. }
  1188. U_BOOT_CMD(
  1189. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1190. "DPAA2 command to manage Management Complex (MC)",
  1191. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1192. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1193. "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
  1194. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1195. );