microcode_intel.c 4.3 KB

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  1. /*
  2. * Copyright (c) 2014 Google, Inc
  3. * Copyright (C) 2000 Ronald G. Minnich
  4. *
  5. * Microcode update for Intel PIII and later CPUs
  6. *
  7. * SPDX-License-Identifier: GPL-2.0
  8. */
  9. #include <common.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <libfdt.h>
  13. #include <asm/cpu.h>
  14. #include <asm/msr.h>
  15. #include <asm/msr-index.h>
  16. #include <asm/processor.h>
  17. #include <asm/arch/microcode.h>
  18. /**
  19. * struct microcode_update - standard microcode header from Intel
  20. *
  21. * We read this information out of the device tree and use it to determine
  22. * whether the update is applicable or not. We also use the same structure
  23. * to read information from the CPU.
  24. */
  25. struct microcode_update {
  26. uint header_version;
  27. uint update_revision;
  28. uint date_code;
  29. uint processor_signature;
  30. uint checksum;
  31. uint loader_revision;
  32. uint processor_flags;
  33. const void *data;
  34. int size;
  35. };
  36. static int microcode_decode_node(const void *blob, int node,
  37. struct microcode_update *update)
  38. {
  39. update->data = fdt_getprop(blob, node, "data", &update->size);
  40. if (!update->data)
  41. return -EINVAL;
  42. update->data += UCODE_HEADER_LEN;
  43. update->size -= UCODE_HEADER_LEN;
  44. update->header_version = fdtdec_get_int(blob, node,
  45. "intel,header-version", 0);
  46. update->update_revision = fdtdec_get_int(blob, node,
  47. "intel,update-revision", 0);
  48. update->date_code = fdtdec_get_int(blob, node,
  49. "intel,date-code", 0);
  50. update->processor_signature = fdtdec_get_int(blob, node,
  51. "intel,processor-signature", 0);
  52. update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
  53. update->loader_revision = fdtdec_get_int(blob, node,
  54. "intel,loader-revision", 0);
  55. update->processor_flags = fdtdec_get_int(blob, node,
  56. "intel,processor-flags", 0);
  57. return 0;
  58. }
  59. static inline uint32_t microcode_read_rev(void)
  60. {
  61. /*
  62. * Some Intel CPUs can be very finicky about the CPUID sequence used.
  63. * So this is implemented in assembly so that it works reliably.
  64. */
  65. uint32_t low, high;
  66. asm volatile (
  67. "xorl %%eax, %%eax\n"
  68. "xorl %%edx, %%edx\n"
  69. "movl %2, %%ecx\n"
  70. "wrmsr\n"
  71. "movl $0x01, %%eax\n"
  72. "cpuid\n"
  73. "movl %2, %%ecx\n"
  74. "rdmsr\n"
  75. : /* outputs */
  76. "=a" (low), "=d" (high)
  77. : /* inputs */
  78. "i" (MSR_IA32_UCODE_REV)
  79. : /* clobbers */
  80. "ebx", "ecx"
  81. );
  82. return high;
  83. }
  84. static void microcode_read_cpu(struct microcode_update *cpu)
  85. {
  86. /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
  87. unsigned int x86_model, x86_family;
  88. struct cpuid_result result;
  89. uint32_t low, high;
  90. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  91. result = cpuid(1);
  92. rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
  93. x86_model = (result.eax >> 4) & 0x0f;
  94. x86_family = (result.eax >> 8) & 0x0f;
  95. cpu->processor_signature = result.eax;
  96. cpu->processor_flags = 0;
  97. if ((x86_model >= 5) || (x86_family > 6)) {
  98. rdmsr(0x17, low, high);
  99. cpu->processor_flags = 1 << ((high >> 18) & 7);
  100. }
  101. debug("microcode: sig=%#x pf=%#x revision=%#x\n",
  102. cpu->processor_signature, cpu->processor_flags,
  103. cpu->update_revision);
  104. }
  105. /* Get a microcode update from the device tree and apply it */
  106. int microcode_update_intel(void)
  107. {
  108. struct microcode_update cpu, update;
  109. const void *blob = gd->fdt_blob;
  110. int skipped;
  111. int count;
  112. int node;
  113. int ret;
  114. int rev;
  115. microcode_read_cpu(&cpu);
  116. node = 0;
  117. count = 0;
  118. skipped = 0;
  119. do {
  120. node = fdtdec_next_compatible(blob, node,
  121. COMPAT_INTEL_MICROCODE);
  122. if (node < 0) {
  123. debug("%s: Found %d updates\n", __func__, count);
  124. return count ? 0 : skipped ? -EEXIST : -ENOENT;
  125. }
  126. ret = microcode_decode_node(blob, node, &update);
  127. if (ret) {
  128. debug("%s: Unable to decode update: %d\n", __func__,
  129. ret);
  130. return ret;
  131. }
  132. if (!(update.processor_signature == cpu.processor_signature &&
  133. (update.processor_flags & cpu.processor_flags))) {
  134. debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
  135. __func__, update.processor_signature,
  136. update.processor_flags);
  137. skipped++;
  138. continue;
  139. }
  140. wrmsr(MSR_IA32_UCODE_WRITE, (ulong)update.data, 0);
  141. rev = microcode_read_rev();
  142. debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
  143. rev, update.date_code & 0xffff,
  144. (update.date_code >> 24) & 0xff,
  145. (update.date_code >> 16) & 0xff);
  146. if (update.update_revision != rev) {
  147. printf("Microcode update failed\n");
  148. return -EFAULT;
  149. }
  150. count++;
  151. } while (1);
  152. }