fsl_secure_boot.h 4.5 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __FSL_SECURE_BOOT_H
  7. #define __FSL_SECURE_BOOT_H
  8. #ifdef CONFIG_CHAIN_OF_TRUST
  9. #define CONFIG_CMD_ESBC_VALIDATE
  10. #define CONFIG_FSL_SEC_MON
  11. #define CONFIG_SHA_HW_ACCEL
  12. #define CONFIG_SHA_PROG_HW_ACCEL
  13. #define CONFIG_SPL_BOARD_INIT
  14. #ifdef CONFIG_SPL_BUILD
  15. /*
  16. * Define the key hash for U-Boot here if public/private key pair used to
  17. * sign U-boot are different from the SRK hash put in the fuse
  18. * Example of defining KEY_HASH is
  19. * #define CONFIG_SPL_UBOOT_KEY_HASH \
  20. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  21. * else leave it defined as NULL
  22. */
  23. #define CONFIG_SPL_UBOOT_KEY_HASH NULL
  24. #endif /* ifdef CONFIG_SPL_BUILD */
  25. #define CONFIG_KEY_REVOCATION
  26. #ifndef CONFIG_SPL_BUILD
  27. #define CONFIG_CMD_BLOB
  28. #define CONFIG_CMD_HASH
  29. #ifndef CONFIG_SYS_RAMBOOT
  30. /* The key used for verification of next level images
  31. * is picked up from an Extension Table which has
  32. * been verified by the ISBC (Internal Secure boot Code)
  33. * in boot ROM of the SoC.
  34. * The feature is only applicable in case of NOR boot and is
  35. * not applicable in case of RAMBOOT (NAND, SD, SPI).
  36. * For LS, this feature is available for all device if IE Table
  37. * is copied to XIP memory
  38. * Also, for LS, ISBC doesn't verify this table.
  39. */
  40. #define CONFIG_FSL_ISBC_KEY_EXT
  41. #endif
  42. #if defined(CONFIG_FSL_LAYERSCAPE)
  43. /*
  44. * For fsl layerscape based platforms, ESBC image Address in Header
  45. * is 64 bit.
  46. */
  47. #define CONFIG_ESBC_ADDR_64BIT
  48. #endif
  49. #ifdef CONFIG_ARCH_LS2080A
  50. #define CONFIG_EXTRA_ENV \
  51. "setenv fdt_high 0xa0000000;" \
  52. "setenv initrd_high 0xcfffffff;" \
  53. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  54. #else
  55. #define CONFIG_EXTRA_ENV \
  56. "setenv fdt_high 0xffffffff;" \
  57. "setenv initrd_high 0xffffffff;" \
  58. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  59. #endif
  60. /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  61. * Non-XIP Memory (Nand/SD)*/
  62. #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
  63. defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
  64. #define CONFIG_BOOTSCRIPT_COPY_RAM
  65. #endif
  66. /* The address needs to be modified according to NOR, NAND, SD and
  67. * DDR memory map
  68. */
  69. #ifdef CONFIG_FSL_LSCH3
  70. #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
  71. #define CONFIG_BS_ADDR_DEVICE 0x580e00000
  72. #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
  73. #define CONFIG_BS_ADDR_RAM 0xa0e00000
  74. #define CONFIG_BS_HDR_SIZE 0x00002000
  75. #define CONFIG_BS_SIZE 0x00001000
  76. #else
  77. #ifdef CONFIG_SD_BOOT
  78. /* For SD boot address and size are assigned in terms of sector
  79. * offset and no. of sectors respectively.
  80. */
  81. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  82. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
  83. #else
  84. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
  85. #endif
  86. #define CONFIG_BS_ADDR_DEVICE 0x00000940
  87. #define CONFIG_BS_HDR_SIZE 0x00000010
  88. #define CONFIG_BS_SIZE 0x00000008
  89. #elif defined(CONFIG_NAND_BOOT)
  90. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
  91. #define CONFIG_BS_ADDR_DEVICE 0x00802000
  92. #define CONFIG_BS_HDR_SIZE 0x00002000
  93. #define CONFIG_BS_SIZE 0x00001000
  94. #elif defined(CONFIG_QSPI_BOOT)
  95. #ifdef CONFIG_ARCH_LS1046A
  96. #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
  97. #define CONFIG_BS_ADDR_DEVICE 0x40800000
  98. #elif defined(CONFIG_ARCH_LS1012A)
  99. #define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
  100. #define CONFIG_BS_ADDR_DEVICE 0x40060000
  101. #else
  102. #error "Platform not supported"
  103. #endif
  104. #define CONFIG_BS_HDR_SIZE 0x00002000
  105. #define CONFIG_BS_SIZE 0x00001000
  106. #else /* Default NOR Boot */
  107. #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
  108. #define CONFIG_BS_ADDR_DEVICE 0x60060000
  109. #define CONFIG_BS_HDR_SIZE 0x00002000
  110. #define CONFIG_BS_SIZE 0x00001000
  111. #endif
  112. #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
  113. #define CONFIG_BS_ADDR_RAM 0x81020000
  114. #endif
  115. #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
  116. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
  117. #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
  118. #else
  119. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
  120. /* BOOTSCRIPT_ADDR is not required */
  121. #endif
  122. #ifdef CONFIG_FSL_LS_PPA
  123. /* Define the key hash here if SRK used for signing PPA image is
  124. * different from SRK hash put in SFP used for U-Boot.
  125. * Example
  126. * #define PPA_KEY_HASH \
  127. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  128. */
  129. #define PPA_KEY_HASH NULL
  130. #endif /* ifdef CONFIG_FSL_LS_PPA */
  131. #include <config_fsl_chain_trust.h>
  132. #endif /* #ifndef CONFIG_SPL_BUILD */
  133. #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
  134. #endif