README.x86 32 KB

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  1. #
  2. # Copyright (C) 2014, Simon Glass <sjg@chromium.org>
  3. # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
  4. #
  5. # SPDX-License-Identifier: GPL-2.0+
  6. #
  7. U-Boot on x86
  8. =============
  9. This document describes the information about U-Boot running on x86 targets,
  10. including supported boards, build instructions, todo list, etc.
  11. Status
  12. ------
  13. U-Boot supports running as a coreboot [1] payload on x86. So far only Link
  14. (Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
  15. work with minimal adjustments on other x86 boards since coreboot deals with
  16. most of the low-level details.
  17. U-Boot also supports booting directly from x86 reset vector, without coreboot.
  18. In this case, known as bare mode, from the fact that it runs on the
  19. 'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86
  20. targets and all Intel boards support running U-Boot 'bare metal'.
  21. As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
  22. Linux kernel as part of a FIT image. It also supports a compressed zImage.
  23. U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks
  24. for more details.
  25. Build Instructions for U-Boot as coreboot payload
  26. -------------------------------------------------
  27. Building U-Boot as a coreboot payload is just like building U-Boot for targets
  28. on other architectures, like below:
  29. $ make coreboot-x86_defconfig
  30. $ make all
  31. Note this default configuration will build a U-Boot payload for the QEMU board.
  32. To build a coreboot payload against another board, you can change the build
  33. configuration during the 'make menuconfig' process.
  34. x86 architecture --->
  35. ...
  36. (qemu-x86) Board configuration file
  37. (qemu-x86_i440fx) Board Device Tree Source (dts) file
  38. (0x01920000) Board specific Cache-As-RAM (CAR) address
  39. (0x4000) Board specific Cache-As-RAM (CAR) size
  40. Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
  41. to point to a new board. You can also change the Cache-As-RAM (CAR) related
  42. settings here if the default values do not fit your new board.
  43. Build Instructions for U-Boot as BIOS replacement (bare mode)
  44. -------------------------------------------------------------
  45. Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
  46. little bit tricky, as generally it requires several binary blobs which are not
  47. shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
  48. not turned on by default in the U-Boot source tree. Firstly, you need turn it
  49. on by enabling the ROM build:
  50. $ export BUILD_ROM=y
  51. This tells the Makefile to build u-boot.rom as a target.
  52. ---
  53. Chromebook Link specific instructions for bare mode:
  54. First, you need the following binary blobs:
  55. * descriptor.bin - Intel flash descriptor
  56. * me.bin - Intel Management Engine
  57. * mrc.bin - Memory Reference Code, which sets up SDRAM
  58. * video ROM - sets up the display
  59. You can get these binary blobs by:
  60. $ git clone http://review.coreboot.org/p/blobs.git
  61. $ cd blobs
  62. Find the following files:
  63. * ./mainboard/google/link/descriptor.bin
  64. * ./mainboard/google/link/me.bin
  65. * ./northbridge/intel/sandybridge/systemagent-r6.bin
  66. The 3rd one should be renamed to mrc.bin.
  67. As for the video ROM, you can get it here [3] and rename it to vga.bin.
  68. Make sure all these binary blobs are put in the board directory.
  69. Now you can build U-Boot and obtain u-boot.rom:
  70. $ make chromebook_link_defconfig
  71. $ make all
  72. ---
  73. Intel Crown Bay specific instructions for bare mode:
  74. U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
  75. Firmware Support Package [5] to perform all the necessary initialization steps
  76. as documented in the BIOS Writer Guide, including initialization of the CPU,
  77. memory controller, chipset and certain bus interfaces.
  78. Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
  79. install it on your host and locate the FSP binary blob. Note this platform
  80. also requires a Chipset Micro Code (CMC) state machine binary to be present in
  81. the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
  82. in this FSP package too.
  83. * ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
  84. * ./Microcode/C0_22211.BIN
  85. Rename the first one to fsp.bin and second one to cmc.bin and put them in the
  86. board directory.
  87. Note the FSP release version 001 has a bug which could cause random endless
  88. loop during the FspInit call. This bug was published by Intel although Intel
  89. did not describe any details. We need manually apply the patch to the FSP
  90. binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
  91. binary, change the following five bytes values from orginally E8 42 FF FF FF
  92. to B8 00 80 0B 00.
  93. As for the video ROM, you need manually extract it from the Intel provided
  94. BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
  95. ID 8086:4108, extract and save it as vga.bin in the board directory.
  96. Now you can build U-Boot and obtain u-boot.rom
  97. $ make crownbay_defconfig
  98. $ make all
  99. ---
  100. Intel Minnowboard Max instructions for bare mode:
  101. This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
  102. Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
  103. the time of writing). Put it in the board directory:
  104. board/intel/minnowmax/fsp.bin
  105. Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
  106. directory: board/intel/minnowmax/vga.bin
  107. You still need two more binary blobs. The first comes from the original
  108. firmware image available from:
  109. http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
  110. Unzip it:
  111. $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
  112. Use ifdtool in the U-Boot tools directory to extract the images from that
  113. file, for example:
  114. $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
  115. This will provide the descriptor file - copy this into the correct place:
  116. $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
  117. Then do the same with the sample SPI image provided in the FSP (SPI.bin at
  118. the time of writing) to obtain the last image. Note that this will also
  119. produce a flash descriptor file, but it does not seem to work, probably
  120. because it is not designed for the Minnowmax. That is why you need to get
  121. the flash descriptor from the original firmware as above.
  122. $ ./tools/ifdtool -x BayleyBay/SPI.bin
  123. $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin
  124. Now you can build U-Boot and obtain u-boot.rom
  125. $ make minnowmax_defconfig
  126. $ make all
  127. Checksums are as follows (but note that newer versions will invalidate this):
  128. $ md5sum -b board/intel/minnowmax/*.bin
  129. ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin
  130. 69f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin
  131. 894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin
  132. a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin
  133. The ROM image is broken up into these parts:
  134. Offset Description Controlling config
  135. ------------------------------------------------------------
  136. 000000 descriptor.bin Hard-coded to 0 in ifdtool
  137. 001000 me.bin Set by the descriptor
  138. 500000 <spare>
  139. 6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE
  140. 700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE
  141. 790000 vga.bin CONFIG_VGA_BIOS_ADDR
  142. 7c0000 fsp.bin CONFIG_FSP_ADDR
  143. 7f8000 <spare> (depends on size of fsp.bin)
  144. 7fe000 Environment CONFIG_ENV_OFFSET
  145. 7ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16
  146. Overall ROM image size is controlled by CONFIG_ROM_SIZE.
  147. ---
  148. Intel Galileo instructions for bare mode:
  149. Only one binary blob is needed for Remote Management Unit (RMU) within Intel
  150. Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
  151. needed by the Quark SoC itself.
  152. You can get the binary blob from Quark Board Support Package from Intel website:
  153. * ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
  154. Rename the file and put it to the board directory by:
  155. $ cp RMU.bin board/intel/galileo/rmu.bin
  156. Now you can build U-Boot and obtain u-boot.rom
  157. $ make galileo_defconfig
  158. $ make all
  159. QEMU x86 target instructions:
  160. To build u-boot.rom for QEMU x86 targets, just simply run
  161. $ make qemu-x86_defconfig
  162. $ make all
  163. Note this default configuration will build a U-Boot for the QEMU x86 i440FX
  164. board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
  165. configuration during the 'make menuconfig' process like below:
  166. Device Tree Control --->
  167. ...
  168. (qemu-x86_q35) Default Device Tree for DT control
  169. Test with coreboot
  170. ------------------
  171. For testing U-Boot as the coreboot payload, there are things that need be paid
  172. attention to. coreboot supports loading an ELF executable and a 32-bit plain
  173. binary, as well as other supported payloads. With the default configuration,
  174. U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
  175. generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
  176. provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
  177. this capability yet. The command is as follows:
  178. # in the coreboot root directory
  179. $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
  180. -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
  181. Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
  182. of _x86boot_start (in arch/x86/cpu/start.S).
  183. If you want to use ELF as the coreboot payload, change U-Boot configuration to
  184. use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
  185. To enable video you must enable these options in coreboot:
  186. - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
  187. - Keep VESA framebuffer
  188. At present it seems that for Minnowboard Max, coreboot does not pass through
  189. the video information correctly (it always says the resolution is 0x0). This
  190. works correctly for link though.
  191. Test with QEMU for bare mode
  192. ----------------------------
  193. QEMU is a fancy emulator that can enable us to test U-Boot without access to
  194. a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
  195. U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
  196. $ qemu-system-i386 -nographic -bios path/to/u-boot.rom
  197. This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
  198. also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
  199. also supported by U-Boot. To instantiate such a machine, call QEMU with:
  200. $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
  201. Note by default QEMU instantiated boards only have 128 MiB system memory. But
  202. it is enough to have U-Boot boot and function correctly. You can increase the
  203. system memory by pass '-m' parameter to QEMU if you want more memory:
  204. $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
  205. This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
  206. supports 3 GiB maximum system memory and reserves the last 1 GiB address space
  207. for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
  208. would be 3072.
  209. QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
  210. show QEMU's VGA console window. Note this will disable QEMU's serial output.
  211. If you want to check both consoles, use '-serial stdio'.
  212. Multicore is also supported by QEMU via '-smp n' where n is the number of cores
  213. to instantiate. Note, the maximum supported CPU number in QEMU is 255.
  214. The fw_cfg interface in QEMU also provides information about kernel data, initrd,
  215. command-line arguments and more. U-Boot supports directly accessing these informtion
  216. from fw_cfg interface, this saves the time of loading them from hard disk or
  217. network again, through emulated devices. To use it , simply providing them in
  218. QEMU command line:
  219. $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
  220. -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
  221. Note: -initrd and -smp are both optional
  222. Then start QEMU, in U-Boot command line use the following U-Boot command to setup kernel:
  223. => qfw
  224. qfw - QEMU firmware interface
  225. Usage:
  226. qfw <command>
  227. - list : print firmware(s) currently loaded
  228. - cpus : print online cpu number
  229. - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
  230. => qfw load
  231. loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
  232. Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, 'zboot'
  233. can be used to boot the kernel:
  234. => zboot 02000000 - 04000000 1b1ab50
  235. CPU Microcode
  236. -------------
  237. Modern CPUs usually require a special bit stream called microcode [8] to be
  238. loaded on the processor after power up in order to function properly. U-Boot
  239. has already integrated these as hex dumps in the source tree.
  240. SMP Support
  241. -----------
  242. On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
  243. Additional application processors (AP) can be brought up by U-Boot. In order to
  244. have an SMP kernel to discover all of the available processors, U-Boot needs to
  245. prepare configuration tables which contain the multi-CPUs information before
  246. loading the OS kernel. Currently U-Boot supports generating two types of tables
  247. for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
  248. [10] tables. The writing of these two tables are controlled by two Kconfig
  249. options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
  250. Driver Model
  251. ------------
  252. x86 has been converted to use driver model for serial and GPIO.
  253. Device Tree
  254. -----------
  255. x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
  256. be turned on. Not every device on the board is configured via device tree, but
  257. more and more devices will be added as time goes by. Check out the directory
  258. arch/x86/dts/ for these device tree source files.
  259. Useful Commands
  260. ---------------
  261. In keeping with the U-Boot philosophy of providing functions to check and
  262. adjust internal settings, there are several x86-specific commands that may be
  263. useful:
  264. fsp - Display information about Intel Firmware Support Package (FSP).
  265. This is only available on platforms which use FSP, mostly Atom.
  266. iod - Display I/O memory
  267. iow - Write I/O memory
  268. mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
  269. tell the CPU whether memory is cacheable and if so the cache write
  270. mode to use. U-Boot sets up some reasonable values but you can
  271. adjust then with this command.
  272. Booting Ubuntu
  273. --------------
  274. As an example of how to set up your boot flow with U-Boot, here are
  275. instructions for starting Ubuntu from U-Boot. These instructions have been
  276. tested on Minnowboard MAX with a SATA driver but are equally applicable on
  277. other platforms and other media. There are really only four steps and its a
  278. very simple script, but a more detailed explanation is provided here for
  279. completeness.
  280. Note: It is possible to set up U-Boot to boot automatically using syslinux.
  281. It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
  282. GUID. If you figure these out, please post patches to this README.
  283. Firstly, you will need Ubunutu installed on an available disk. It should be
  284. possible to make U-Boot start a USB start-up disk but for now let's assume
  285. that you used another boot loader to install Ubuntu.
  286. Use the U-Boot command line to find the UUID of the partition you want to
  287. boot. For example our disk is SCSI device 0:
  288. => part list scsi 0
  289. Partition Map for SCSI device 0 -- Partition Type: EFI
  290. Part Start LBA End LBA Name
  291. Attributes
  292. Type GUID
  293. Partition GUID
  294. 1 0x00000800 0x001007ff ""
  295. attrs: 0x0000000000000000
  296. type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
  297. guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
  298. 2 0x00100800 0x037d8fff ""
  299. attrs: 0x0000000000000000
  300. type: 0fc63daf-8483-4772-8e79-3d69d8477de4
  301. guid: 965c59ee-1822-4326-90d2-b02446050059
  302. 3 0x037d9000 0x03ba27ff ""
  303. attrs: 0x0000000000000000
  304. type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
  305. guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
  306. =>
  307. This shows that your SCSI disk has three partitions. The really long hex
  308. strings are called Globally Unique Identifiers (GUIDs). You can look up the
  309. 'type' ones here [11]. On this disk the first partition is for EFI and is in
  310. VFAT format (DOS/Windows):
  311. => fatls scsi 0:1
  312. efi/
  313. 0 file(s), 1 dir(s)
  314. Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
  315. in ext2 format:
  316. => ext2ls scsi 0:2
  317. <DIR> 4096 .
  318. <DIR> 4096 ..
  319. <DIR> 16384 lost+found
  320. <DIR> 4096 boot
  321. <DIR> 12288 etc
  322. <DIR> 4096 media
  323. <DIR> 4096 bin
  324. <DIR> 4096 dev
  325. <DIR> 4096 home
  326. <DIR> 4096 lib
  327. <DIR> 4096 lib64
  328. <DIR> 4096 mnt
  329. <DIR> 4096 opt
  330. <DIR> 4096 proc
  331. <DIR> 4096 root
  332. <DIR> 4096 run
  333. <DIR> 12288 sbin
  334. <DIR> 4096 srv
  335. <DIR> 4096 sys
  336. <DIR> 4096 tmp
  337. <DIR> 4096 usr
  338. <DIR> 4096 var
  339. <SYM> 33 initrd.img
  340. <SYM> 30 vmlinuz
  341. <DIR> 4096 cdrom
  342. <SYM> 33 initrd.img.old
  343. =>
  344. and if you look in the /boot directory you will see the kernel:
  345. => ext2ls scsi 0:2 /boot
  346. <DIR> 4096 .
  347. <DIR> 4096 ..
  348. <DIR> 4096 efi
  349. <DIR> 4096 grub
  350. 3381262 System.map-3.13.0-32-generic
  351. 1162712 abi-3.13.0-32-generic
  352. 165611 config-3.13.0-32-generic
  353. 176500 memtest86+.bin
  354. 178176 memtest86+.elf
  355. 178680 memtest86+_multiboot.bin
  356. 5798112 vmlinuz-3.13.0-32-generic
  357. 165762 config-3.13.0-58-generic
  358. 1165129 abi-3.13.0-58-generic
  359. 5823136 vmlinuz-3.13.0-58-generic
  360. 19215259 initrd.img-3.13.0-58-generic
  361. 3391763 System.map-3.13.0-58-generic
  362. 5825048 vmlinuz-3.13.0-58-generic.efi.signed
  363. 28304443 initrd.img-3.13.0-32-generic
  364. =>
  365. The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
  366. self-extracting compressed file mixed with some 'setup' configuration data.
  367. Despite its size (uncompressed it is >10MB) this only includes a basic set of
  368. device drivers, enough to boot on most hardware types.
  369. The 'initrd' files contain a RAM disk. This is something that can be loaded
  370. into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
  371. of drivers for whatever hardware you might have. It is loaded before the
  372. real root disk is accessed.
  373. The numbers after the end of each file are the version. Here it is Linux
  374. version 3.13. You can find the source code for this in the Linux tree with
  375. the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
  376. but normally this is not needed. The '-58' is used by Ubuntu. Each time they
  377. release a new kernel they increment this number. New Ubuntu versions might
  378. include kernel patches to fix reported bugs. Stable kernels can exist for
  379. some years so this number can get quite high.
  380. The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
  381. secure boot mechanism - see [12] [13] and cannot read .efi files at present.
  382. To boot Ubuntu from U-Boot the steps are as follows:
  383. 1. Set up the boot arguments. Use the GUID for the partition you want to
  384. boot:
  385. => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
  386. Here root= tells Linux the location of its root disk. The disk is specified
  387. by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
  388. containing all the GUIDs Linux has found. When it starts up, there will be a
  389. file in that directory with this name in it. It is also possible to use a
  390. device name here, see later.
  391. 2. Load the kernel. Since it is an ext2/4 filesystem we can do:
  392. => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
  393. The address 30000000 is arbitrary, but there seem to be problems with using
  394. small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
  395. the start of RAM (which is at 0 on x86).
  396. 3. Load the ramdisk (to 64MB):
  397. => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
  398. 4. Start up the kernel. We need to know the size of the ramdisk, but can use
  399. a variable for that. U-Boot sets 'filesize' to the size of the last file it
  400. loaded.
  401. => zboot 03000000 0 04000000 ${filesize}
  402. Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
  403. quite verbose when it boots a kernel. You should see these messages from
  404. U-Boot:
  405. Valid Boot Flag
  406. Setup Size = 0x00004400
  407. Magic signature found
  408. Using boot protocol version 2.0c
  409. Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
  410. Building boot_params at 0x00090000
  411. Loading bzImage at address 100000 (5805728 bytes)
  412. Magic signature found
  413. Initial RAM disk at linear address 0x04000000, size 19215259 bytes
  414. Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
  415. Starting kernel ...
  416. U-Boot prints out some bootstage timing. This is more useful if you put the
  417. above commands into a script since then it will be faster.
  418. Timer summary in microseconds:
  419. Mark Elapsed Stage
  420. 0 0 reset
  421. 241,535 241,535 board_init_r
  422. 2,421,611 2,180,076 id=64
  423. 2,421,790 179 id=65
  424. 2,428,215 6,425 main_loop
  425. 48,860,584 46,432,369 start_kernel
  426. Accumulated time:
  427. 240,329 ahci
  428. 1,422,704 vesa display
  429. Now the kernel actually starts:
  430. [ 0.000000] Initializing cgroup subsys cpuset
  431. [ 0.000000] Initializing cgroup subsys cpu
  432. [ 0.000000] Initializing cgroup subsys cpuacct
  433. [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
  434. [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
  435. It continues for a long time. Along the way you will see it pick up your
  436. ramdisk:
  437. [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
  438. ...
  439. [ 0.788540] Trying to unpack rootfs image as initramfs...
  440. [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
  441. ...
  442. Later it actually starts using it:
  443. Begin: Running /scripts/local-premount ... done.
  444. You should also see your boot disk turn up:
  445. [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5
  446. [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
  447. [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
  448. [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off
  449. [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
  450. [ 4.399535] sda: sda1 sda2 sda3
  451. Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
  452. the GUIDs. In step 1 above we could have used:
  453. setenv bootargs root=/dev/sda2 ro
  454. instead of the GUID. However if you add another drive to your board the
  455. numbering may change whereas the GUIDs will not. So if your boot partition
  456. becomes sdb2, it will still boot. For embedded systems where you just want to
  457. boot the first disk, you have that option.
  458. The last thing you will see on the console is mention of plymouth (which
  459. displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
  460. * Starting Mount filesystems on boot [ OK ]
  461. After a pause you should see a login screen on your display and you are done.
  462. If you want to put this in a script you can use something like this:
  463. setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
  464. setenv boot zboot 03000000 0 04000000 \${filesize}
  465. setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
  466. saveenv
  467. The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
  468. command.
  469. You will also need to add this to your board configuration file, e.g.
  470. include/configs/minnowmax.h:
  471. #define CONFIG_BOOTDELAY 2
  472. Now when you reset your board it wait a few seconds (in case you want to
  473. interrupt) and then should boot straight into Ubuntu.
  474. You can also bake this behaviour into your build by hard-coding the
  475. environment variables if you add this to minnowmax.h:
  476. #undef CONFIG_BOOTARGS
  477. #undef CONFIG_BOOTCOMMAND
  478. #define CONFIG_BOOTARGS \
  479. "root=/dev/sda2 ro"
  480. #define CONFIG_BOOTCOMMAND \
  481. "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
  482. "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
  483. "run boot"
  484. #undef CONFIG_EXTRA_ENV_SETTINGS
  485. #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
  486. Development Flow
  487. ----------------
  488. These notes are for those who want to port U-Boot to a new x86 platform.
  489. Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
  490. The Dediprog em100 can be used on Linux. The em100 tool is available here:
  491. http://review.coreboot.org/p/em100.git
  492. On Minnowboard Max the following command line can be used:
  493. sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
  494. A suitable clip for connecting over the SPI flash chip is here:
  495. http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
  496. This allows you to override the SPI flash contents for development purposes.
  497. Typically you can write to the em100 in around 1200ms, considerably faster
  498. than programming the real flash device each time. The only important
  499. limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
  500. This means that images must be set to boot with that speed. This is an
  501. Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
  502. speed in the SPI descriptor region.
  503. If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
  504. easy to fit it in. You can follow the Minnowboard Max implementation, for
  505. example. Hopefully you will just need to create new files similar to those
  506. in arch/x86/cpu/baytrail which provide Bay Trail support.
  507. If you are not using an FSP you have more freedom and more responsibility.
  508. The ivybridge support works this way, although it still uses a ROM for
  509. graphics and still has binary blobs containing Intel code. You should aim to
  510. support all important peripherals on your platform including video and storage.
  511. Use the device tree for configuration where possible.
  512. For the microcode you can create a suitable device tree file using the
  513. microcode tool:
  514. ./tools/microcode-tool -d microcode.dat -m <model> create
  515. or if you only have header files and not the full Intel microcode.dat database:
  516. ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
  517. -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
  518. -m all create
  519. These are written to arch/x86/dts/microcode/ by default.
  520. Note that it is possible to just add the micrcode for your CPU if you know its
  521. model. U-Boot prints this information when it starts
  522. CPU: x86_64, vendor Intel, device 30673h
  523. so here we can use the M0130673322 file.
  524. If you platform can display POST codes on two little 7-segment displays on
  525. the board, then you can use post_code() calls from C or assembler to monitor
  526. boot progress. This can be good for debugging.
  527. If not, you can try to get serial working as early as possible. The early
  528. debug serial port may be useful here. See setup_early_uart() for an example.
  529. During the U-Boot porting, one of the important steps is to write correct PIRQ
  530. routing information in the board device tree. Without it, device drivers in the
  531. Linux kernel won't function correctly due to interrupt is not working. Please
  532. refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router.
  533. Here we have more details on the intel,pirq-routing property below.
  534. intel,pirq-routing = <
  535. PCI_BDF(0, 2, 0) INTA PIRQA
  536. ...
  537. >;
  538. As you see each entry has 3 cells. For the first one, we need describe all pci
  539. devices mounted on the board. For SoC devices, normally there is a chapter on
  540. the chipset datasheet which lists all the available PCI devices. For example on
  541. Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
  542. can get the interrupt pin either from datasheet or hardware via U-Boot shell.
  543. The reliable source is the hardware as sometimes chipset datasheet is not 100%
  544. up-to-date. Type 'pci header' plus the device's pci bus/device/function number
  545. from U-Boot shell below.
  546. => pci header 0.1e.1
  547. vendor ID = 0x8086
  548. device ID = 0x0f08
  549. ...
  550. interrupt line = 0x09
  551. interrupt pin = 0x04
  552. ...
  553. It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
  554. register. Repeat this until you get interrupt pins for all the devices. The last
  555. cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
  556. chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
  557. can be changed by registers in LPC bridge. So far Intel FSP does not touch those
  558. registers so we can write down the PIRQ according to the default mapping rule.
  559. Once we get the PIRQ routing information in the device tree, the interrupt
  560. allocation and assignment will be done by U-Boot automatically. Now you can
  561. enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
  562. CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
  563. This script might be useful. If you feed it the output of 'pci long' from
  564. U-Boot then it will generate a device tree fragment with the interrupt
  565. configuration for each device (note it needs gawk 4.0.0):
  566. $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
  567. /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
  568. {patsplit(device, bdf, "[0-9a-f]+"); \
  569. printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
  570. strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
  571. Example output:
  572. PCI_BDF(0, 2, 0) INTA PIRQA
  573. PCI_BDF(0, 3, 0) INTA PIRQA
  574. ...
  575. Porting Hints
  576. -------------
  577. Quark-specific considerations:
  578. To port U-Boot to other boards based on the Intel Quark SoC, a few things need
  579. to be taken care of. The first important part is the Memory Reference Code (MRC)
  580. parameters. Quark MRC supports memory-down configuration only. All these MRC
  581. parameters are supplied via the board device tree. To get started, first copy
  582. the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then
  583. change these values by consulting board manuals or your hardware vendor.
  584. Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h.
  585. The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports,
  586. but by default they are held in reset after power on. In U-Boot, PCIe
  587. initialization is properly handled as per Quark's firmware writer guide.
  588. In your board support codes, you need provide two routines to aid PCIe
  589. initialization, which are board_assert_perst() and board_deassert_perst().
  590. The two routines need implement a board-specific mechanism to assert/deassert
  591. PCIe PERST# pin. Care must be taken that in those routines that any APIs that
  592. may trigger PCI enumeration process are strictly forbidden, as any access to
  593. PCIe root port's configuration registers will cause system hang while it is
  594. held in reset. For more details, check how they are implemented by the Intel
  595. Galileo board support codes in board/intel/galileo/galileo.c.
  596. TODO List
  597. ---------
  598. - Audio
  599. - Chrome OS verified boot
  600. - SMI and ACPI support, to provide platform info and facilities to Linux
  601. References
  602. ----------
  603. [1] http://www.coreboot.org
  604. [2] http://www.qemu.org
  605. [3] http://www.coreboot.org/~stepan/pci8086,0166.rom
  606. [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
  607. [5] http://www.intel.com/fsp
  608. [6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
  609. [7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
  610. [8] http://en.wikipedia.org/wiki/Microcode
  611. [9] http://simplefirmware.org
  612. [10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
  613. [11] https://en.wikipedia.org/wiki/GUID_Partition_Table
  614. [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
  615. [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
  616. [14] doc/device-tree-bindings/misc/intel,irq-router.txt