sf_probe.c 12 KB

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  1. /*
  2. * SPI flash probing
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <dm.h>
  12. #include <errno.h>
  13. #include <fdtdec.h>
  14. #include <malloc.h>
  15. #include <mapmem.h>
  16. #include <spi.h>
  17. #include <spi_flash.h>
  18. #include <asm/io.h>
  19. #include "sf_internal.h"
  20. DECLARE_GLOBAL_DATA_PTR;
  21. /* Read commands array */
  22. static u8 spi_read_cmds_array[] = {
  23. CMD_READ_ARRAY_SLOW,
  24. CMD_READ_ARRAY_FAST,
  25. CMD_READ_DUAL_OUTPUT_FAST,
  26. CMD_READ_DUAL_IO_FAST,
  27. CMD_READ_QUAD_OUTPUT_FAST,
  28. CMD_READ_QUAD_IO_FAST,
  29. };
  30. #ifdef CONFIG_SPI_FLASH_MACRONIX
  31. static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
  32. {
  33. u8 qeb_status;
  34. int ret;
  35. ret = spi_flash_cmd_read_status(flash, &qeb_status);
  36. if (ret < 0)
  37. return ret;
  38. if (qeb_status & STATUS_QEB_MXIC) {
  39. debug("SF: mxic: QEB is already set\n");
  40. } else {
  41. ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
  42. if (ret < 0)
  43. return ret;
  44. }
  45. return ret;
  46. }
  47. #endif
  48. #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  49. static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
  50. {
  51. u8 qeb_status;
  52. int ret;
  53. ret = spi_flash_cmd_read_config(flash, &qeb_status);
  54. if (ret < 0)
  55. return ret;
  56. if (qeb_status & STATUS_QEB_WINSPAN) {
  57. debug("SF: winspan: QEB is already set\n");
  58. } else {
  59. ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
  60. if (ret < 0)
  61. return ret;
  62. }
  63. return ret;
  64. }
  65. #endif
  66. static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
  67. {
  68. switch (idcode0) {
  69. #ifdef CONFIG_SPI_FLASH_MACRONIX
  70. case SPI_FLASH_CFI_MFR_MACRONIX:
  71. return spi_flash_set_qeb_mxic(flash);
  72. #endif
  73. #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  74. case SPI_FLASH_CFI_MFR_SPANSION:
  75. case SPI_FLASH_CFI_MFR_WINBOND:
  76. return spi_flash_set_qeb_winspan(flash);
  77. #endif
  78. #ifdef CONFIG_SPI_FLASH_STMICRO
  79. case SPI_FLASH_CFI_MFR_STMICRO:
  80. debug("SF: QEB is volatile for %02x flash\n", idcode0);
  81. return 0;
  82. #endif
  83. default:
  84. printf("SF: Need set QEB func for %02x flash\n", idcode0);
  85. return -1;
  86. }
  87. }
  88. static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
  89. struct spi_flash *flash)
  90. {
  91. const struct spi_flash_params *params;
  92. u8 cmd;
  93. u16 jedec = idcode[1] << 8 | idcode[2];
  94. u16 ext_jedec = idcode[3] << 8 | idcode[4];
  95. /* Validate params from spi_flash_params table */
  96. params = spi_flash_params_table;
  97. for (; params->name != NULL; params++) {
  98. if ((params->jedec >> 16) == idcode[0]) {
  99. if ((params->jedec & 0xFFFF) == jedec) {
  100. if (params->ext_jedec == 0)
  101. break;
  102. else if (params->ext_jedec == ext_jedec)
  103. break;
  104. }
  105. }
  106. }
  107. if (!params->name) {
  108. printf("SF: Unsupported flash IDs: ");
  109. printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
  110. idcode[0], jedec, ext_jedec);
  111. return -EPROTONOSUPPORT;
  112. }
  113. /* Assign spi data */
  114. flash->spi = spi;
  115. flash->name = params->name;
  116. flash->memory_map = spi->memory_map;
  117. flash->dual_flash = flash->spi->option;
  118. #ifdef CONFIG_DM_SPI_FLASH
  119. flash->flags = params->flags;
  120. #endif
  121. /* Assign spi_flash ops */
  122. #ifndef CONFIG_DM_SPI_FLASH
  123. flash->write = spi_flash_cmd_write_ops;
  124. #if defined(CONFIG_SPI_FLASH_SST)
  125. if (params->flags & SST_WR) {
  126. if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
  127. flash->write = sst_write_bp;
  128. else
  129. flash->write = sst_write_wp;
  130. }
  131. #endif
  132. flash->erase = spi_flash_cmd_erase_ops;
  133. flash->read = spi_flash_cmd_read_ops;
  134. #endif
  135. /* Compute the flash size */
  136. flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
  137. /*
  138. * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
  139. * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
  140. * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
  141. * have 256b pages.
  142. */
  143. if (ext_jedec == 0x4d00) {
  144. if ((jedec == 0x0215) || (jedec == 0x216))
  145. flash->page_size = 256;
  146. else
  147. flash->page_size = 512;
  148. } else {
  149. flash->page_size = 256;
  150. }
  151. flash->page_size <<= flash->shift;
  152. flash->sector_size = params->sector_size << flash->shift;
  153. flash->size = flash->sector_size * params->nr_sectors << flash->shift;
  154. #ifdef CONFIG_SF_DUAL_FLASH
  155. if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
  156. flash->size <<= 1;
  157. #endif
  158. /* Compute erase sector and command */
  159. if (params->flags & SECT_4K) {
  160. flash->erase_cmd = CMD_ERASE_4K;
  161. flash->erase_size = 4096 << flash->shift;
  162. } else if (params->flags & SECT_32K) {
  163. flash->erase_cmd = CMD_ERASE_32K;
  164. flash->erase_size = 32768 << flash->shift;
  165. } else {
  166. flash->erase_cmd = CMD_ERASE_64K;
  167. flash->erase_size = flash->sector_size;
  168. }
  169. /* Now erase size becomes valid sector size */
  170. flash->sector_size = flash->erase_size;
  171. /* Look for the fastest read cmd */
  172. cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
  173. if (cmd) {
  174. cmd = spi_read_cmds_array[cmd - 1];
  175. flash->read_cmd = cmd;
  176. } else {
  177. /* Go for default supported read cmd */
  178. flash->read_cmd = CMD_READ_ARRAY_FAST;
  179. }
  180. /* Not require to look for fastest only two write cmds yet */
  181. if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
  182. flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
  183. else
  184. /* Go for default supported write cmd */
  185. flash->write_cmd = CMD_PAGE_PROGRAM;
  186. /* Read dummy_byte: dummy byte is determined based on the
  187. * dummy cycles of a particular command.
  188. * Fast commands - dummy_byte = dummy_cycles/8
  189. * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
  190. * For I/O commands except cmd[0] everything goes on no.of lines
  191. * based on particular command but incase of fast commands except
  192. * data all go on single line irrespective of command.
  193. */
  194. switch (flash->read_cmd) {
  195. case CMD_READ_QUAD_IO_FAST:
  196. flash->dummy_byte = 2;
  197. break;
  198. case CMD_READ_ARRAY_SLOW:
  199. flash->dummy_byte = 0;
  200. break;
  201. default:
  202. flash->dummy_byte = 1;
  203. }
  204. /* Poll cmd selection */
  205. flash->poll_cmd = CMD_READ_STATUS;
  206. #ifdef CONFIG_SPI_FLASH_STMICRO
  207. if (params->flags & E_FSR)
  208. flash->poll_cmd = CMD_FLAG_STATUS;
  209. #endif
  210. /* Configure the BAR - discover bank cmds and read current bank */
  211. #ifdef CONFIG_SPI_FLASH_BAR
  212. u8 curr_bank = 0;
  213. if (flash->size > SPI_FLASH_16MB_BOUN) {
  214. int ret;
  215. flash->bank_read_cmd = (idcode[0] == 0x01) ?
  216. CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
  217. flash->bank_write_cmd = (idcode[0] == 0x01) ?
  218. CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
  219. ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
  220. &curr_bank, 1);
  221. if (ret) {
  222. debug("SF: fail to read bank addr register\n");
  223. return ret;
  224. }
  225. flash->bank_curr = curr_bank;
  226. } else {
  227. flash->bank_curr = curr_bank;
  228. }
  229. #endif
  230. /* Flash powers up read-only, so clear BP# bits */
  231. #if defined(CONFIG_SPI_FLASH_ATMEL) || \
  232. defined(CONFIG_SPI_FLASH_MACRONIX) || \
  233. defined(CONFIG_SPI_FLASH_SST)
  234. spi_flash_cmd_write_status(flash, 0);
  235. #endif
  236. return 0;
  237. }
  238. #if CONFIG_IS_ENABLED(OF_CONTROL)
  239. int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
  240. {
  241. fdt_addr_t addr;
  242. fdt_size_t size;
  243. int node;
  244. /* If there is no node, do nothing */
  245. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  246. if (node < 0)
  247. return 0;
  248. addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
  249. if (addr == FDT_ADDR_T_NONE) {
  250. debug("%s: Cannot decode address\n", __func__);
  251. return 0;
  252. }
  253. if (flash->size != size) {
  254. debug("%s: Memory map must cover entire device\n", __func__);
  255. return -1;
  256. }
  257. flash->memory_map = map_sysmem(addr, size);
  258. return 0;
  259. }
  260. #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
  261. /**
  262. * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
  263. *
  264. * @spi: Bus to probe
  265. * @flashp: Pointer to place to put flash info, which may be NULL if the
  266. * space should be allocated
  267. */
  268. int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
  269. {
  270. u8 idcode[5];
  271. int ret;
  272. /* Setup spi_slave */
  273. if (!spi) {
  274. printf("SF: Failed to set up slave\n");
  275. return -ENODEV;
  276. }
  277. /* Claim spi bus */
  278. ret = spi_claim_bus(spi);
  279. if (ret) {
  280. debug("SF: Failed to claim SPI bus: %d\n", ret);
  281. return ret;
  282. }
  283. /* Read the ID codes */
  284. ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
  285. if (ret) {
  286. printf("SF: Failed to get idcodes\n");
  287. goto err_read_id;
  288. }
  289. #ifdef DEBUG
  290. printf("SF: Got idcodes\n");
  291. print_buffer(0, idcode, 1, sizeof(idcode), 0);
  292. #endif
  293. if (spi_flash_validate_params(spi, idcode, flash)) {
  294. ret = -EINVAL;
  295. goto err_read_id;
  296. }
  297. /* Set the quad enable bit - only for quad commands */
  298. if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
  299. (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
  300. (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
  301. if (spi_flash_set_qeb(flash, idcode[0])) {
  302. debug("SF: Fail to set QEB for %02x\n", idcode[0]);
  303. ret = -EINVAL;
  304. goto err_read_id;
  305. }
  306. }
  307. #if CONFIG_IS_ENABLED(OF_CONTROL)
  308. if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
  309. debug("SF: FDT decode error\n");
  310. ret = -EINVAL;
  311. goto err_read_id;
  312. }
  313. #endif
  314. #ifndef CONFIG_SPL_BUILD
  315. printf("SF: Detected %s with page size ", flash->name);
  316. print_size(flash->page_size, ", erase size ");
  317. print_size(flash->erase_size, ", total ");
  318. print_size(flash->size, "");
  319. if (flash->memory_map)
  320. printf(", mapped at %p", flash->memory_map);
  321. puts("\n");
  322. #endif
  323. #ifndef CONFIG_SPI_FLASH_BAR
  324. if (((flash->dual_flash == SF_SINGLE_FLASH) &&
  325. (flash->size > SPI_FLASH_16MB_BOUN)) ||
  326. ((flash->dual_flash > SF_SINGLE_FLASH) &&
  327. (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
  328. puts("SF: Warning - Only lower 16MiB accessible,");
  329. puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
  330. }
  331. #endif
  332. #ifdef CONFIG_SPI_FLASH_MTD
  333. ret = spi_flash_mtd_register(flash);
  334. #endif
  335. err_read_id:
  336. spi_release_bus(spi);
  337. return ret;
  338. }
  339. #ifndef CONFIG_DM_SPI_FLASH
  340. struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
  341. {
  342. struct spi_flash *flash;
  343. /* Allocate space if needed (not used by sf-uclass */
  344. flash = calloc(1, sizeof(*flash));
  345. if (!flash) {
  346. debug("SF: Failed to allocate spi_flash\n");
  347. return NULL;
  348. }
  349. if (spi_flash_probe_slave(bus, flash)) {
  350. spi_free_slave(bus);
  351. free(flash);
  352. return NULL;
  353. }
  354. return flash;
  355. }
  356. struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
  357. unsigned int max_hz, unsigned int spi_mode)
  358. {
  359. struct spi_slave *bus;
  360. bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
  361. if (!bus)
  362. return NULL;
  363. return spi_flash_probe_tail(bus);
  364. }
  365. #ifdef CONFIG_OF_SPI_FLASH
  366. struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
  367. int spi_node)
  368. {
  369. struct spi_slave *bus;
  370. bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
  371. if (!bus)
  372. return NULL;
  373. return spi_flash_probe_tail(bus);
  374. }
  375. #endif
  376. void spi_flash_free(struct spi_flash *flash)
  377. {
  378. #ifdef CONFIG_SPI_FLASH_MTD
  379. spi_flash_mtd_unregister();
  380. #endif
  381. spi_free_slave(flash->spi);
  382. free(flash);
  383. }
  384. #else /* defined CONFIG_DM_SPI_FLASH */
  385. static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
  386. void *buf)
  387. {
  388. struct spi_flash *flash = dev_get_uclass_priv(dev);
  389. return spi_flash_cmd_read_ops(flash, offset, len, buf);
  390. }
  391. int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
  392. const void *buf)
  393. {
  394. struct spi_flash *flash = dev_get_uclass_priv(dev);
  395. #if defined(CONFIG_SPI_FLASH_SST)
  396. if (flash->flags & SST_WR) {
  397. if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
  398. return sst_write_bp(flash, offset, len, buf);
  399. else
  400. return sst_write_wp(flash, offset, len, buf);
  401. }
  402. #endif
  403. return spi_flash_cmd_write_ops(flash, offset, len, buf);
  404. }
  405. int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
  406. {
  407. struct spi_flash *flash = dev_get_uclass_priv(dev);
  408. return spi_flash_cmd_erase_ops(flash, offset, len);
  409. }
  410. int spi_flash_std_probe(struct udevice *dev)
  411. {
  412. struct spi_slave *slave = dev_get_parent_priv(dev);
  413. struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
  414. struct spi_flash *flash;
  415. flash = dev_get_uclass_priv(dev);
  416. flash->dev = dev;
  417. debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
  418. return spi_flash_probe_slave(slave, flash);
  419. }
  420. static const struct dm_spi_flash_ops spi_flash_std_ops = {
  421. .read = spi_flash_std_read,
  422. .write = spi_flash_std_write,
  423. .erase = spi_flash_std_erase,
  424. };
  425. static const struct udevice_id spi_flash_std_ids[] = {
  426. { .compatible = "spi-flash" },
  427. { }
  428. };
  429. U_BOOT_DRIVER(spi_flash_std) = {
  430. .name = "spi_flash_std",
  431. .id = UCLASS_SPI_FLASH,
  432. .of_match = spi_flash_std_ids,
  433. .probe = spi_flash_std_probe,
  434. .priv_auto_alloc_size = sizeof(struct spi_flash),
  435. .ops = &spi_flash_std_ops,
  436. };
  437. #endif /* CONFIG_DM_SPI_FLASH */