README.uniphier 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149
  1. U-Boot for UniPhier SoC family
  2. ==============================
  3. Tested toolchains
  4. -----------------
  5. (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-)
  6. If you are building U-Boot on Ubuntu, its standard package is recommended.
  7. You can install it as follows:
  8. $ sudo apt-get install gcc-arm-linux-gnueabi-
  9. (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-)
  10. You can download pre-built toolchains from:
  11. http://www.linaro.org/downloads/
  12. (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
  13. You can download pre-built toolchains from:
  14. ftp://www.kernel.org/pub/tools/crosstool/files/bin/
  15. Compile the source
  16. ------------------
  17. PH1-sLD3 reference board:
  18. $ make uniphier_sld3_defconfig
  19. $ make CROSS_COMPILE=arm-linux-gnueabi-
  20. PH1-LD4 reference board:
  21. $ make uniphier_ld4_sld8_defconfig
  22. $ make CROSS_COMPILE=arm-linux-gnueabi-
  23. PH1-sLD8 reference board:
  24. $ make uniphier_ld4_sld8_defconfig
  25. $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref
  26. PH1-Pro4 reference board:
  27. $ make uniphier_pro4_defconfig
  28. $ make CROSS_COMPILE=arm-linux-gnueabi-
  29. PH1-Pro5 4KBOX Board:
  30. $ make uniphier_pro5_defconfig
  31. $ make CROSS_COMPILE=arm-linux-gnueabi-
  32. ProXstream2 Gentil board:
  33. $ make uniphier_pxs2_ld6b_defconfig
  34. $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil
  35. ProXstream2 Vodka board:
  36. $ make uniphier_pxs2_ld6b_defconfig
  37. $ make CROSS_COMPILE=arm-linux-gnueabi-
  38. PH1-LD6b reference board:
  39. $ make uniphier_pxs2_ld6b_defconfig
  40. $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref
  41. You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
  42. to use your favorite compiler.
  43. Burn U-Boot images to NAND
  44. --------------------------
  45. Write two files to the NAND device as follows:
  46. - spl/u-boot-spl.bin at the offset address 0x00000000
  47. - u-boot.img at the offset address 0x00010000
  48. If a TFTP server is available, the images can be easily updated.
  49. Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
  50. directory, and then run the following command at the U-Boot command line:
  51. => run nandupdate
  52. UniPhier specific commands
  53. --------------------------
  54. - pinmon (enabled by CONFIG_CMD_PINMON)
  55. shows the boot mode pins that has been latched at the power-on reset
  56. - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
  57. shows the DDR PHY parameters set by the PHY training
  58. Supported devices
  59. -----------------
  60. - UART (on-chip)
  61. - NAND
  62. - USB 2.0 (EHCI)
  63. - USB 3.0 (xHCI)
  64. - GPIO
  65. - LAN (on-board SMSC9118)
  66. - I2C
  67. - EEPROM (connected to the on-board I2C bus)
  68. - Support card (SRAM, NOR flash, some peripherals)
  69. Micro Support Card
  70. ------------------
  71. The recommended bit switch settings are as follows:
  72. SW2 OFF(1)/ON(0) Description
  73. ------------------------------------------
  74. bit 1 <---- BKSZ[0]
  75. bit 2 ----> BKSZ[1]
  76. bit 3 <---- SoC Bus Width 16/32
  77. bit 4 <---- SERIAL_SEL[0]
  78. bit 5 ----> SERIAL_SEL[1]
  79. bit 6 ----> BOOTSWAP_EN
  80. bit 7 <---- CS1/CS5
  81. bit 8 <---- SOC_SERIAL_DISABLE
  82. SW8 OFF(1)/ON(0) Description
  83. ------------------------------------------
  84. bit 1 <---- CS1_SPLIT
  85. bit 2 <---- CASE9_ON
  86. bit 3 <---- CASE10_ON
  87. bit 4 Don't Care Reserve
  88. bit 5 Don't Care Reserve
  89. bit 6 Don't Care Reserve
  90. bit 7 ----> BURST_EN
  91. bit 8 ----> FLASHBUS32_16
  92. The BKSZ[1:0] specifies the address range of memory slot and peripherals
  93. as follows:
  94. BKSZ Description RAM slot Peripherals
  95. --------------------------------------------------------------------
  96. 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff
  97. 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff
  98. 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff
  99. 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff
  100. Set BSKZ[1:0] to 0b01 for U-Boot.
  101. This mode is the most handy because EA[24] is always supported by the save pin
  102. mode of the system bus. On the other hand, EA[25] is not supported for some
  103. newer SoCs. Even if it is, EA[25] is not connected on most of the boards.
  104. --
  105. Masahiro Yamada <yamada.masahiro@socionext.com>
  106. Feb. 2016