cpu.c 2.7 KB

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  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. #include <common.h>
  12. #include <watchdog.h>
  13. #include <command.h>
  14. #include <netdev.h>
  15. #include <asm/immap.h>
  16. #include <asm/io.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  19. {
  20. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  21. out_be16(&gptmr->pre, 10);
  22. out_be16(&gptmr->cnt, 1);
  23. /* enable watchdog, set timeout to 0 and wait */
  24. out_8(&gptmr->mode, GPT_TMS_SGPIO);
  25. out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE);
  26. /* we don't return! */
  27. return 1;
  28. };
  29. #if defined(CONFIG_DISPLAY_CPUINFO)
  30. int print_cpuinfo(void)
  31. {
  32. siu_t *siu = (siu_t *) MMAP_SIU;
  33. u16 id = 0;
  34. puts("CPU: ");
  35. switch ((in_be32(&siu->jtagid) & 0x000FF000) >> 12) {
  36. case 0x0C:
  37. id = 5485;
  38. break;
  39. case 0x0D:
  40. id = 5484;
  41. break;
  42. case 0x0E:
  43. id = 5483;
  44. break;
  45. case 0x0F:
  46. id = 5482;
  47. break;
  48. case 0x10:
  49. id = 5481;
  50. break;
  51. case 0x11:
  52. id = 5480;
  53. break;
  54. case 0x12:
  55. id = 5475;
  56. break;
  57. case 0x13:
  58. id = 5474;
  59. break;
  60. case 0x14:
  61. id = 5473;
  62. break;
  63. case 0x15:
  64. id = 5472;
  65. break;
  66. case 0x16:
  67. id = 5471;
  68. break;
  69. case 0x17:
  70. id = 5470;
  71. break;
  72. }
  73. if (id) {
  74. char buf1[32], buf2[32];
  75. printf("Freescale MCF%d\n", id);
  76. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  77. strmhz(buf1, gd->cpu_clk),
  78. strmhz(buf2, gd->bus_clk));
  79. }
  80. return 0;
  81. };
  82. #endif /* CONFIG_DISPLAY_CPUINFO */
  83. #if defined(CONFIG_HW_WATCHDOG)
  84. /* Called by macro WATCHDOG_RESET */
  85. void hw_watchdog_reset(void)
  86. {
  87. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  88. out_8(&gptmr->ocpw, 0xa5);
  89. }
  90. int watchdog_disable(void)
  91. {
  92. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  93. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  94. out_8(&gptmr->mode, 0);
  95. out_8(&gptmr->ctrl, 0);
  96. puts("WATCHDOG:disabled\n");
  97. return (0);
  98. }
  99. int watchdog_init(void)
  100. {
  101. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  102. out_be16(&gptmr->pre, CONFIG_WATCHDOG_TIMEOUT);
  103. out_be16(&gptmr->cnt, CONFIG_SYS_TIMER_PRESCALER * 1000);
  104. out_8(&gptmr->mode, GPT_TMS_SGPIO);
  105. out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN);
  106. puts("WATCHDOG:enabled\n");
  107. return (0);
  108. }
  109. #endif /* CONFIG_HW_WATCHDOG */
  110. #if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC)
  111. /* Default initializations for MCFFEC controllers. To override,
  112. * create a board-specific function called:
  113. * int board_eth_init(bd_t *bis)
  114. */
  115. int cpu_eth_init(bd_t *bis)
  116. {
  117. #if defined(CONFIG_FSLDMAFEC)
  118. mcdmafec_initialize(bis);
  119. #endif
  120. #if defined(CONFIG_MCFFEC)
  121. mcffec_initialize(bis);
  122. #endif
  123. return 0;
  124. }
  125. #endif