cpu.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154
  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. #include <common.h>
  12. #include <watchdog.h>
  13. #include <command.h>
  14. #include <netdev.h>
  15. #include <asm/immap.h>
  16. #include <asm/io.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  19. {
  20. rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  21. udelay(1000);
  22. setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
  23. /* we don't return! */
  24. return 0;
  25. };
  26. #if defined(CONFIG_DISPLAY_CPUINFO)
  27. int print_cpuinfo(void)
  28. {
  29. ccm_t *ccm = (ccm_t *) MMAP_CCM;
  30. u16 msk;
  31. u16 id = 0;
  32. u8 ver;
  33. puts("CPU: ");
  34. msk = (in_be16(&ccm->cir) >> 6);
  35. ver = (in_be16(&ccm->cir) & 0x003f);
  36. switch (msk) {
  37. #ifdef CONFIG_MCF5301x
  38. case 0x78:
  39. id = 53010;
  40. break;
  41. case 0x77:
  42. id = 53012;
  43. break;
  44. case 0x76:
  45. id = 53015;
  46. break;
  47. case 0x74:
  48. id = 53011;
  49. break;
  50. case 0x73:
  51. id = 53013;
  52. break;
  53. #endif
  54. #ifdef CONFIG_MCF532x
  55. case 0x54:
  56. id = 5329;
  57. break;
  58. case 0x59:
  59. id = 5328;
  60. break;
  61. case 0x61:
  62. id = 5327;
  63. break;
  64. case 0x65:
  65. id = 5373;
  66. break;
  67. case 0x68:
  68. id = 53721;
  69. break;
  70. case 0x69:
  71. id = 5372;
  72. break;
  73. case 0x6B:
  74. id = 5372;
  75. break;
  76. #endif
  77. }
  78. if (id) {
  79. char buf1[32], buf2[32];
  80. printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  81. ver);
  82. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  83. strmhz(buf1, gd->cpu_clk),
  84. strmhz(buf2, gd->bus_clk));
  85. }
  86. return 0;
  87. };
  88. #endif /* CONFIG_DISPLAY_CPUINFO */
  89. #if defined(CONFIG_WATCHDOG)
  90. /* Called by macro WATCHDOG_RESET */
  91. void watchdog_reset(void)
  92. {
  93. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  94. /* Count register */
  95. out_be16(&wdp->sr, 0x5555);
  96. out_be16(&wdp->sr, 0xaaaa);
  97. }
  98. int watchdog_disable(void)
  99. {
  100. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  101. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  102. /* halted watchdog timer */
  103. setbits_be16(&wdp->cr, WTM_WCR_HALTED);
  104. puts("WATCHDOG:disabled\n");
  105. return (0);
  106. }
  107. int watchdog_init(void)
  108. {
  109. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  110. u32 wdog_module = 0;
  111. /* set timeout and enable watchdog */
  112. wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
  113. #ifdef CONFIG_M5329
  114. out_be16(&wdp->mr, wdog_module / 8192);
  115. #else
  116. out_be16(&wdp->mr, wdog_module / 4096);
  117. #endif
  118. out_be16(&wdp->cr, WTM_WCR_EN);
  119. puts("WATCHDOG:enabled\n");
  120. return (0);
  121. }
  122. #endif /* CONFIG_WATCHDOG */
  123. #if defined(CONFIG_MCFFEC)
  124. /* Default initializations for MCFFEC controllers. To override,
  125. * create a board-specific function called:
  126. * int board_eth_init(bd_t *bis)
  127. */
  128. int cpu_eth_init(bd_t *bis)
  129. {
  130. return mcffec_initialize(bis);
  131. }
  132. #endif