iomux-v3.c 2.3 KB

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  1. /*
  2. * Based on the iomux-v3.c from Linux kernel:
  3. * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
  4. * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
  5. * <armlinux@phytec.de>
  6. *
  7. * Copyright (C) 2004-2011 Freescale Semiconductor, Inc.
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. #include <common.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/imx-regs.h>
  14. #if !defined(CONFIG_MX25) && !defined(CONFIG_VF610)
  15. #include <asm/arch/sys_proto.h>
  16. #endif
  17. #include <asm/imx-common/iomux-v3.h>
  18. static void *base = (void *)IOMUXC_BASE_ADDR;
  19. /*
  20. * configures a single pad in the iomuxer
  21. */
  22. void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
  23. {
  24. u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT;
  25. u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT;
  26. u32 sel_input_ofs =
  27. (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT;
  28. u32 sel_input =
  29. (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT;
  30. u32 pad_ctrl_ofs =
  31. (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT;
  32. u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT;
  33. #if defined CONFIG_MX6SL
  34. /* Check whether LVE bit needs to be set */
  35. if (pad_ctrl & PAD_CTL_LVE) {
  36. pad_ctrl &= ~PAD_CTL_LVE;
  37. pad_ctrl |= PAD_CTL_LVE_BIT;
  38. }
  39. #endif
  40. if (mux_ctrl_ofs)
  41. __raw_writel(mux_mode, base + mux_ctrl_ofs);
  42. if (sel_input_ofs)
  43. __raw_writel(sel_input, base + sel_input_ofs);
  44. #ifdef CONFIG_IOMUX_SHARE_CONF_REG
  45. if (!(pad_ctrl & NO_PAD_CTRL))
  46. __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl,
  47. base + pad_ctrl_ofs);
  48. #else
  49. if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
  50. __raw_writel(pad_ctrl, base + pad_ctrl_ofs);
  51. #endif
  52. }
  53. /* configures a list of pads within declared with IOMUX_PADS macro */
  54. void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
  55. unsigned count)
  56. {
  57. iomux_v3_cfg_t const *p = pad_list;
  58. int stride;
  59. int i;
  60. #if defined(CONFIG_MX6QDL)
  61. stride = 2;
  62. if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
  63. p += 1;
  64. #else
  65. stride = 1;
  66. #endif
  67. for (i = 0; i < count; i++) {
  68. imx_iomux_v3_setup_pad(*p);
  69. p += stride;
  70. }
  71. }
  72. void imx_iomux_set_gpr_register(int group, int start_bit,
  73. int num_bits, int value)
  74. {
  75. int i = 0;
  76. u32 reg;
  77. reg = readl(base + group * 4);
  78. while (num_bits) {
  79. reg &= ~(1<<(start_bit + i));
  80. i++;
  81. num_bits--;
  82. }
  83. reg |= (value << start_bit);
  84. writel(reg, base + group * 4);
  85. }