omap730p2.h 6.3 KB

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  1. /*
  2. * (C) Copyright 2003-2004
  3. * MPC Data Limited (http://www.mpc-data.co.uk)
  4. * Dave Peverley <dpeverley at mpc-data.co.uk>
  5. *
  6. * Configuation settings for the TI OMAP Perseus 2 board.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * If we are developing, we might want to start armboot from ram
  30. * so we MUST NOT initialize critical regs like mem-timing ...
  31. */
  32. #define CONFIG_INIT_CRITICAL /* undef for developing */
  33. /* allow to overwrite serial and ethaddr */
  34. #define CONFIG_ENV_OVERWRITE
  35. /*
  36. * High Level Configuration Options
  37. * (easy to change)
  38. */
  39. #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
  40. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  41. #define CONFIG_OMAP730 1 /* which is in a 730 */
  42. #define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */
  43. /*
  44. * Input clock of PLL
  45. * The OMAP730 Perseus 2 has 13MHz input clock
  46. */
  47. #define CONFIG_SYS_CLK_FREQ 13000000
  48. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  49. #define CONFIG_MISC_INIT_R
  50. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  51. #define CONFIG_SETUP_MEMORY_TAGS 1
  52. /*
  53. * Size of malloc() pool
  54. */
  55. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  56. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  57. /*
  58. * Hardware drivers
  59. */
  60. #define CONFIG_DRIVER_LAN91C96
  61. #define CONFIG_LAN91C96_BASE 0x04000300
  62. #define CONFIG_LAN91C96_EXT_PHY
  63. /*
  64. * NS16550 Configuration
  65. */
  66. #define CFG_NS16550
  67. #define CFG_NS16550_SERIAL
  68. #define CFG_NS16550_REG_SIZE (1)
  69. #define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
  70. #define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
  71. * on perseus */
  72. /*
  73. * select serial console configuration
  74. */
  75. #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */
  76. #define CONFIG_CONS_INDEX 1
  77. #define CONFIG_BAUDRATE 115200
  78. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  79. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
  80. #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
  81. /*
  82. * This must be included AFTER the definition of CONFIG_COMMANDS (if any)
  83. */
  84. #include <cmd_confdefs.h>
  85. #include <configs/omap730.h>
  86. #include <configs/h2_p2_dbg_board.h>
  87. #define CONFIG_BOOTDELAY 3
  88. #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
  89. #define CONFIG_LOADADDR 0x10000000
  90. #define CONFIG_ETHADDR
  91. #define CONFIG_NETMASK 255.255.255.0
  92. #define CONFIG_IPADDR 192.168.0.23
  93. #define CONFIG_SERVERIP 192.150.0.100
  94. #define CONFIG_BOOTFILE "uImage" /* File to load */
  95. #if defined (CONFIG_COMMANDS) && defined (CFG_CMD_KGDB)
  96. #define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
  97. #define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
  98. #endif
  99. /*
  100. * Miscellaneous configurable options
  101. */
  102. #define CFG_LONGHELP /* undef to save memory */
  103. #define CFG_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
  104. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  105. /* Print Buffer Size */
  106. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
  107. #define CFG_MAXARGS 16 /* max number of command args */
  108. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  109. #define CFG_MEMTEST_START 0x10000000 /* memtest works on */
  110. #define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
  111. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  112. #define CFG_LOAD_ADDR 0x10000000 /* default load address */
  113. /* The OMAP730 has 3 general purpose MPU timers, they can be driven by
  114. * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
  115. * local divisor.
  116. */
  117. #define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
  118. #define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
  119. #define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
  120. /*-----------------------------------------------------------------------
  121. * Stack sizes
  122. *
  123. * The stack sizes are set up in start.S using the settings below
  124. */
  125. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  126. #ifdef CONFIG_USE_IRQ
  127. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  128. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  129. #endif
  130. /*-----------------------------------------------------------------------
  131. * Physical Memory Map
  132. */
  133. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  134. #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
  135. #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
  136. #if defined(CONFIG_CS0_BOOT)
  137. #define PHYS_FLASH_1 0x0C000000
  138. #elif defined(CONFIG_CS3_BOOT)
  139. #define PHYS_FLASH_1 0x00000000
  140. #else
  141. #error Unknown Boot Chip-Select number
  142. #endif
  143. #define CFG_FLASH_BASE PHYS_FLASH_1
  144. /*-----------------------------------------------------------------------
  145. * FLASH and environment organization
  146. */
  147. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  148. #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
  149. #define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
  150. /* addr of environment */
  151. #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
  152. /* timeout values are in ticks */
  153. #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
  154. #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
  155. #define CFG_ENV_IS_IN_FLASH 1
  156. #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
  157. #define CFG_ENV_OFFSET 0x20000 /* environment starts here */
  158. #endif /* ! __CONFIG_H */