gcplus.h 6.2 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * 2003-2004 (c) MontaVista Software, Inc.
  7. *
  8. * Configuation settings for the ADS GraphicsClient+ board.
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #ifndef __CONFIG_H
  29. #define __CONFIG_H
  30. #undef DEBUG
  31. /*
  32. * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
  33. * We don't actually init RAM in this case since we're using U-Boot as
  34. * an secondary boot loader during Linux kernel development and testing,
  35. * e.g. bootp/tftp download of the kernel is a far more convenient
  36. * when testing new kernels on this target. However the ADS GCPlus Linux
  37. * boot ROM leaves the MMU enabled when it passes control to U-Boot. So
  38. * we use memsetup (CONFIG_INIT_CRITICAL) to remedy that problem.
  39. */
  40. #define CONFIG_INIT_CRITICAL
  41. /*
  42. * High Level Configuration Options
  43. * (easy to change)
  44. */
  45. #define CONFIG_SA1110 1 /* This is an SA1100 CPU */
  46. #define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
  47. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  48. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  49. #define CONFIG_SETUP_MEMORY_TAGS 1
  50. #define CONFIG_INITRD_TAG 1
  51. /*
  52. * Size of malloc() pool
  53. */
  54. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  55. #define CFG_GBL_DATA_SIZE 128 /* size rsrvd for initial data */
  56. /*
  57. * Hardware drivers
  58. */
  59. #define CONFIG_DRIVER_LAN91C96 /* we have an SMC9194 on-board */
  60. #define CONFIG_LAN91C96_BASE 0x100e0000
  61. /*
  62. * select serial console configuration
  63. */
  64. #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
  65. /* allow to overwrite serial and ethaddr */
  66. #define CONFIG_ENV_OVERWRITE
  67. #define CONFIG_BAUDRATE 38400
  68. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
  69. #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
  70. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  71. #include <cmd_confdefs.h>
  72. #define CONFIG_BOOTDELAY 3
  73. #define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
  74. #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
  75. #define CFG_AUTOLOAD "n" /* No autoload */
  76. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  77. #define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
  78. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  79. #endif
  80. /*
  81. * Miscellaneous configurable options
  82. */
  83. #define CFG_LONGHELP /* undef to save memory */
  84. #define CFG_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
  85. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  86. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  87. #define CFG_MAXARGS 16 /* max number of command args */
  88. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  89. #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
  90. #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
  91. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  92. #define CFG_LOAD_ADDR 0xc0000000 /* default load address */
  93. #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
  94. #define CFG_CPUSPEED 0x0a /* set core clock to 206MHz */
  95. /* valid baudrates */
  96. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  97. /*-----------------------------------------------------------------------
  98. * Stack sizes
  99. *
  100. * The stack sizes are set up in start.S using the settings below
  101. */
  102. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  103. #ifdef CONFIG_USE_IRQ
  104. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  105. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  106. #endif
  107. /*-----------------------------------------------------------------------
  108. * Physical Memory Map
  109. */
  110. #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
  111. #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
  112. #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
  113. #define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
  114. #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
  115. #define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
  116. #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
  117. #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
  118. #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
  119. #define CFG_FLASH_BASE PHYS_FLASH_1
  120. /*-----------------------------------------------------------------------
  121. * FLASH and environment organization
  122. */
  123. #if 1
  124. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  125. #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
  126. /* timeout values are in ticks */
  127. #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
  128. #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
  129. #else
  130. /* REVISIT: This doesn't work on ADS GCPlus just yet: */
  131. #define CFG_FLASH_CFI 1 /* flash is CFI conformant */
  132. #define CFG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
  133. #define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
  134. #define CFG_MAX_FLASH_BANKS 1 /* max # of memory banks */
  135. #define CFG_FLASH_INCREMENT 0 /* there is only one bank */
  136. #define CFG_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
  137. /*#define CFG_FLASH_PROTECTION 1 /--* hardware flash protection */
  138. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  139. #endif
  140. #define CFG_ENV_IS_IN_FLASH 1
  141. #define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
  142. #define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE
  143. #endif /* __CONFIG_H */