mx7_plugin.S 2.7 KB

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  1. /*
  2. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <config.h>
  7. #define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
  8. #define ROM_VERSION_OFFSET 0x80
  9. #define ROM_API_HWCNFG_SETUP_OFFSET 0x08
  10. plugin_start:
  11. push {r0-r4, lr}
  12. imx7_ddr_setting
  13. imx7_clock_gating
  14. imx7_qos_setting
  15. /*
  16. * Check if we are in USB serial download mode and immediately return to ROM
  17. * Need to check USB CTRL clock firstly, then check the USBx_nASYNCLISTADDR
  18. */
  19. ldr r0, =0x30384680
  20. ldr r1, [r0]
  21. cmp r1, #0
  22. beq normal_boot
  23. ldr r0, =0x30B10158
  24. ldr r1, [r0]
  25. cmp r1, #0
  26. beq normal_boot
  27. pop {r0-r4, lr}
  28. bx lr
  29. normal_boot:
  30. /*
  31. * The following is to fill in those arguments for this ROM function
  32. * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
  33. * This function is used to copy data from the storage media into DDR.
  34. * start - Initial (possibly partial) image load address on entry.
  35. * Final image load address on exit.
  36. * bytes - Initial (possibly partial) image size on entry.
  37. * Final image size on exit.
  38. * boot_data - Initial @ref ivt Boot Data load address.
  39. */
  40. adr r0, boot_data2
  41. adr r1, image_len2
  42. adr r2, boot_data2
  43. /*
  44. * check the _pu_irom_api_table for the address
  45. */
  46. before_calling_rom___pu_irom_hwcnfg_setup:
  47. ldr r3, =ROM_VERSION_OFFSET
  48. ldr r4, [r3]
  49. ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
  50. ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
  51. blx r4
  52. after_calling_rom___pu_irom_hwcnfg_setup:
  53. /* To return to ROM from plugin, we need to fill in these argument.
  54. * Here is what need to do:
  55. * Need to construct the paramters for this function before return to ROM:
  56. * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
  57. */
  58. pop {r0-r4, lr}
  59. push {r5}
  60. ldr r5, boot_data2
  61. str r5, [r0]
  62. ldr r5, image_len2
  63. str r5, [r1]
  64. ldr r5, second_ivt_offset
  65. str r5, [r2]
  66. mov r0, #1
  67. pop {r5}
  68. /* return back to ROM code */
  69. bx lr
  70. /* make the following data right in the end of the output*/
  71. .ltorg
  72. #define FLASH_OFFSET 0x400
  73. /*
  74. * second_ivt_offset is the offset from the "second_ivt_header" to
  75. * "image_copy_start", which involves FLASH_OFFSET, plus the first
  76. * ivt_header, the plugin code size itself recorded by "ivt2_header"
  77. */
  78. second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET)
  79. /*
  80. * The following is the second IVT header plus the second boot data
  81. */
  82. ivt2_header: .long 0x0
  83. app2_code_jump_v: .long 0x0
  84. reserv3: .long 0x0
  85. dcd2_ptr: .long 0x0
  86. boot_data2_ptr: .long 0x0
  87. self_ptr2: .long 0x0
  88. app_code_csf2: .long 0x0
  89. reserv4: .long 0x0
  90. boot_data2: .long 0x0
  91. image_len2: .long 0x0
  92. plugin2: .long 0x0