sf_internal.h 6.7 KB

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  1. /*
  2. * SPI flash internal definitions
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef _SF_INTERNAL_H_
  10. #define _SF_INTERNAL_H_
  11. #include <linux/types.h>
  12. #include <linux/compiler.h>
  13. /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
  14. enum spi_dual_flash {
  15. SF_SINGLE_FLASH = 0,
  16. SF_DUAL_STACKED_FLASH = BIT(0),
  17. SF_DUAL_PARALLEL_FLASH = BIT(1),
  18. };
  19. /* sf param flags */
  20. enum {
  21. #ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
  22. SECT_4K = 0,
  23. #else
  24. SECT_4K = BIT(0),
  25. #endif
  26. SECT_32K = BIT(1),
  27. E_FSR = BIT(2),
  28. SST_WR = BIT(3),
  29. WR_QPP = BIT(4),
  30. RD_QUAD = BIT(5),
  31. RD_DUAL = BIT(6),
  32. RD_QUADIO = BIT(7),
  33. RD_DUALIO = BIT(8),
  34. };
  35. #define RD_FULL RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO
  36. enum spi_nor_option_flags {
  37. SNOR_F_SST_WR = BIT(0),
  38. SNOR_F_USE_FSR = BIT(1),
  39. };
  40. #define SPI_FLASH_3B_ADDR_LEN 3
  41. #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
  42. #define SPI_FLASH_16MB_BOUN 0x1000000
  43. /* CFI Manufacture ID's */
  44. #define SPI_FLASH_CFI_MFR_SPANSION 0x01
  45. #define SPI_FLASH_CFI_MFR_STMICRO 0x20
  46. #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
  47. #define SPI_FLASH_CFI_MFR_SST 0xbf
  48. #define SPI_FLASH_CFI_MFR_WINBOND 0xef
  49. #define SPI_FLASH_CFI_MFR_ATMEL 0x1f
  50. /* Erase commands */
  51. #define CMD_ERASE_4K 0x20
  52. #define CMD_ERASE_32K 0x52
  53. #define CMD_ERASE_CHIP 0xc7
  54. #define CMD_ERASE_64K 0xd8
  55. /* Write commands */
  56. #define CMD_WRITE_STATUS 0x01
  57. #define CMD_PAGE_PROGRAM 0x02
  58. #define CMD_WRITE_DISABLE 0x04
  59. #define CMD_WRITE_ENABLE 0x06
  60. #define CMD_QUAD_PAGE_PROGRAM 0x32
  61. #define CMD_WRITE_EVCR 0x61
  62. /* Read commands */
  63. #define CMD_READ_ARRAY_SLOW 0x03
  64. #define CMD_READ_ARRAY_FAST 0x0b
  65. #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
  66. #define CMD_READ_DUAL_IO_FAST 0xbb
  67. #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
  68. #define CMD_READ_QUAD_IO_FAST 0xeb
  69. #define CMD_READ_ID 0x9f
  70. #define CMD_READ_STATUS 0x05
  71. #define CMD_READ_STATUS1 0x35
  72. #define CMD_READ_CONFIG 0x35
  73. #define CMD_FLAG_STATUS 0x70
  74. #define CMD_READ_EVCR 0x65
  75. /* Bank addr access commands */
  76. #ifdef CONFIG_SPI_FLASH_BAR
  77. # define CMD_BANKADDR_BRWR 0x17
  78. # define CMD_BANKADDR_BRRD 0x16
  79. # define CMD_EXTNADDR_WREAR 0xC5
  80. # define CMD_EXTNADDR_RDEAR 0xC8
  81. #endif
  82. /* Common status */
  83. #define STATUS_WIP BIT(0)
  84. #define STATUS_QEB_WINSPAN BIT(1)
  85. #define STATUS_QEB_MXIC BIT(6)
  86. #define STATUS_PEC BIT(7)
  87. #define STATUS_QEB_MICRON BIT(7)
  88. #define SR_BP0 BIT(2) /* Block protect 0 */
  89. #define SR_BP1 BIT(3) /* Block protect 1 */
  90. #define SR_BP2 BIT(4) /* Block protect 2 */
  91. /* Flash timeout values */
  92. #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
  93. #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
  94. #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
  95. /* SST specific */
  96. #ifdef CONFIG_SPI_FLASH_SST
  97. # define CMD_SST_BP 0x02 /* Byte Program */
  98. # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
  99. int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
  100. const void *buf);
  101. int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
  102. const void *buf);
  103. #endif
  104. #ifdef CONFIG_SPI_FLASH_SPANSION
  105. /* Used for Spansion S25FS-S family flash only. */
  106. #define CMD_SPANSION_RDAR 0x65 /* Read any device register */
  107. #define CMD_SPANSION_WRAR 0x71 /* Write any device register */
  108. #endif
  109. /**
  110. * struct spi_flash_params - SPI/QSPI flash device params structure
  111. *
  112. * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
  113. * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
  114. * @ext_jedec: Device ext_jedec ID
  115. * @sector_size: Isn't necessarily a sector size from vendor,
  116. * the size listed here is what works with CMD_ERASE_64K
  117. * @nr_sectors: No.of sectors on this device
  118. * @flags: Important param, for flash specific behaviour
  119. */
  120. struct spi_flash_params {
  121. const char *name;
  122. u32 jedec;
  123. u16 ext_jedec;
  124. u32 sector_size;
  125. u32 nr_sectors;
  126. u16 flags;
  127. };
  128. extern const struct spi_flash_params spi_flash_params_table[];
  129. /* Send a single-byte command to the device and read the response */
  130. int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
  131. /*
  132. * Send a multi-byte command to the device and read the response. Used
  133. * for flash array reads, etc.
  134. */
  135. int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
  136. size_t cmd_len, void *data, size_t data_len);
  137. /*
  138. * Send a multi-byte command to the device followed by (optional)
  139. * data. Used for programming the flash array, etc.
  140. */
  141. int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
  142. const void *data, size_t data_len);
  143. /* Flash erase(sectors) operation, support all possible erase commands */
  144. int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
  145. /* Lock stmicro spi flash region */
  146. int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
  147. /* Unlock stmicro spi flash region */
  148. int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
  149. /* Check if a stmicro spi flash region is completely locked */
  150. int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
  151. /* Enable writing on the SPI flash */
  152. static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
  153. {
  154. return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
  155. }
  156. /* Disable writing on the SPI flash */
  157. static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
  158. {
  159. return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
  160. }
  161. /*
  162. * Used for spi_flash write operation
  163. * - SPI claim
  164. * - spi_flash_cmd_write_enable
  165. * - spi_flash_cmd_write
  166. * - spi_flash_cmd_wait_ready
  167. * - SPI release
  168. */
  169. int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
  170. size_t cmd_len, const void *buf, size_t buf_len);
  171. /*
  172. * Flash write operation, support all possible write commands.
  173. * Write the requested data out breaking it up into multiple write
  174. * commands as needed per the write size.
  175. */
  176. int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
  177. size_t len, const void *buf);
  178. /*
  179. * Same as spi_flash_cmd_read() except it also claims/releases the SPI
  180. * bus. Used as common part of the ->read() operation.
  181. */
  182. int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
  183. size_t cmd_len, void *data, size_t data_len);
  184. /* Flash read operation, support all possible read commands */
  185. int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
  186. size_t len, void *data);
  187. #ifdef CONFIG_SPI_FLASH_MTD
  188. int spi_flash_mtd_register(struct spi_flash *flash);
  189. void spi_flash_mtd_unregister(void);
  190. #endif
  191. /**
  192. * spi_flash_scan - scan the SPI FLASH
  193. * @flash: the spi flash structure
  194. *
  195. * The drivers can use this fuction to scan the SPI FLASH.
  196. * In the scanning, it will try to get all the necessary information to
  197. * fill the spi_flash{}.
  198. *
  199. * Return: 0 for success, others for failure.
  200. */
  201. int spi_flash_scan(struct spi_flash *flash);
  202. #endif /* _SF_INTERNAL_H_ */