board_init.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138
  1. /*
  2. * Copyright (C) 2012-2015 Panasonic Corporation
  3. * Copyright (C) 2015-2016 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <libfdt.h>
  10. #include <linux/io.h>
  11. #include "init.h"
  12. #include "micro-support-card.h"
  13. #include "soc-info.h"
  14. DECLARE_GLOBAL_DATA_PTR;
  15. static void uniphier_setup_xirq(void)
  16. {
  17. const void *fdt = gd->fdt_blob;
  18. int soc_node, aidet_node;
  19. const u32 *val;
  20. unsigned long aidet_base;
  21. u32 tmp;
  22. soc_node = fdt_path_offset(fdt, "/soc");
  23. if (soc_node < 0)
  24. return;
  25. aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
  26. if (aidet_node < 0)
  27. return;
  28. val = fdt_getprop(fdt, aidet_node, "reg", NULL);
  29. if (!val)
  30. return;
  31. aidet_base = fdt32_to_cpu(*val);
  32. tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */
  33. tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */
  34. writel(tmp, aidet_base + 8);
  35. tmp = readl(0x55000090); /* IRQCTL */
  36. tmp |= 0x000000ff;
  37. writel(tmp, 0x55000090);
  38. }
  39. int board_init(void)
  40. {
  41. led_puts("U0");
  42. switch (uniphier_get_soc_type()) {
  43. #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
  44. case SOC_UNIPHIER_SLD3:
  45. uniphier_sld3_pin_init();
  46. led_puts("U1");
  47. uniphier_ld4_clk_init();
  48. break;
  49. #endif
  50. #if defined(CONFIG_ARCH_UNIPHIER_LD4)
  51. case SOC_UNIPHIER_LD4:
  52. uniphier_ld4_pin_init();
  53. led_puts("U1");
  54. uniphier_ld4_clk_init();
  55. break;
  56. #endif
  57. #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
  58. case SOC_UNIPHIER_PRO4:
  59. uniphier_pro4_pin_init();
  60. led_puts("U1");
  61. uniphier_pro4_clk_init();
  62. break;
  63. #endif
  64. #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
  65. case SOC_UNIPHIER_SLD8:
  66. uniphier_sld8_pin_init();
  67. led_puts("U1");
  68. uniphier_ld4_clk_init();
  69. break;
  70. #endif
  71. #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
  72. case SOC_UNIPHIER_PRO5:
  73. uniphier_pro5_pin_init();
  74. led_puts("U1");
  75. uniphier_pro5_clk_init();
  76. break;
  77. #endif
  78. #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
  79. case SOC_UNIPHIER_PXS2:
  80. uniphier_pxs2_pin_init();
  81. led_puts("U1");
  82. uniphier_pxs2_clk_init();
  83. break;
  84. #endif
  85. #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
  86. case SOC_UNIPHIER_LD6B:
  87. uniphier_ld6b_pin_init();
  88. led_puts("U1");
  89. uniphier_pxs2_clk_init();
  90. break;
  91. #endif
  92. #if defined(CONFIG_ARCH_UNIPHIER_LD11)
  93. case SOC_UNIPHIER_LD11:
  94. uniphier_ld20_pin_init();
  95. led_puts("U1");
  96. uniphier_ld11_clk_init();
  97. break;
  98. #endif
  99. #if defined(CONFIG_ARCH_UNIPHIER_LD20)
  100. case SOC_UNIPHIER_LD20:
  101. uniphier_ld20_pin_init();
  102. led_puts("U1");
  103. uniphier_ld20_clk_init();
  104. cci500_init(2);
  105. break;
  106. #endif
  107. default:
  108. break;
  109. }
  110. uniphier_setup_xirq();
  111. led_puts("U2");
  112. support_card_late_init();
  113. led_puts("U3");
  114. #ifdef CONFIG_ARM64
  115. uniphier_smp_kick_all_cpus();
  116. #endif
  117. led_puts("Uboo");
  118. return 0;
  119. }