UDM-fpga.txt 4.0 KB

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  1. The U-Boot Driver Model Project
  2. ===============================
  3. I/O system analysis
  4. ===================
  5. Marek Vasut <marek.vasut@gmail.com>
  6. 2012-02-21
  7. I) Overview
  8. -----------
  9. The current FPGA implementation is handled by command "fpga". This command in
  10. turn calls the following functions:
  11. fpga_info()
  12. fpga_load()
  13. fpga_dump()
  14. These functions are implemented by what appears to be FPGA multiplexer, located
  15. in drivers/fpga/fpga.c . This code determines which device to operate with
  16. depending on the device ID.
  17. The fpga_info() function is multiplexer of the functions providing information
  18. about the particular FPGA device. These functions are implemented in the drivers
  19. for the particular FPGA device:
  20. xilinx_info()
  21. altera_info()
  22. lattice_info()
  23. Similar approach is used for fpga_load(), which multiplexes "xilinx_load()",
  24. "altera_load()" and "lattice_load()" and is used to load firmware into the FPGA
  25. device.
  26. The fpga_dump() function, which prints the contents of the FPGA device, is no
  27. different either, by multiplexing "xilinx_dump()", "altera_dump()" and
  28. "lattice_dump()" functions.
  29. Finally, each new FPGA device is registered by calling "fpga_add()" function.
  30. This function takes two arguments, the second one being particularly important,
  31. because it's basically what will become platform_data. Currently, it's data that
  32. are passed to the driver from the board/platform code.
  33. II) Approach
  34. ------------
  35. The path to conversion of the FPGA subsystem will be very straightforward, since
  36. the FPGA subsystem is already quite dynamic. Multiple things will need to be
  37. modified though.
  38. First is the registration of the new FPGA device towards the FPGA core. This
  39. will be achieved by calling:
  40. fpga_device_register(struct instance *i, const struct fpga_ops *ops);
  41. The particularly interesting part is the struct fpga_ops, which contains
  42. operations supported by the FPGA device. These are basically the already used
  43. calls in the current implementation:
  44. struct fpga_ops {
  45. int info(struct instance *i);
  46. int load(struct instance *i, const char *buf, size_t size);
  47. int dump(struct instance *i, const char *buf, size_t size);
  48. }
  49. The other piece that'll have to be modified is how the devices are tracked.
  50. It'll be necessary to introduce a linked list of devices within the FPGA core
  51. instead of tracking them by ID number.
  52. Next, the "Xilinx_desc", "Lattice_desc" and "Altera_desc" structures will have
  53. to be moved to driver's private_data. Finally, structures passed from the board
  54. and/or platform files, like "Xilinx_Virtex2_Slave_SelectMap_fns" would be passed
  55. via platform_data to the driver.
  56. III) Analysis of in-tree drivers
  57. --------------------------------
  58. 1) Altera driver
  59. ----------------
  60. The driver is realized using the following files:
  61. drivers/fpga/altera.c
  62. drivers/fpga/ACEX1K.c
  63. drivers/fpga/cyclon2.c
  64. drivers/fpga/stratixII.c
  65. All of the sub-drivers implement basically the same info-load-dump interface
  66. and there's no expected problem during the conversion. The driver itself will
  67. be realised by altera.c and all the sub-drivers will be linked in. The
  68. distinction will be done by passing different platform data.
  69. 2) Lattice driver
  70. -----------------
  71. The driver is realized using the following files:
  72. drivers/fpga/lattice.c
  73. drivers/fpga/ivm_core.c
  74. This driver also implements the standard interface, but to realise the
  75. operations with the FPGA device, uses functions from "ivm_core.c" file. This
  76. file implements the main communications logic and has to be linked in together
  77. with "lattice.c". No problem converting is expected here.
  78. 3) Xilinx driver
  79. ----------------
  80. The driver is realized using the following files:
  81. drivers/fpga/xilinx.c
  82. drivers/fpga/spartan2.c
  83. drivers/fpga/spartan3.c
  84. drivers/fpga/virtex2.c
  85. This set of sub-drivers is special by defining a big set of macros in
  86. "include/spartan3.h" and similar files. These macros would need to be either
  87. rewritten or replaced. Otherwise, there are no problems expected during the
  88. conversion process.