clk.h 2.5 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __ASM_ARM_ARCH_CLK_H__
  10. #define __ASM_ARM_ARCH_CLK_H__
  11. #include <asm/arch/hardware.h>
  12. #include <asm/arch/at91_pmc.h>
  13. #include <asm/global_data.h>
  14. static inline unsigned long get_cpu_clk_rate(void)
  15. {
  16. DECLARE_GLOBAL_DATA_PTR;
  17. return gd->arch.cpu_clk_rate_hz;
  18. }
  19. static inline unsigned long get_main_clk_rate(void)
  20. {
  21. DECLARE_GLOBAL_DATA_PTR;
  22. return gd->arch.main_clk_rate_hz;
  23. }
  24. static inline unsigned long get_mck_clk_rate(void)
  25. {
  26. DECLARE_GLOBAL_DATA_PTR;
  27. return gd->arch.mck_rate_hz;
  28. }
  29. static inline unsigned long get_plla_clk_rate(void)
  30. {
  31. DECLARE_GLOBAL_DATA_PTR;
  32. return gd->arch.plla_rate_hz;
  33. }
  34. static inline unsigned long get_pllb_clk_rate(void)
  35. {
  36. DECLARE_GLOBAL_DATA_PTR;
  37. return gd->arch.pllb_rate_hz;
  38. }
  39. static inline u32 get_pllb_init(void)
  40. {
  41. DECLARE_GLOBAL_DATA_PTR;
  42. return gd->arch.at91_pllb_usb_init;
  43. }
  44. #ifdef CPU_HAS_H32MXDIV
  45. static inline unsigned int get_h32mxdiv(void)
  46. {
  47. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  48. return readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV;
  49. }
  50. #else
  51. static inline unsigned int get_h32mxdiv(void)
  52. {
  53. return 0;
  54. }
  55. #endif
  56. static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
  57. {
  58. if (get_h32mxdiv())
  59. return get_mck_clk_rate() / 2;
  60. else
  61. return get_mck_clk_rate();
  62. }
  63. static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
  64. {
  65. if (get_h32mxdiv())
  66. return get_mck_clk_rate() / 2;
  67. else
  68. return get_mck_clk_rate();
  69. }
  70. static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
  71. {
  72. return get_mck_clk_rate();
  73. }
  74. static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
  75. {
  76. if (get_h32mxdiv())
  77. return get_mck_clk_rate() / 2;
  78. else
  79. return get_mck_clk_rate();
  80. }
  81. static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
  82. {
  83. if (get_h32mxdiv())
  84. return get_mck_clk_rate() / 2;
  85. else
  86. return get_mck_clk_rate();
  87. }
  88. static inline unsigned long get_mci_clk_rate(void)
  89. {
  90. if (get_h32mxdiv())
  91. return get_mck_clk_rate() / 2;
  92. else
  93. return get_mck_clk_rate();
  94. }
  95. static inline unsigned long get_pit_clk_rate(void)
  96. {
  97. if (get_h32mxdiv())
  98. return get_mck_clk_rate() / 2;
  99. else
  100. return get_mck_clk_rate();
  101. }
  102. int at91_clock_init(unsigned long main_clock);
  103. void at91_periph_clk_enable(int id);
  104. void at91_periph_clk_disable(int id);
  105. #endif /* __ASM_ARM_ARCH_CLK_H__ */