twl4030.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189
  1. /*
  2. * Copyright (c) 2009 Wind River Systems, Inc.
  3. * Tom Rix <Tom.Rix@windriver.com>
  4. *
  5. * This is file is based on
  6. * repository git.gitorious.org/u-boot-omap3/mainline.git,
  7. * branch omap3-dev-usb, file drivers/usb/gadget/twl4030_usb.c
  8. *
  9. * This is the unique part of its copyright :
  10. *
  11. * ------------------------------------------------------------------------
  12. *
  13. * * (C) Copyright 2009 Atin Malaviya (atin.malaviya@gmail.com)
  14. *
  15. * Based on: twl4030_usb.c in linux 2.6 (drivers/i2c/chips/twl4030_usb.c)
  16. * Copyright (C) 2004-2007 Texas Instruments
  17. * Copyright (C) 2008 Nokia Corporation
  18. * Contact: Felipe Balbi <felipe.balbi@nokia.com>
  19. *
  20. * Author: Atin Malaviya (atin.malaviya@gmail.com)
  21. *
  22. * ------------------------------------------------------------------------
  23. *
  24. * This program is free software; you can redistribute it and/or modify
  25. * it under the terms of the GNU General Public License as published by
  26. * the Free Software Foundation; either version 2 of the License, or
  27. * (at your option) any later version.
  28. *
  29. * This program is distributed in the hope that it will be useful,
  30. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32. * GNU General Public License for more details.
  33. *
  34. * You should have received a copy of the GNU General Public License
  35. * along with this program; if not, write to the Free Software
  36. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  37. * MA 02111-1307 USA
  38. */
  39. #include <twl4030.h>
  40. /* Defines for bits in registers */
  41. #define OPMODE_MASK (3 << 3)
  42. #define XCVRSELECT_MASK (3 << 0)
  43. #define CARKITMODE (1 << 2)
  44. #define OTG_ENAB (1 << 5)
  45. #define PHYPWD (1 << 0)
  46. #define CLOCKGATING_EN (1 << 2)
  47. #define CLK32K_EN (1 << 1)
  48. #define REQ_PHY_DPLL_CLK (1 << 0)
  49. #define PHY_DPLL_CLK (1 << 0)
  50. static int twl4030_usb_write(u8 address, u8 data)
  51. {
  52. int ret;
  53. ret = twl4030_i2c_write_u8(TWL4030_CHIP_USB, data, address);
  54. if (ret != 0)
  55. printf("TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
  56. return ret;
  57. }
  58. static int twl4030_usb_read(u8 address)
  59. {
  60. u8 data;
  61. int ret;
  62. ret = twl4030_i2c_read_u8(TWL4030_CHIP_USB, &data, address);
  63. if (ret == 0)
  64. ret = data;
  65. else
  66. printf("TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
  67. return ret;
  68. }
  69. static void twl4030_usb_ldo_init(void)
  70. {
  71. /* Enable writing to power configuration registers */
  72. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 0xC0,
  73. TWL4030_PM_MASTER_PROTECT_KEY);
  74. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 0x0C,
  75. TWL4030_PM_MASTER_PROTECT_KEY);
  76. /* put VUSB3V1 LDO in active state */
  77. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x00,
  78. TWL4030_PM_RECEIVER_VUSB_DEDICATED2);
  79. /* input to VUSB3V1 LDO is from VBAT, not VBUS */
  80. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x14,
  81. TWL4030_PM_RECEIVER_VUSB_DEDICATED1);
  82. /* turn on 3.1V regulator */
  83. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x20,
  84. TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP);
  85. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x00,
  86. TWL4030_PM_RECEIVER_VUSB3V1_TYPE);
  87. /* turn on 1.5V regulator */
  88. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x20,
  89. TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP);
  90. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x00,
  91. TWL4030_PM_RECEIVER_VUSB1V5_TYPE);
  92. /* turn on 1.8V regulator */
  93. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x20,
  94. TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP);
  95. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, 0x00,
  96. TWL4030_PM_RECEIVER_VUSB1V8_TYPE);
  97. /* disable access to power configuration registers */
  98. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, 0x00,
  99. TWL4030_PM_MASTER_PROTECT_KEY);
  100. }
  101. static void twl4030_phy_power(void)
  102. {
  103. u8 pwr, clk;
  104. /* Power the PHY */
  105. pwr = twl4030_usb_read(TWL4030_USB_PHY_PWR_CTRL);
  106. pwr &= ~PHYPWD;
  107. twl4030_usb_write(TWL4030_USB_PHY_PWR_CTRL, pwr);
  108. /* Enable clocks */
  109. clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
  110. clk |= CLOCKGATING_EN | CLK32K_EN;
  111. twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
  112. }
  113. /*
  114. * Initiaze the ULPI interface
  115. * ULPI : Universal Transceiver Macrocell Low Pin Interface
  116. * An interface between the USB link controller like musb and the
  117. * the PHY or transceiver that drives the actual bus.
  118. */
  119. int twl4030_usb_ulpi_init(void)
  120. {
  121. long timeout = 1000 * 1000; /* 1 sec */;
  122. u8 clk, sts, pwr;
  123. /* twl4030 ldo init */
  124. twl4030_usb_ldo_init();
  125. /* Enable the twl4030 phy */
  126. twl4030_phy_power();
  127. /* Enable DPLL to access PHY registers over I2C */
  128. clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
  129. clk |= REQ_PHY_DPLL_CLK;
  130. twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
  131. /* Check if the PHY DPLL is locked */
  132. sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
  133. while (!(sts & PHY_DPLL_CLK) && 0 < timeout) {
  134. udelay(10);
  135. sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
  136. timeout -= 10;
  137. }
  138. /* Final check */
  139. sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
  140. if (!(sts & PHY_DPLL_CLK)) {
  141. printf("Error:TWL4030:USB Timeout setting PHY DPLL clock\n");
  142. return -1;
  143. }
  144. /*
  145. * There are two circuit blocks attached to the PHY,
  146. * Carkit and USB OTG. Disable Carkit and enable USB OTG
  147. */
  148. twl4030_usb_write(TWL4030_USB_IFC_CTRL_CLR, CARKITMODE);
  149. pwr = twl4030_usb_read(TWL4030_USB_POWER_CTRL);
  150. pwr |= OTG_ENAB;
  151. twl4030_usb_write(TWL4030_USB_POWER_CTRL_SET, pwr);
  152. /* Clear the opmode bits to ensure normal encode */
  153. twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, OPMODE_MASK);
  154. /* Clear the xcvrselect bits to enable the high speed transeiver */
  155. twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, XCVRSELECT_MASK);
  156. /* Let ULPI control the DPLL clock */
  157. clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
  158. clk &= ~REQ_PHY_DPLL_CLK;
  159. twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
  160. return 0;
  161. }