board.c 3.1 KB

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  1. /*
  2. * (C) Copyright 2010,2011
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <ns16550.h>
  25. #include <asm/io.h>
  26. #include <asm/arch/tegra2.h>
  27. #include <asm/arch/sys_proto.h>
  28. #include <asm/arch/clk_rst.h>
  29. #include <asm/arch/clock.h>
  30. #include <asm/arch/pinmux.h>
  31. #include <asm/arch/uart.h>
  32. #include "board.h"
  33. DECLARE_GLOBAL_DATA_PTR;
  34. const struct tegra2_sysinfo sysinfo = {
  35. CONFIG_TEGRA2_BOARD_STRING
  36. };
  37. /*
  38. * Routine: timer_init
  39. * Description: init the timestamp and lastinc value
  40. */
  41. int timer_init(void)
  42. {
  43. return 0;
  44. }
  45. static void enable_uart(enum periph_id pid)
  46. {
  47. /* Assert UART reset and enable clock */
  48. reset_set_enable(pid, 1);
  49. clock_enable(pid);
  50. clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
  51. /* wait for 2us */
  52. udelay(2);
  53. /* De-assert reset to UART */
  54. reset_set_enable(pid, 0);
  55. }
  56. /*
  57. * Routine: clock_init_uart
  58. * Description: init the PLL and clock for the UART(s)
  59. */
  60. static void clock_init_uart(void)
  61. {
  62. #if defined(CONFIG_TEGRA2_ENABLE_UARTA)
  63. enable_uart(PERIPH_ID_UART1);
  64. #endif /* CONFIG_TEGRA2_ENABLE_UARTA */
  65. #if defined(CONFIG_TEGRA2_ENABLE_UARTD)
  66. enable_uart(PERIPH_ID_UART4);
  67. #endif /* CONFIG_TEGRA2_ENABLE_UARTD */
  68. }
  69. /*
  70. * Routine: pin_mux_uart
  71. * Description: setup the pin muxes/tristate values for the UART(s)
  72. */
  73. static void pin_mux_uart(void)
  74. {
  75. #if defined(CONFIG_TEGRA2_ENABLE_UARTA)
  76. pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
  77. pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
  78. pinmux_tristate_disable(PINGRP_IRRX);
  79. pinmux_tristate_disable(PINGRP_IRTX);
  80. #endif /* CONFIG_TEGRA2_ENABLE_UARTA */
  81. #if defined(CONFIG_TEGRA2_ENABLE_UARTD)
  82. pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
  83. pinmux_tristate_disable(PINGRP_GMC);
  84. #endif /* CONFIG_TEGRA2_ENABLE_UARTD */
  85. }
  86. /*
  87. * Routine: board_init
  88. * Description: Early hardware init.
  89. */
  90. int board_init(void)
  91. {
  92. clock_init();
  93. clock_verify();
  94. /* boot param addr */
  95. gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
  96. return 0;
  97. }
  98. #ifdef CONFIG_BOARD_EARLY_INIT_F
  99. int board_early_init_f(void)
  100. {
  101. /* Initialize essential common plls */
  102. clock_early_init();
  103. /* Initialize UART clocks */
  104. clock_init_uart();
  105. /* Initialize periph pinmuxes */
  106. pin_mux_uart();
  107. /* Initialize periph GPIOs */
  108. gpio_config_uart();
  109. /* Init UART, scratch regs, and start CPU */
  110. tegra2_start();
  111. return 0;
  112. }
  113. #endif /* EARLY_INIT */