msg_port.c 2.0 KB

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  1. /*
  2. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/arch/device.h>
  8. #include <asm/arch/msg_port.h>
  9. #include <asm/arch/quark.h>
  10. void msg_port_setup(int op, int port, int reg)
  11. {
  12. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_REG,
  13. (((op) << 24) | ((port) << 16) |
  14. (((reg) << 8) & 0xff00) | MSG_BYTE_ENABLE));
  15. }
  16. u32 msg_port_read(u8 port, u32 reg)
  17. {
  18. u32 value;
  19. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  20. reg & 0xffffff00);
  21. msg_port_setup(MSG_OP_READ, port, reg);
  22. qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
  23. return value;
  24. }
  25. void msg_port_write(u8 port, u32 reg, u32 value)
  26. {
  27. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
  28. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  29. reg & 0xffffff00);
  30. msg_port_setup(MSG_OP_WRITE, port, reg);
  31. }
  32. u32 msg_port_alt_read(u8 port, u32 reg)
  33. {
  34. u32 value;
  35. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  36. reg & 0xffffff00);
  37. msg_port_setup(MSG_OP_ALT_READ, port, reg);
  38. qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
  39. return value;
  40. }
  41. void msg_port_alt_write(u8 port, u32 reg, u32 value)
  42. {
  43. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
  44. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  45. reg & 0xffffff00);
  46. msg_port_setup(MSG_OP_ALT_WRITE, port, reg);
  47. }
  48. u32 msg_port_io_read(u8 port, u32 reg)
  49. {
  50. u32 value;
  51. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  52. reg & 0xffffff00);
  53. msg_port_setup(MSG_OP_IO_READ, port, reg);
  54. qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
  55. return value;
  56. }
  57. void msg_port_io_write(u8 port, u32 reg, u32 value)
  58. {
  59. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
  60. qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
  61. reg & 0xffffff00);
  62. msg_port_setup(MSG_OP_IO_WRITE, port, reg);
  63. }