i2c-uclass.c 14 KB

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  1. /*
  2. * Copyright (c) 2014 Google, Inc
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <i2c.h>
  10. #include <malloc.h>
  11. #include <dm/device-internal.h>
  12. #include <dm/lists.h>
  13. #include <dm/pinctrl.h>
  14. #ifdef CONFIG_DM_GPIO
  15. #include <asm/gpio.h>
  16. #endif
  17. #define I2C_MAX_OFFSET_LEN 4
  18. enum {
  19. PIN_SDA = 0,
  20. PIN_SCL,
  21. PIN_COUNT,
  22. };
  23. /* Useful debugging function */
  24. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  25. {
  26. int i;
  27. for (i = 0; i < nmsgs; i++) {
  28. struct i2c_msg *m = &msg[i];
  29. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  30. msg->addr, msg->len);
  31. if (!(m->flags & I2C_M_RD))
  32. printf(": %x", m->buf[0]);
  33. printf("\n");
  34. }
  35. }
  36. /**
  37. * i2c_setup_offset() - Set up a new message with a chip offset
  38. *
  39. * @chip: Chip to use
  40. * @offset: Byte offset within chip
  41. * @offset_buf: Place to put byte offset
  42. * @msg: Message buffer
  43. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  44. * message is still set up but will not contain an offset.
  45. */
  46. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  47. uint8_t offset_buf[], struct i2c_msg *msg)
  48. {
  49. int offset_len;
  50. msg->addr = chip->chip_addr;
  51. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  52. msg->len = chip->offset_len;
  53. msg->buf = offset_buf;
  54. if (!chip->offset_len)
  55. return -EADDRNOTAVAIL;
  56. assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
  57. offset_len = chip->offset_len;
  58. while (offset_len--)
  59. *offset_buf++ = offset >> (8 * offset_len);
  60. return 0;
  61. }
  62. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  63. uint8_t *buffer, int len)
  64. {
  65. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  66. struct udevice *bus = dev_get_parent(dev);
  67. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  68. struct i2c_msg msg[2], *ptr;
  69. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  70. int ret;
  71. int i;
  72. for (i = 0; i < len; i++) {
  73. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  74. return -EINVAL;
  75. ptr = msg + 1;
  76. ptr->addr = chip->chip_addr;
  77. ptr->flags = msg->flags | I2C_M_RD;
  78. ptr->len = 1;
  79. ptr->buf = &buffer[i];
  80. ptr++;
  81. ret = ops->xfer(bus, msg, ptr - msg);
  82. if (ret)
  83. return ret;
  84. }
  85. return 0;
  86. }
  87. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  88. const uint8_t *buffer, int len)
  89. {
  90. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  91. struct udevice *bus = dev_get_parent(dev);
  92. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  93. struct i2c_msg msg[1];
  94. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  95. int ret;
  96. int i;
  97. for (i = 0; i < len; i++) {
  98. if (i2c_setup_offset(chip, offset + i, buf, msg))
  99. return -EINVAL;
  100. buf[msg->len++] = buffer[i];
  101. ret = ops->xfer(bus, msg, 1);
  102. if (ret)
  103. return ret;
  104. }
  105. return 0;
  106. }
  107. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  108. {
  109. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  110. struct udevice *bus = dev_get_parent(dev);
  111. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  112. struct i2c_msg msg[2], *ptr;
  113. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  114. int msg_count;
  115. if (!ops->xfer)
  116. return -ENOSYS;
  117. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  118. return i2c_read_bytewise(dev, offset, buffer, len);
  119. ptr = msg;
  120. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  121. ptr++;
  122. if (len) {
  123. ptr->addr = chip->chip_addr;
  124. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  125. ptr->flags |= I2C_M_RD;
  126. ptr->len = len;
  127. ptr->buf = buffer;
  128. ptr++;
  129. }
  130. msg_count = ptr - msg;
  131. return ops->xfer(bus, msg, msg_count);
  132. }
  133. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  134. int len)
  135. {
  136. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  137. struct udevice *bus = dev_get_parent(dev);
  138. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  139. struct i2c_msg msg[1];
  140. if (!ops->xfer)
  141. return -ENOSYS;
  142. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  143. return i2c_write_bytewise(dev, offset, buffer, len);
  144. /*
  145. * The simple approach would be to send two messages here: one to
  146. * set the offset and one to write the bytes. However some drivers
  147. * will not be expecting this, and some chips won't like how the
  148. * driver presents this on the I2C bus.
  149. *
  150. * The API does not support separate offset and data. We could extend
  151. * it with a flag indicating that there is data in the next message
  152. * that needs to be processed in the same transaction. We could
  153. * instead add an additional buffer to each message. For now, handle
  154. * this in the uclass since it isn't clear what the impact on drivers
  155. * would be with this extra complication. Unfortunately this means
  156. * copying the message.
  157. *
  158. * Use the stack for small messages, malloc() for larger ones. We
  159. * need to allow space for the offset (up to 4 bytes) and the message
  160. * itself.
  161. */
  162. if (len < 64) {
  163. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  164. i2c_setup_offset(chip, offset, buf, msg);
  165. msg->len += len;
  166. memcpy(buf + chip->offset_len, buffer, len);
  167. return ops->xfer(bus, msg, 1);
  168. } else {
  169. uint8_t *buf;
  170. int ret;
  171. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  172. if (!buf)
  173. return -ENOMEM;
  174. i2c_setup_offset(chip, offset, buf, msg);
  175. msg->len += len;
  176. memcpy(buf + chip->offset_len, buffer, len);
  177. ret = ops->xfer(bus, msg, 1);
  178. free(buf);
  179. return ret;
  180. }
  181. }
  182. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  183. {
  184. struct udevice *bus = dev_get_parent(dev);
  185. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  186. if (!ops->xfer)
  187. return -ENOSYS;
  188. return ops->xfer(bus, msg, nmsgs);
  189. }
  190. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  191. {
  192. uint8_t val;
  193. int ret;
  194. ret = dm_i2c_read(dev, offset, &val, 1);
  195. if (ret < 0)
  196. return ret;
  197. return val;
  198. }
  199. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  200. {
  201. uint8_t val = value;
  202. return dm_i2c_write(dev, offset, &val, 1);
  203. }
  204. /**
  205. * i2c_probe_chip() - probe for a chip on a bus
  206. *
  207. * @bus: Bus to probe
  208. * @chip_addr: Chip address to probe
  209. * @flags: Flags for the chip
  210. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  211. * does not respond to probe
  212. */
  213. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  214. enum dm_i2c_chip_flags chip_flags)
  215. {
  216. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  217. struct i2c_msg msg[1];
  218. int ret;
  219. if (ops->probe_chip) {
  220. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  221. if (!ret || ret != -ENOSYS)
  222. return ret;
  223. }
  224. if (!ops->xfer)
  225. return -ENOSYS;
  226. /* Probe with a zero-length message */
  227. msg->addr = chip_addr;
  228. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  229. msg->len = 0;
  230. msg->buf = NULL;
  231. return ops->xfer(bus, msg, 1);
  232. }
  233. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  234. struct udevice **devp)
  235. {
  236. struct dm_i2c_chip *chip;
  237. char name[30], *str;
  238. struct udevice *dev;
  239. int ret;
  240. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  241. str = strdup(name);
  242. if (!str)
  243. return -ENOMEM;
  244. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  245. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  246. if (ret)
  247. goto err_bind;
  248. /* Tell the device what we know about it */
  249. chip = dev_get_parent_platdata(dev);
  250. chip->chip_addr = chip_addr;
  251. chip->offset_len = offset_len;
  252. ret = device_probe(dev);
  253. debug("%s: device_probe: ret=%d\n", __func__, ret);
  254. if (ret)
  255. goto err_probe;
  256. *devp = dev;
  257. return 0;
  258. err_probe:
  259. /*
  260. * If the device failed to probe, unbind it. There is nothing there
  261. * on the bus so we don't want to leave it lying around
  262. */
  263. device_unbind(dev);
  264. err_bind:
  265. free(str);
  266. return ret;
  267. }
  268. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  269. struct udevice **devp)
  270. {
  271. struct udevice *dev;
  272. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  273. bus->name, chip_addr);
  274. for (device_find_first_child(bus, &dev); dev;
  275. device_find_next_child(&dev)) {
  276. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  277. int ret;
  278. if (chip->chip_addr == chip_addr) {
  279. ret = device_probe(dev);
  280. debug("found, ret=%d\n", ret);
  281. if (ret)
  282. return ret;
  283. *devp = dev;
  284. return 0;
  285. }
  286. }
  287. debug("not found\n");
  288. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  289. }
  290. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  291. struct udevice **devp)
  292. {
  293. struct udevice *bus;
  294. int ret;
  295. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  296. if (ret) {
  297. debug("Cannot find I2C bus %d\n", busnum);
  298. return ret;
  299. }
  300. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  301. if (ret) {
  302. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  303. busnum);
  304. return ret;
  305. }
  306. return 0;
  307. }
  308. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  309. struct udevice **devp)
  310. {
  311. int ret;
  312. *devp = NULL;
  313. /* First probe that chip */
  314. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  315. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  316. chip_addr, ret);
  317. if (ret)
  318. return ret;
  319. /* The chip was found, see if we have a driver, and probe it */
  320. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  321. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  322. return ret;
  323. }
  324. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  325. {
  326. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  327. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  328. int ret;
  329. /*
  330. * If we have a method, call it. If not then the driver probably wants
  331. * to deal with speed changes on the next transfer. It can easily read
  332. * the current speed from this uclass
  333. */
  334. if (ops->set_bus_speed) {
  335. ret = ops->set_bus_speed(bus, speed);
  336. if (ret)
  337. return ret;
  338. }
  339. i2c->speed_hz = speed;
  340. return 0;
  341. }
  342. int dm_i2c_get_bus_speed(struct udevice *bus)
  343. {
  344. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  345. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  346. if (!ops->get_bus_speed)
  347. return i2c->speed_hz;
  348. return ops->get_bus_speed(bus);
  349. }
  350. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  351. {
  352. struct udevice *bus = dev->parent;
  353. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  354. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  355. int ret;
  356. if (ops->set_flags) {
  357. ret = ops->set_flags(dev, flags);
  358. if (ret)
  359. return ret;
  360. }
  361. chip->flags = flags;
  362. return 0;
  363. }
  364. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  365. {
  366. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  367. *flagsp = chip->flags;
  368. return 0;
  369. }
  370. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  371. {
  372. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  373. if (offset_len > I2C_MAX_OFFSET_LEN)
  374. return -EINVAL;
  375. chip->offset_len = offset_len;
  376. return 0;
  377. }
  378. int i2c_get_chip_offset_len(struct udevice *dev)
  379. {
  380. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  381. return chip->offset_len;
  382. }
  383. #ifdef CONFIG_DM_GPIO
  384. static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
  385. {
  386. if (bit)
  387. dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
  388. else
  389. dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
  390. GPIOD_ACTIVE_LOW |
  391. GPIOD_IS_OUT_ACTIVE);
  392. }
  393. static int i2c_gpio_get_pin(struct gpio_desc *pin)
  394. {
  395. return dm_gpio_get_value(pin);
  396. }
  397. static int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
  398. struct gpio_desc *scl_pin)
  399. {
  400. int counter = 9;
  401. int ret = 0;
  402. i2c_gpio_set_pin(sda_pin, 1);
  403. i2c_gpio_set_pin(scl_pin, 1);
  404. udelay(5);
  405. /* Toggle SCL until slave release SDA */
  406. while (counter-- >= 0) {
  407. i2c_gpio_set_pin(scl_pin, 1);
  408. udelay(5);
  409. i2c_gpio_set_pin(scl_pin, 0);
  410. udelay(5);
  411. if (i2c_gpio_get_pin(sda_pin))
  412. break;
  413. }
  414. /* Then, send I2C stop */
  415. i2c_gpio_set_pin(sda_pin, 0);
  416. udelay(5);
  417. i2c_gpio_set_pin(scl_pin, 1);
  418. udelay(5);
  419. i2c_gpio_set_pin(sda_pin, 1);
  420. udelay(5);
  421. if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
  422. ret = -EREMOTEIO;
  423. return ret;
  424. }
  425. static int i2c_deblock_gpio(struct udevice *bus)
  426. {
  427. struct gpio_desc gpios[PIN_COUNT];
  428. int ret, ret0;
  429. ret = gpio_request_list_by_name(bus, "gpios", gpios,
  430. ARRAY_SIZE(gpios), GPIOD_IS_IN);
  431. if (ret != ARRAY_SIZE(gpios)) {
  432. debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
  433. __func__, dev_read_name(bus), bus->name);
  434. if (ret >= 0) {
  435. gpio_free_list(bus, gpios, ret);
  436. ret = -ENOENT;
  437. }
  438. goto out;
  439. }
  440. ret = pinctrl_select_state(bus, "gpio");
  441. if (ret) {
  442. debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
  443. __func__, dev_read_name(bus), bus->name);
  444. goto out_no_pinctrl;
  445. }
  446. ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL]);
  447. ret = pinctrl_select_state(bus, "default");
  448. if (ret) {
  449. debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
  450. __func__, dev_read_name(bus), bus->name);
  451. }
  452. ret = !ret ? ret0 : ret;
  453. out_no_pinctrl:
  454. gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
  455. out:
  456. return ret;
  457. }
  458. #else
  459. static int i2c_deblock_gpio(struct udevice *bus)
  460. {
  461. return -ENOSYS;
  462. }
  463. #endif // CONFIG_DM_GPIO
  464. int i2c_deblock(struct udevice *bus)
  465. {
  466. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  467. if (!ops->deblock)
  468. return i2c_deblock_gpio(bus);
  469. return ops->deblock(bus);
  470. }
  471. #if CONFIG_IS_ENABLED(OF_CONTROL)
  472. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
  473. {
  474. int addr;
  475. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  476. 1);
  477. chip->flags = 0;
  478. addr = dev_read_u32_default(dev, "reg", -1);
  479. if (addr == -1) {
  480. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  481. dev_read_name(dev), dev->name);
  482. return -EINVAL;
  483. }
  484. chip->chip_addr = addr;
  485. return 0;
  486. }
  487. #endif
  488. static int i2c_post_probe(struct udevice *dev)
  489. {
  490. #if CONFIG_IS_ENABLED(OF_CONTROL)
  491. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  492. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
  493. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  494. #else
  495. return 0;
  496. #endif
  497. }
  498. static int i2c_child_post_bind(struct udevice *dev)
  499. {
  500. #if CONFIG_IS_ENABLED(OF_CONTROL)
  501. struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
  502. if (!dev_of_valid(dev))
  503. return 0;
  504. return i2c_chip_ofdata_to_platdata(dev, plat);
  505. #else
  506. return 0;
  507. #endif
  508. }
  509. UCLASS_DRIVER(i2c) = {
  510. .id = UCLASS_I2C,
  511. .name = "i2c",
  512. .flags = DM_UC_FLAG_SEQ_ALIAS,
  513. #if CONFIG_IS_ENABLED(OF_CONTROL)
  514. .post_bind = dm_scan_fdt_dev,
  515. #endif
  516. .post_probe = i2c_post_probe,
  517. .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
  518. .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip),
  519. .child_post_bind = i2c_child_post_bind,
  520. };
  521. UCLASS_DRIVER(i2c_generic) = {
  522. .id = UCLASS_I2C_GENERIC,
  523. .name = "i2c_generic",
  524. };
  525. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  526. .name = "i2c_generic_chip_drv",
  527. .id = UCLASS_I2C_GENERIC,
  528. };