bcu_init.c 994 B

123456789101112131415161718192021222324252627282930313233
  1. /*
  2. * Copyright (C) 2011-2014 Panasonic Corporation
  3. * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. #include <mach/bcu-regs.h>
  10. #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
  11. void bcu_init(void)
  12. {
  13. int shift;
  14. writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */
  15. writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */
  16. writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */
  17. writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */
  18. writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */
  19. /* Specify DDR channel */
  20. shift = (CONFIG_SDRAM1_BASE - CONFIG_SDRAM0_BASE) / 0x04000000 * 4;
  21. writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
  22. shift -= 32;
  23. writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */
  24. shift -= 32;
  25. writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
  26. }