rv1108-cru.h 6.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
  4. * Author: Shawn Lin <shawn.lin@rock-chips.com>
  5. */
  6. #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
  7. #define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
  8. /* pll id */
  9. #define PLL_APLL 0
  10. #define PLL_DPLL 1
  11. #define PLL_GPLL 2
  12. #define ARMCLK 3
  13. /* sclk gates (special clocks) */
  14. #define SCLK_MAC 64
  15. #define SCLK_SPI0 65
  16. #define SCLK_NANDC 67
  17. #define SCLK_SDMMC 68
  18. #define SCLK_SDIO 69
  19. #define SCLK_EMMC 71
  20. #define SCLK_UART0 72
  21. #define SCLK_UART1 73
  22. #define SCLK_UART2 74
  23. #define SCLK_I2S0 75
  24. #define SCLK_I2S1 76
  25. #define SCLK_I2S2 77
  26. #define SCLK_TIMER0 78
  27. #define SCLK_TIMER1 79
  28. #define SCLK_SFC 80
  29. #define SCLK_SDMMC_DRV 81
  30. #define SCLK_SDIO_DRV 82
  31. #define SCLK_EMMC_DRV 83
  32. #define SCLK_SDMMC_SAMPLE 84
  33. #define SCLK_SDIO_SAMPLE 85
  34. #define SCLK_EMMC_SAMPLE 86
  35. #define SCLK_MAC_RX 87
  36. #define SCLK_MAC_TX 88
  37. #define SCLK_MACREF 89
  38. #define SCLK_MACREF_OUT 90
  39. #define SCLK_SARADC 91
  40. /* aclk gates */
  41. #define ACLK_DMAC 192
  42. #define ACLK_PRE 193
  43. #define ACLK_CORE 194
  44. #define ACLK_ENMCORE 195
  45. #define ACLK_GMAC 196
  46. /* pclk gates */
  47. #define PCLK_GPIO1 256
  48. #define PCLK_GPIO2 257
  49. #define PCLK_GPIO3 258
  50. #define PCLK_GRF 259
  51. #define PCLK_I2C1 260
  52. #define PCLK_I2C2 261
  53. #define PCLK_I2C3 262
  54. #define PCLK_SPI 263
  55. #define PCLK_SFC 264
  56. #define PCLK_UART0 265
  57. #define PCLK_UART1 266
  58. #define PCLK_UART2 267
  59. #define PCLK_TSADC 268
  60. #define PCLK_PWM 269
  61. #define PCLK_TIMER 270
  62. #define PCLK_PERI 271
  63. #define PCLK_GMAC 272
  64. #define PCLK_SARADC 273
  65. /* hclk gates */
  66. #define HCLK_I2S0_8CH 320
  67. #define HCLK_I2S1_8CH 321
  68. #define HCLK_I2S2_2CH 322
  69. #define HCLK_NANDC 323
  70. #define HCLK_SDMMC 324
  71. #define HCLK_SDIO 325
  72. #define HCLK_EMMC 326
  73. #define HCLK_PERI 327
  74. #define HCLK_SFC 328
  75. #define CLK_NR_CLKS (HCLK_SFC + 1)
  76. /* reset id */
  77. #define SRST_CORE_PO_AD 0
  78. #define SRST_CORE_AD 1
  79. #define SRST_L2_AD 2
  80. #define SRST_CPU_NIU_AD 3
  81. #define SRST_CORE_PO 4
  82. #define SRST_CORE 5
  83. #define SRST_L2 6
  84. #define SRST_CORE_DBG 8
  85. #define PRST_DBG 9
  86. #define RST_DAP 10
  87. #define PRST_DBG_NIU 11
  88. #define ARST_STRC_SYS_AD 15
  89. #define SRST_DDRPHY_CLKDIV 16
  90. #define SRST_DDRPHY 17
  91. #define PRST_DDRPHY 18
  92. #define PRST_HDMIPHY 19
  93. #define PRST_VDACPHY 20
  94. #define PRST_VADCPHY 21
  95. #define PRST_MIPI_CSI_PHY 22
  96. #define PRST_MIPI_DSI_PHY 23
  97. #define PRST_ACODEC 24
  98. #define ARST_BUS_NIU 25
  99. #define PRST_TOP_NIU 26
  100. #define ARST_INTMEM 27
  101. #define HRST_ROM 28
  102. #define ARST_DMAC 29
  103. #define SRST_MSCH_NIU 30
  104. #define PRST_MSCH_NIU 31
  105. #define PRST_DDRUPCTL 32
  106. #define NRST_DDRUPCTL 33
  107. #define PRST_DDRMON 34
  108. #define HRST_I2S0_8CH 35
  109. #define MRST_I2S0_8CH 36
  110. #define HRST_I2S1_2CH 37
  111. #define MRST_IS21_2CH 38
  112. #define HRST_I2S2_2CH 39
  113. #define MRST_I2S2_2CH 40
  114. #define HRST_CRYPTO 41
  115. #define SRST_CRYPTO 42
  116. #define PRST_SPI 43
  117. #define SRST_SPI 44
  118. #define PRST_UART0 45
  119. #define PRST_UART1 46
  120. #define PRST_UART2 47
  121. #define SRST_UART0 48
  122. #define SRST_UART1 49
  123. #define SRST_UART2 50
  124. #define PRST_I2C1 51
  125. #define PRST_I2C2 52
  126. #define PRST_I2C3 53
  127. #define SRST_I2C1 54
  128. #define SRST_I2C2 55
  129. #define SRST_I2C3 56
  130. #define PRST_PWM1 58
  131. #define SRST_PWM1 60
  132. #define PRST_WDT 61
  133. #define PRST_GPIO1 62
  134. #define PRST_GPIO2 63
  135. #define PRST_GPIO3 64
  136. #define PRST_GRF 65
  137. #define PRST_EFUSE 66
  138. #define PRST_EFUSE512 67
  139. #define PRST_TIMER0 68
  140. #define SRST_TIMER0 69
  141. #define SRST_TIMER1 70
  142. #define PRST_TSADC 71
  143. #define SRST_TSADC 72
  144. #define PRST_SARADC 73
  145. #define SRST_SARADC 74
  146. #define HRST_SYSBUS 75
  147. #define PRST_USBGRF 76
  148. #define ARST_PERIPH_NIU 80
  149. #define HRST_PERIPH_NIU 81
  150. #define PRST_PERIPH_NIU 82
  151. #define HRST_PERIPH 83
  152. #define HRST_SDMMC 84
  153. #define HRST_SDIO 85
  154. #define HRST_EMMC 86
  155. #define HRST_NANDC 87
  156. #define NRST_NANDC 88
  157. #define HRST_SFC 89
  158. #define SRST_SFC 90
  159. #define ARST_GMAC 91
  160. #define HRST_OTG 92
  161. #define SRST_OTG 93
  162. #define SRST_OTG_ADP 94
  163. #define HRST_HOST0 95
  164. #define HRST_HOST0_AUX 96
  165. #define HRST_HOST0_ARB 97
  166. #define SRST_HOST0_EHCIPHY 98
  167. #define SRST_HOST0_UTMI 99
  168. #define SRST_USBPOR 100
  169. #define SRST_UTMI0 101
  170. #define SRST_UTMI1 102
  171. #define ARST_VIO0_NIU 102
  172. #define ARST_VIO1_NIU 103
  173. #define HRST_VIO_NIU 104
  174. #define PRST_VIO_NIU 105
  175. #define ARST_VOP 106
  176. #define HRST_VOP 107
  177. #define DRST_VOP 108
  178. #define ARST_IEP 109
  179. #define HRST_IEP 110
  180. #define ARST_RGA 111
  181. #define HRST_RGA 112
  182. #define SRST_RGA 113
  183. #define PRST_CVBS 114
  184. #define PRST_HDMI 115
  185. #define SRST_HDMI 116
  186. #define PRST_MIPI_DSI 117
  187. #define ARST_ISP_NIU 118
  188. #define HRST_ISP_NIU 119
  189. #define HRST_ISP 120
  190. #define SRST_ISP 121
  191. #define ARST_VIP0 122
  192. #define HRST_VIP0 123
  193. #define PRST_VIP0 124
  194. #define ARST_VIP1 125
  195. #define HRST_VIP1 126
  196. #define PRST_VIP1 127
  197. #define ARST_VIP2 128
  198. #define HRST_VIP2 129
  199. #define PRST_VIP2 120
  200. #define ARST_VIP3 121
  201. #define HRST_VIP3 122
  202. #define PRST_VIP4 123
  203. #define PRST_CIF1TO4 124
  204. #define SRST_CVBS_CLK 125
  205. #define HRST_CVBS 126
  206. #define ARST_VPU_NIU 140
  207. #define HRST_VPU_NIU 141
  208. #define ARST_VPU 142
  209. #define HRST_VPU 143
  210. #define ARST_RKVDEC_NIU 144
  211. #define HRST_RKVDEC_NIU 145
  212. #define ARST_RKVDEC 146
  213. #define HRST_RKVDEC 147
  214. #define SRST_RKVDEC_CABAC 148
  215. #define SRST_RKVDEC_CORE 149
  216. #define ARST_RKVENC_NIU 150
  217. #define HRST_RKVENC_NIU 151
  218. #define ARST_RKVENC 152
  219. #define HRST_RKVENC 153
  220. #define SRST_RKVENC_CORE 154
  221. #define SRST_DSP_CORE 156
  222. #define SRST_DSP_SYS 157
  223. #define SRST_DSP_GLOBAL 158
  224. #define SRST_DSP_OECM 159
  225. #define PRST_DSP_IOP_NIU 160
  226. #define ARST_DSP_EPP_NIU 161
  227. #define ARST_DSP_EDP_NIU 162
  228. #define PRST_DSP_DBG_NIU 163
  229. #define PRST_DSP_CFG_NIU 164
  230. #define PRST_DSP_GRF 165
  231. #define PRST_DSP_MAILBOX 166
  232. #define PRST_DSP_INTC 167
  233. #define PRST_DSP_PFM_MON 169
  234. #define SRST_DSP_PFM_MON 170
  235. #define ARST_DSP_EDAP_NIU 171
  236. #define SRST_PMU 172
  237. #define SRST_PMU_I2C0 173
  238. #define PRST_PMU_I2C0 174
  239. #define PRST_PMU_GPIO0 175
  240. #define PRST_PMU_INTMEM 176
  241. #define PRST_PMU_PWM0 177
  242. #define SRST_PMU_PWM0 178
  243. #define PRST_PMU_GRF 179
  244. #define SRST_PMU_NIU 180
  245. #define SRST_PMU_PVTM 181
  246. #define ARST_DSP_EDP_PERF 184
  247. #define ARST_DSP_EPP_PERF 185
  248. #endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */