mmc.c 42 KB

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  1. /*
  2. * Copyright 2008, Freescale Semiconductor, Inc
  3. * Andy Fleming
  4. *
  5. * Based vaguely on the Linux code
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <config.h>
  10. #include <common.h>
  11. #include <command.h>
  12. #include <dm.h>
  13. #include <dm/device-internal.h>
  14. #include <errno.h>
  15. #include <mmc.h>
  16. #include <part.h>
  17. #include <malloc.h>
  18. #include <memalign.h>
  19. #include <linux/list.h>
  20. #include <div64.h>
  21. #include "mmc_private.h"
  22. static struct list_head mmc_devices;
  23. static int cur_dev_num = -1;
  24. __weak int board_mmc_getwp(struct mmc *mmc)
  25. {
  26. return -1;
  27. }
  28. int mmc_getwp(struct mmc *mmc)
  29. {
  30. int wp;
  31. wp = board_mmc_getwp(mmc);
  32. if (wp < 0) {
  33. if (mmc->cfg->ops->getwp)
  34. wp = mmc->cfg->ops->getwp(mmc);
  35. else
  36. wp = 0;
  37. }
  38. return wp;
  39. }
  40. __weak int board_mmc_getcd(struct mmc *mmc)
  41. {
  42. return -1;
  43. }
  44. int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
  45. {
  46. int ret;
  47. #ifdef CONFIG_MMC_TRACE
  48. int i;
  49. u8 *ptr;
  50. printf("CMD_SEND:%d\n", cmd->cmdidx);
  51. printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  52. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  53. switch (cmd->resp_type) {
  54. case MMC_RSP_NONE:
  55. printf("\t\tMMC_RSP_NONE\n");
  56. break;
  57. case MMC_RSP_R1:
  58. printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  59. cmd->response[0]);
  60. break;
  61. case MMC_RSP_R1b:
  62. printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  63. cmd->response[0]);
  64. break;
  65. case MMC_RSP_R2:
  66. printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  67. cmd->response[0]);
  68. printf("\t\t \t\t 0x%08X \n",
  69. cmd->response[1]);
  70. printf("\t\t \t\t 0x%08X \n",
  71. cmd->response[2]);
  72. printf("\t\t \t\t 0x%08X \n",
  73. cmd->response[3]);
  74. printf("\n");
  75. printf("\t\t\t\t\tDUMPING DATA\n");
  76. for (i = 0; i < 4; i++) {
  77. int j;
  78. printf("\t\t\t\t\t%03d - ", i*4);
  79. ptr = (u8 *)&cmd->response[i];
  80. ptr += 3;
  81. for (j = 0; j < 4; j++)
  82. printf("%02X ", *ptr--);
  83. printf("\n");
  84. }
  85. break;
  86. case MMC_RSP_R3:
  87. printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
  88. cmd->response[0]);
  89. break;
  90. default:
  91. printf("\t\tERROR MMC rsp not supported\n");
  92. break;
  93. }
  94. #else
  95. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  96. #endif
  97. return ret;
  98. }
  99. int mmc_send_status(struct mmc *mmc, int timeout)
  100. {
  101. struct mmc_cmd cmd;
  102. int err, retries = 5;
  103. #ifdef CONFIG_MMC_TRACE
  104. int status;
  105. #endif
  106. cmd.cmdidx = MMC_CMD_SEND_STATUS;
  107. cmd.resp_type = MMC_RSP_R1;
  108. if (!mmc_host_is_spi(mmc))
  109. cmd.cmdarg = mmc->rca << 16;
  110. while (1) {
  111. err = mmc_send_cmd(mmc, &cmd, NULL);
  112. if (!err) {
  113. if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
  114. (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
  115. MMC_STATE_PRG)
  116. break;
  117. else if (cmd.response[0] & MMC_STATUS_MASK) {
  118. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  119. printf("Status Error: 0x%08X\n",
  120. cmd.response[0]);
  121. #endif
  122. return COMM_ERR;
  123. }
  124. } else if (--retries < 0)
  125. return err;
  126. if (timeout-- <= 0)
  127. break;
  128. udelay(1000);
  129. }
  130. #ifdef CONFIG_MMC_TRACE
  131. status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
  132. printf("CURR STATE:%d\n", status);
  133. #endif
  134. if (timeout <= 0) {
  135. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  136. printf("Timeout waiting card ready\n");
  137. #endif
  138. return TIMEOUT;
  139. }
  140. if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
  141. return SWITCH_ERR;
  142. return 0;
  143. }
  144. int mmc_set_blocklen(struct mmc *mmc, int len)
  145. {
  146. struct mmc_cmd cmd;
  147. if (mmc->ddr_mode)
  148. return 0;
  149. cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
  150. cmd.resp_type = MMC_RSP_R1;
  151. cmd.cmdarg = len;
  152. return mmc_send_cmd(mmc, &cmd, NULL);
  153. }
  154. struct mmc *find_mmc_device(int dev_num)
  155. {
  156. struct mmc *m;
  157. struct list_head *entry;
  158. list_for_each(entry, &mmc_devices) {
  159. m = list_entry(entry, struct mmc, link);
  160. if (m->block_dev.dev == dev_num)
  161. return m;
  162. }
  163. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  164. printf("MMC Device %d not found\n", dev_num);
  165. #endif
  166. return NULL;
  167. }
  168. static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
  169. lbaint_t blkcnt)
  170. {
  171. struct mmc_cmd cmd;
  172. struct mmc_data data;
  173. if (blkcnt > 1)
  174. cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
  175. else
  176. cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
  177. if (mmc->high_capacity)
  178. cmd.cmdarg = start;
  179. else
  180. cmd.cmdarg = start * mmc->read_bl_len;
  181. cmd.resp_type = MMC_RSP_R1;
  182. data.dest = dst;
  183. data.blocks = blkcnt;
  184. data.blocksize = mmc->read_bl_len;
  185. data.flags = MMC_DATA_READ;
  186. if (mmc_send_cmd(mmc, &cmd, &data))
  187. return 0;
  188. if (blkcnt > 1) {
  189. cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
  190. cmd.cmdarg = 0;
  191. cmd.resp_type = MMC_RSP_R1b;
  192. if (mmc_send_cmd(mmc, &cmd, NULL)) {
  193. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  194. printf("mmc fail to send stop cmd\n");
  195. #endif
  196. return 0;
  197. }
  198. }
  199. return blkcnt;
  200. }
  201. static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
  202. {
  203. lbaint_t cur, blocks_todo = blkcnt;
  204. if (blkcnt == 0)
  205. return 0;
  206. struct mmc *mmc = find_mmc_device(dev_num);
  207. if (!mmc)
  208. return 0;
  209. if ((start + blkcnt) > mmc->block_dev.lba) {
  210. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  211. printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
  212. start + blkcnt, mmc->block_dev.lba);
  213. #endif
  214. return 0;
  215. }
  216. if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
  217. debug("%s: Failed to set blocklen\n", __func__);
  218. return 0;
  219. }
  220. do {
  221. cur = (blocks_todo > mmc->cfg->b_max) ?
  222. mmc->cfg->b_max : blocks_todo;
  223. if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
  224. debug("%s: Failed to read blocks\n", __func__);
  225. return 0;
  226. }
  227. blocks_todo -= cur;
  228. start += cur;
  229. dst += cur * mmc->read_bl_len;
  230. } while (blocks_todo > 0);
  231. return blkcnt;
  232. }
  233. static int mmc_go_idle(struct mmc *mmc)
  234. {
  235. struct mmc_cmd cmd;
  236. int err;
  237. udelay(1000);
  238. cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
  239. cmd.cmdarg = 0;
  240. cmd.resp_type = MMC_RSP_NONE;
  241. err = mmc_send_cmd(mmc, &cmd, NULL);
  242. if (err)
  243. return err;
  244. udelay(2000);
  245. return 0;
  246. }
  247. static int sd_send_op_cond(struct mmc *mmc)
  248. {
  249. int timeout = 1000;
  250. int err;
  251. struct mmc_cmd cmd;
  252. while (1) {
  253. cmd.cmdidx = MMC_CMD_APP_CMD;
  254. cmd.resp_type = MMC_RSP_R1;
  255. cmd.cmdarg = 0;
  256. err = mmc_send_cmd(mmc, &cmd, NULL);
  257. if (err)
  258. return err;
  259. cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
  260. cmd.resp_type = MMC_RSP_R3;
  261. /*
  262. * Most cards do not answer if some reserved bits
  263. * in the ocr are set. However, Some controller
  264. * can set bit 7 (reserved for low voltages), but
  265. * how to manage low voltages SD card is not yet
  266. * specified.
  267. */
  268. cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
  269. (mmc->cfg->voltages & 0xff8000);
  270. if (mmc->version == SD_VERSION_2)
  271. cmd.cmdarg |= OCR_HCS;
  272. err = mmc_send_cmd(mmc, &cmd, NULL);
  273. if (err)
  274. return err;
  275. if (cmd.response[0] & OCR_BUSY)
  276. break;
  277. if (timeout-- <= 0)
  278. return UNUSABLE_ERR;
  279. udelay(1000);
  280. }
  281. if (mmc->version != SD_VERSION_2)
  282. mmc->version = SD_VERSION_1_0;
  283. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  284. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  285. cmd.resp_type = MMC_RSP_R3;
  286. cmd.cmdarg = 0;
  287. err = mmc_send_cmd(mmc, &cmd, NULL);
  288. if (err)
  289. return err;
  290. }
  291. mmc->ocr = cmd.response[0];
  292. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  293. mmc->rca = 0;
  294. return 0;
  295. }
  296. static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
  297. {
  298. struct mmc_cmd cmd;
  299. int err;
  300. cmd.cmdidx = MMC_CMD_SEND_OP_COND;
  301. cmd.resp_type = MMC_RSP_R3;
  302. cmd.cmdarg = 0;
  303. if (use_arg && !mmc_host_is_spi(mmc))
  304. cmd.cmdarg = OCR_HCS |
  305. (mmc->cfg->voltages &
  306. (mmc->ocr & OCR_VOLTAGE_MASK)) |
  307. (mmc->ocr & OCR_ACCESS_MODE);
  308. err = mmc_send_cmd(mmc, &cmd, NULL);
  309. if (err)
  310. return err;
  311. mmc->ocr = cmd.response[0];
  312. return 0;
  313. }
  314. static int mmc_send_op_cond(struct mmc *mmc)
  315. {
  316. int err, i;
  317. /* Some cards seem to need this */
  318. mmc_go_idle(mmc);
  319. /* Asking to the card its capabilities */
  320. for (i = 0; i < 2; i++) {
  321. err = mmc_send_op_cond_iter(mmc, i != 0);
  322. if (err)
  323. return err;
  324. /* exit if not busy (flag seems to be inverted) */
  325. if (mmc->ocr & OCR_BUSY)
  326. break;
  327. }
  328. mmc->op_cond_pending = 1;
  329. return 0;
  330. }
  331. static int mmc_complete_op_cond(struct mmc *mmc)
  332. {
  333. struct mmc_cmd cmd;
  334. int timeout = 1000;
  335. uint start;
  336. int err;
  337. mmc->op_cond_pending = 0;
  338. if (!(mmc->ocr & OCR_BUSY)) {
  339. start = get_timer(0);
  340. while (1) {
  341. err = mmc_send_op_cond_iter(mmc, 1);
  342. if (err)
  343. return err;
  344. if (mmc->ocr & OCR_BUSY)
  345. break;
  346. if (get_timer(start) > timeout)
  347. return UNUSABLE_ERR;
  348. udelay(100);
  349. }
  350. }
  351. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  352. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  353. cmd.resp_type = MMC_RSP_R3;
  354. cmd.cmdarg = 0;
  355. err = mmc_send_cmd(mmc, &cmd, NULL);
  356. if (err)
  357. return err;
  358. mmc->ocr = cmd.response[0];
  359. }
  360. mmc->version = MMC_VERSION_UNKNOWN;
  361. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  362. mmc->rca = 1;
  363. return 0;
  364. }
  365. static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
  366. {
  367. struct mmc_cmd cmd;
  368. struct mmc_data data;
  369. int err;
  370. /* Get the Card Status Register */
  371. cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
  372. cmd.resp_type = MMC_RSP_R1;
  373. cmd.cmdarg = 0;
  374. data.dest = (char *)ext_csd;
  375. data.blocks = 1;
  376. data.blocksize = MMC_MAX_BLOCK_LEN;
  377. data.flags = MMC_DATA_READ;
  378. err = mmc_send_cmd(mmc, &cmd, &data);
  379. return err;
  380. }
  381. static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
  382. {
  383. struct mmc_cmd cmd;
  384. int timeout = 1000;
  385. int ret;
  386. cmd.cmdidx = MMC_CMD_SWITCH;
  387. cmd.resp_type = MMC_RSP_R1b;
  388. cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
  389. (index << 16) |
  390. (value << 8);
  391. ret = mmc_send_cmd(mmc, &cmd, NULL);
  392. /* Waiting for the ready status */
  393. if (!ret)
  394. ret = mmc_send_status(mmc, timeout);
  395. return ret;
  396. }
  397. static int mmc_change_freq(struct mmc *mmc)
  398. {
  399. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  400. char cardtype;
  401. int err;
  402. mmc->card_caps = 0;
  403. if (mmc_host_is_spi(mmc))
  404. return 0;
  405. /* Only version 4 supports high-speed */
  406. if (mmc->version < MMC_VERSION_4)
  407. return 0;
  408. mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
  409. err = mmc_send_ext_csd(mmc, ext_csd);
  410. if (err)
  411. return err;
  412. cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
  413. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
  414. if (err)
  415. return err == SWITCH_ERR ? 0 : err;
  416. /* Now check to see that it worked */
  417. err = mmc_send_ext_csd(mmc, ext_csd);
  418. if (err)
  419. return err;
  420. /* No high-speed support */
  421. if (!ext_csd[EXT_CSD_HS_TIMING])
  422. return 0;
  423. /* High Speed is set, there are two types: 52MHz and 26MHz */
  424. if (cardtype & EXT_CSD_CARD_TYPE_52) {
  425. if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
  426. mmc->card_caps |= MMC_MODE_DDR_52MHz;
  427. mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
  428. } else {
  429. mmc->card_caps |= MMC_MODE_HS;
  430. }
  431. return 0;
  432. }
  433. static int mmc_set_capacity(struct mmc *mmc, int part_num)
  434. {
  435. switch (part_num) {
  436. case 0:
  437. mmc->capacity = mmc->capacity_user;
  438. break;
  439. case 1:
  440. case 2:
  441. mmc->capacity = mmc->capacity_boot;
  442. break;
  443. case 3:
  444. mmc->capacity = mmc->capacity_rpmb;
  445. break;
  446. case 4:
  447. case 5:
  448. case 6:
  449. case 7:
  450. mmc->capacity = mmc->capacity_gp[part_num - 4];
  451. break;
  452. default:
  453. return -1;
  454. }
  455. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  456. return 0;
  457. }
  458. int mmc_select_hwpart(int dev_num, int hwpart)
  459. {
  460. struct mmc *mmc = find_mmc_device(dev_num);
  461. int ret;
  462. if (!mmc)
  463. return -ENODEV;
  464. if (mmc->part_num == hwpart)
  465. return 0;
  466. if (mmc->part_config == MMCPART_NOAVAILABLE) {
  467. printf("Card doesn't support part_switch\n");
  468. return -EMEDIUMTYPE;
  469. }
  470. ret = mmc_switch_part(dev_num, hwpart);
  471. if (ret)
  472. return ret;
  473. mmc->part_num = hwpart;
  474. return 0;
  475. }
  476. int mmc_switch_part(int dev_num, unsigned int part_num)
  477. {
  478. struct mmc *mmc = find_mmc_device(dev_num);
  479. int ret;
  480. if (!mmc)
  481. return -1;
  482. ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  483. (mmc->part_config & ~PART_ACCESS_MASK)
  484. | (part_num & PART_ACCESS_MASK));
  485. /*
  486. * Set the capacity if the switch succeeded or was intended
  487. * to return to representing the raw device.
  488. */
  489. if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
  490. ret = mmc_set_capacity(mmc, part_num);
  491. return ret;
  492. }
  493. int mmc_hwpart_config(struct mmc *mmc,
  494. const struct mmc_hwpart_conf *conf,
  495. enum mmc_hwpart_conf_mode mode)
  496. {
  497. u8 part_attrs = 0;
  498. u32 enh_size_mult;
  499. u32 enh_start_addr;
  500. u32 gp_size_mult[4];
  501. u32 max_enh_size_mult;
  502. u32 tot_enh_size_mult = 0;
  503. u8 wr_rel_set;
  504. int i, pidx, err;
  505. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  506. if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
  507. return -EINVAL;
  508. if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
  509. printf("eMMC >= 4.4 required for enhanced user data area\n");
  510. return -EMEDIUMTYPE;
  511. }
  512. if (!(mmc->part_support & PART_SUPPORT)) {
  513. printf("Card does not support partitioning\n");
  514. return -EMEDIUMTYPE;
  515. }
  516. if (!mmc->hc_wp_grp_size) {
  517. printf("Card does not define HC WP group size\n");
  518. return -EMEDIUMTYPE;
  519. }
  520. /* check partition alignment and total enhanced size */
  521. if (conf->user.enh_size) {
  522. if (conf->user.enh_size % mmc->hc_wp_grp_size ||
  523. conf->user.enh_start % mmc->hc_wp_grp_size) {
  524. printf("User data enhanced area not HC WP group "
  525. "size aligned\n");
  526. return -EINVAL;
  527. }
  528. part_attrs |= EXT_CSD_ENH_USR;
  529. enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
  530. if (mmc->high_capacity) {
  531. enh_start_addr = conf->user.enh_start;
  532. } else {
  533. enh_start_addr = (conf->user.enh_start << 9);
  534. }
  535. } else {
  536. enh_size_mult = 0;
  537. enh_start_addr = 0;
  538. }
  539. tot_enh_size_mult += enh_size_mult;
  540. for (pidx = 0; pidx < 4; pidx++) {
  541. if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
  542. printf("GP%i partition not HC WP group size "
  543. "aligned\n", pidx+1);
  544. return -EINVAL;
  545. }
  546. gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
  547. if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
  548. part_attrs |= EXT_CSD_ENH_GP(pidx);
  549. tot_enh_size_mult += gp_size_mult[pidx];
  550. }
  551. }
  552. if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
  553. printf("Card does not support enhanced attribute\n");
  554. return -EMEDIUMTYPE;
  555. }
  556. err = mmc_send_ext_csd(mmc, ext_csd);
  557. if (err)
  558. return err;
  559. max_enh_size_mult =
  560. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
  561. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
  562. ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
  563. if (tot_enh_size_mult > max_enh_size_mult) {
  564. printf("Total enhanced size exceeds maximum (%u > %u)\n",
  565. tot_enh_size_mult, max_enh_size_mult);
  566. return -EMEDIUMTYPE;
  567. }
  568. /* The default value of EXT_CSD_WR_REL_SET is device
  569. * dependent, the values can only be changed if the
  570. * EXT_CSD_HS_CTRL_REL bit is set. The values can be
  571. * changed only once and before partitioning is completed. */
  572. wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  573. if (conf->user.wr_rel_change) {
  574. if (conf->user.wr_rel_set)
  575. wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
  576. else
  577. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
  578. }
  579. for (pidx = 0; pidx < 4; pidx++) {
  580. if (conf->gp_part[pidx].wr_rel_change) {
  581. if (conf->gp_part[pidx].wr_rel_set)
  582. wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
  583. else
  584. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
  585. }
  586. }
  587. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
  588. !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
  589. puts("Card does not support host controlled partition write "
  590. "reliability settings\n");
  591. return -EMEDIUMTYPE;
  592. }
  593. if (ext_csd[EXT_CSD_PARTITION_SETTING] &
  594. EXT_CSD_PARTITION_SETTING_COMPLETED) {
  595. printf("Card already partitioned\n");
  596. return -EPERM;
  597. }
  598. if (mode == MMC_HWPART_CONF_CHECK)
  599. return 0;
  600. /* Partitioning requires high-capacity size definitions */
  601. if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
  602. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  603. EXT_CSD_ERASE_GROUP_DEF, 1);
  604. if (err)
  605. return err;
  606. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  607. /* update erase group size to be high-capacity */
  608. mmc->erase_grp_size =
  609. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  610. }
  611. /* all OK, write the configuration */
  612. for (i = 0; i < 4; i++) {
  613. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  614. EXT_CSD_ENH_START_ADDR+i,
  615. (enh_start_addr >> (i*8)) & 0xFF);
  616. if (err)
  617. return err;
  618. }
  619. for (i = 0; i < 3; i++) {
  620. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  621. EXT_CSD_ENH_SIZE_MULT+i,
  622. (enh_size_mult >> (i*8)) & 0xFF);
  623. if (err)
  624. return err;
  625. }
  626. for (pidx = 0; pidx < 4; pidx++) {
  627. for (i = 0; i < 3; i++) {
  628. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  629. EXT_CSD_GP_SIZE_MULT+pidx*3+i,
  630. (gp_size_mult[pidx] >> (i*8)) & 0xFF);
  631. if (err)
  632. return err;
  633. }
  634. }
  635. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  636. EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
  637. if (err)
  638. return err;
  639. if (mode == MMC_HWPART_CONF_SET)
  640. return 0;
  641. /* The WR_REL_SET is a write-once register but shall be
  642. * written before setting PART_SETTING_COMPLETED. As it is
  643. * write-once we can only write it when completing the
  644. * partitioning. */
  645. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
  646. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  647. EXT_CSD_WR_REL_SET, wr_rel_set);
  648. if (err)
  649. return err;
  650. }
  651. /* Setting PART_SETTING_COMPLETED confirms the partition
  652. * configuration but it only becomes effective after power
  653. * cycle, so we do not adjust the partition related settings
  654. * in the mmc struct. */
  655. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  656. EXT_CSD_PARTITION_SETTING,
  657. EXT_CSD_PARTITION_SETTING_COMPLETED);
  658. if (err)
  659. return err;
  660. return 0;
  661. }
  662. int mmc_getcd(struct mmc *mmc)
  663. {
  664. int cd;
  665. cd = board_mmc_getcd(mmc);
  666. if (cd < 0) {
  667. if (mmc->cfg->ops->getcd)
  668. cd = mmc->cfg->ops->getcd(mmc);
  669. else
  670. cd = 1;
  671. }
  672. return cd;
  673. }
  674. static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
  675. {
  676. struct mmc_cmd cmd;
  677. struct mmc_data data;
  678. /* Switch the frequency */
  679. cmd.cmdidx = SD_CMD_SWITCH_FUNC;
  680. cmd.resp_type = MMC_RSP_R1;
  681. cmd.cmdarg = (mode << 31) | 0xffffff;
  682. cmd.cmdarg &= ~(0xf << (group * 4));
  683. cmd.cmdarg |= value << (group * 4);
  684. data.dest = (char *)resp;
  685. data.blocksize = 64;
  686. data.blocks = 1;
  687. data.flags = MMC_DATA_READ;
  688. return mmc_send_cmd(mmc, &cmd, &data);
  689. }
  690. static int sd_change_freq(struct mmc *mmc)
  691. {
  692. int err;
  693. struct mmc_cmd cmd;
  694. ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
  695. ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
  696. struct mmc_data data;
  697. int timeout;
  698. mmc->card_caps = 0;
  699. if (mmc_host_is_spi(mmc))
  700. return 0;
  701. /* Read the SCR to find out if this card supports higher speeds */
  702. cmd.cmdidx = MMC_CMD_APP_CMD;
  703. cmd.resp_type = MMC_RSP_R1;
  704. cmd.cmdarg = mmc->rca << 16;
  705. err = mmc_send_cmd(mmc, &cmd, NULL);
  706. if (err)
  707. return err;
  708. cmd.cmdidx = SD_CMD_APP_SEND_SCR;
  709. cmd.resp_type = MMC_RSP_R1;
  710. cmd.cmdarg = 0;
  711. timeout = 3;
  712. retry_scr:
  713. data.dest = (char *)scr;
  714. data.blocksize = 8;
  715. data.blocks = 1;
  716. data.flags = MMC_DATA_READ;
  717. err = mmc_send_cmd(mmc, &cmd, &data);
  718. if (err) {
  719. if (timeout--)
  720. goto retry_scr;
  721. return err;
  722. }
  723. mmc->scr[0] = __be32_to_cpu(scr[0]);
  724. mmc->scr[1] = __be32_to_cpu(scr[1]);
  725. switch ((mmc->scr[0] >> 24) & 0xf) {
  726. case 0:
  727. mmc->version = SD_VERSION_1_0;
  728. break;
  729. case 1:
  730. mmc->version = SD_VERSION_1_10;
  731. break;
  732. case 2:
  733. mmc->version = SD_VERSION_2;
  734. if ((mmc->scr[0] >> 15) & 0x1)
  735. mmc->version = SD_VERSION_3;
  736. break;
  737. default:
  738. mmc->version = SD_VERSION_1_0;
  739. break;
  740. }
  741. if (mmc->scr[0] & SD_DATA_4BIT)
  742. mmc->card_caps |= MMC_MODE_4BIT;
  743. /* Version 1.0 doesn't support switching */
  744. if (mmc->version == SD_VERSION_1_0)
  745. return 0;
  746. timeout = 4;
  747. while (timeout--) {
  748. err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
  749. (u8 *)switch_status);
  750. if (err)
  751. return err;
  752. /* The high-speed function is busy. Try again */
  753. if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
  754. break;
  755. }
  756. /* If high-speed isn't supported, we return */
  757. if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
  758. return 0;
  759. /*
  760. * If the host doesn't support SD_HIGHSPEED, do not switch card to
  761. * HIGHSPEED mode even if the card support SD_HIGHSPPED.
  762. * This can avoid furthur problem when the card runs in different
  763. * mode between the host.
  764. */
  765. if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
  766. (mmc->cfg->host_caps & MMC_MODE_HS)))
  767. return 0;
  768. err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
  769. if (err)
  770. return err;
  771. if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
  772. mmc->card_caps |= MMC_MODE_HS;
  773. return 0;
  774. }
  775. /* frequency bases */
  776. /* divided by 10 to be nice to platforms without floating point */
  777. static const int fbase[] = {
  778. 10000,
  779. 100000,
  780. 1000000,
  781. 10000000,
  782. };
  783. /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
  784. * to platforms without floating point.
  785. */
  786. static const int multipliers[] = {
  787. 0, /* reserved */
  788. 10,
  789. 12,
  790. 13,
  791. 15,
  792. 20,
  793. 25,
  794. 30,
  795. 35,
  796. 40,
  797. 45,
  798. 50,
  799. 55,
  800. 60,
  801. 70,
  802. 80,
  803. };
  804. static void mmc_set_ios(struct mmc *mmc)
  805. {
  806. if (mmc->cfg->ops->set_ios)
  807. mmc->cfg->ops->set_ios(mmc);
  808. }
  809. void mmc_set_clock(struct mmc *mmc, uint clock)
  810. {
  811. if (clock > mmc->cfg->f_max)
  812. clock = mmc->cfg->f_max;
  813. if (clock < mmc->cfg->f_min)
  814. clock = mmc->cfg->f_min;
  815. mmc->clock = clock;
  816. mmc_set_ios(mmc);
  817. }
  818. static void mmc_set_bus_width(struct mmc *mmc, uint width)
  819. {
  820. mmc->bus_width = width;
  821. mmc_set_ios(mmc);
  822. }
  823. static int mmc_startup(struct mmc *mmc)
  824. {
  825. int err, i;
  826. uint mult, freq;
  827. u64 cmult, csize, capacity;
  828. struct mmc_cmd cmd;
  829. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  830. ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
  831. int timeout = 1000;
  832. bool has_parts = false;
  833. bool part_completed;
  834. #ifdef CONFIG_MMC_SPI_CRC_ON
  835. if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
  836. cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
  837. cmd.resp_type = MMC_RSP_R1;
  838. cmd.cmdarg = 1;
  839. err = mmc_send_cmd(mmc, &cmd, NULL);
  840. if (err)
  841. return err;
  842. }
  843. #endif
  844. /* Put the Card in Identify Mode */
  845. cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
  846. MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
  847. cmd.resp_type = MMC_RSP_R2;
  848. cmd.cmdarg = 0;
  849. err = mmc_send_cmd(mmc, &cmd, NULL);
  850. if (err)
  851. return err;
  852. memcpy(mmc->cid, cmd.response, 16);
  853. /*
  854. * For MMC cards, set the Relative Address.
  855. * For SD cards, get the Relatvie Address.
  856. * This also puts the cards into Standby State
  857. */
  858. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  859. cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
  860. cmd.cmdarg = mmc->rca << 16;
  861. cmd.resp_type = MMC_RSP_R6;
  862. err = mmc_send_cmd(mmc, &cmd, NULL);
  863. if (err)
  864. return err;
  865. if (IS_SD(mmc))
  866. mmc->rca = (cmd.response[0] >> 16) & 0xffff;
  867. }
  868. /* Get the Card-Specific Data */
  869. cmd.cmdidx = MMC_CMD_SEND_CSD;
  870. cmd.resp_type = MMC_RSP_R2;
  871. cmd.cmdarg = mmc->rca << 16;
  872. err = mmc_send_cmd(mmc, &cmd, NULL);
  873. /* Waiting for the ready status */
  874. mmc_send_status(mmc, timeout);
  875. if (err)
  876. return err;
  877. mmc->csd[0] = cmd.response[0];
  878. mmc->csd[1] = cmd.response[1];
  879. mmc->csd[2] = cmd.response[2];
  880. mmc->csd[3] = cmd.response[3];
  881. if (mmc->version == MMC_VERSION_UNKNOWN) {
  882. int version = (cmd.response[0] >> 26) & 0xf;
  883. switch (version) {
  884. case 0:
  885. mmc->version = MMC_VERSION_1_2;
  886. break;
  887. case 1:
  888. mmc->version = MMC_VERSION_1_4;
  889. break;
  890. case 2:
  891. mmc->version = MMC_VERSION_2_2;
  892. break;
  893. case 3:
  894. mmc->version = MMC_VERSION_3;
  895. break;
  896. case 4:
  897. mmc->version = MMC_VERSION_4;
  898. break;
  899. default:
  900. mmc->version = MMC_VERSION_1_2;
  901. break;
  902. }
  903. }
  904. /* divide frequency by 10, since the mults are 10x bigger */
  905. freq = fbase[(cmd.response[0] & 0x7)];
  906. mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
  907. mmc->tran_speed = freq * mult;
  908. mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
  909. mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
  910. if (IS_SD(mmc))
  911. mmc->write_bl_len = mmc->read_bl_len;
  912. else
  913. mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
  914. if (mmc->high_capacity) {
  915. csize = (mmc->csd[1] & 0x3f) << 16
  916. | (mmc->csd[2] & 0xffff0000) >> 16;
  917. cmult = 8;
  918. } else {
  919. csize = (mmc->csd[1] & 0x3ff) << 2
  920. | (mmc->csd[2] & 0xc0000000) >> 30;
  921. cmult = (mmc->csd[2] & 0x00038000) >> 15;
  922. }
  923. mmc->capacity_user = (csize + 1) << (cmult + 2);
  924. mmc->capacity_user *= mmc->read_bl_len;
  925. mmc->capacity_boot = 0;
  926. mmc->capacity_rpmb = 0;
  927. for (i = 0; i < 4; i++)
  928. mmc->capacity_gp[i] = 0;
  929. if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
  930. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  931. if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
  932. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  933. if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
  934. cmd.cmdidx = MMC_CMD_SET_DSR;
  935. cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
  936. cmd.resp_type = MMC_RSP_NONE;
  937. if (mmc_send_cmd(mmc, &cmd, NULL))
  938. printf("MMC: SET_DSR failed\n");
  939. }
  940. /* Select the card, and put it into Transfer Mode */
  941. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  942. cmd.cmdidx = MMC_CMD_SELECT_CARD;
  943. cmd.resp_type = MMC_RSP_R1;
  944. cmd.cmdarg = mmc->rca << 16;
  945. err = mmc_send_cmd(mmc, &cmd, NULL);
  946. if (err)
  947. return err;
  948. }
  949. /*
  950. * For SD, its erase group is always one sector
  951. */
  952. mmc->erase_grp_size = 1;
  953. mmc->part_config = MMCPART_NOAVAILABLE;
  954. if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
  955. /* check ext_csd version and capacity */
  956. err = mmc_send_ext_csd(mmc, ext_csd);
  957. if (err)
  958. return err;
  959. if (ext_csd[EXT_CSD_REV] >= 2) {
  960. /*
  961. * According to the JEDEC Standard, the value of
  962. * ext_csd's capacity is valid if the value is more
  963. * than 2GB
  964. */
  965. capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
  966. | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
  967. | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
  968. | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
  969. capacity *= MMC_MAX_BLOCK_LEN;
  970. if ((capacity >> 20) > 2 * 1024)
  971. mmc->capacity_user = capacity;
  972. }
  973. switch (ext_csd[EXT_CSD_REV]) {
  974. case 1:
  975. mmc->version = MMC_VERSION_4_1;
  976. break;
  977. case 2:
  978. mmc->version = MMC_VERSION_4_2;
  979. break;
  980. case 3:
  981. mmc->version = MMC_VERSION_4_3;
  982. break;
  983. case 5:
  984. mmc->version = MMC_VERSION_4_41;
  985. break;
  986. case 6:
  987. mmc->version = MMC_VERSION_4_5;
  988. break;
  989. case 7:
  990. mmc->version = MMC_VERSION_5_0;
  991. break;
  992. }
  993. /* The partition data may be non-zero but it is only
  994. * effective if PARTITION_SETTING_COMPLETED is set in
  995. * EXT_CSD, so ignore any data if this bit is not set,
  996. * except for enabling the high-capacity group size
  997. * definition (see below). */
  998. part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
  999. EXT_CSD_PARTITION_SETTING_COMPLETED);
  1000. /* store the partition info of emmc */
  1001. mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
  1002. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
  1003. ext_csd[EXT_CSD_BOOT_MULT])
  1004. mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
  1005. if (part_completed &&
  1006. (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
  1007. mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
  1008. mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
  1009. mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
  1010. for (i = 0; i < 4; i++) {
  1011. int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
  1012. uint mult = (ext_csd[idx + 2] << 16) +
  1013. (ext_csd[idx + 1] << 8) + ext_csd[idx];
  1014. if (mult)
  1015. has_parts = true;
  1016. if (!part_completed)
  1017. continue;
  1018. mmc->capacity_gp[i] = mult;
  1019. mmc->capacity_gp[i] *=
  1020. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1021. mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1022. mmc->capacity_gp[i] <<= 19;
  1023. }
  1024. if (part_completed) {
  1025. mmc->enh_user_size =
  1026. (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
  1027. (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
  1028. ext_csd[EXT_CSD_ENH_SIZE_MULT];
  1029. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1030. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1031. mmc->enh_user_size <<= 19;
  1032. mmc->enh_user_start =
  1033. (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
  1034. (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
  1035. (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
  1036. ext_csd[EXT_CSD_ENH_START_ADDR];
  1037. if (mmc->high_capacity)
  1038. mmc->enh_user_start <<= 9;
  1039. }
  1040. /*
  1041. * Host needs to enable ERASE_GRP_DEF bit if device is
  1042. * partitioned. This bit will be lost every time after a reset
  1043. * or power off. This will affect erase size.
  1044. */
  1045. if (part_completed)
  1046. has_parts = true;
  1047. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
  1048. (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
  1049. has_parts = true;
  1050. if (has_parts) {
  1051. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1052. EXT_CSD_ERASE_GROUP_DEF, 1);
  1053. if (err)
  1054. return err;
  1055. else
  1056. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  1057. }
  1058. if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
  1059. /* Read out group size from ext_csd */
  1060. mmc->erase_grp_size =
  1061. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  1062. /*
  1063. * if high capacity and partition setting completed
  1064. * SEC_COUNT is valid even if it is smaller than 2 GiB
  1065. * JEDEC Standard JESD84-B45, 6.2.4
  1066. */
  1067. if (mmc->high_capacity && part_completed) {
  1068. capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
  1069. (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
  1070. (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
  1071. (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
  1072. capacity *= MMC_MAX_BLOCK_LEN;
  1073. mmc->capacity_user = capacity;
  1074. }
  1075. } else {
  1076. /* Calculate the group size from the csd value. */
  1077. int erase_gsz, erase_gmul;
  1078. erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
  1079. erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
  1080. mmc->erase_grp_size = (erase_gsz + 1)
  1081. * (erase_gmul + 1);
  1082. }
  1083. mmc->hc_wp_grp_size = 1024
  1084. * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1085. * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1086. mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  1087. }
  1088. err = mmc_set_capacity(mmc, mmc->part_num);
  1089. if (err)
  1090. return err;
  1091. if (IS_SD(mmc))
  1092. err = sd_change_freq(mmc);
  1093. else
  1094. err = mmc_change_freq(mmc);
  1095. if (err)
  1096. return err;
  1097. /* Restrict card's capabilities by what the host can do */
  1098. mmc->card_caps &= mmc->cfg->host_caps;
  1099. if (IS_SD(mmc)) {
  1100. if (mmc->card_caps & MMC_MODE_4BIT) {
  1101. cmd.cmdidx = MMC_CMD_APP_CMD;
  1102. cmd.resp_type = MMC_RSP_R1;
  1103. cmd.cmdarg = mmc->rca << 16;
  1104. err = mmc_send_cmd(mmc, &cmd, NULL);
  1105. if (err)
  1106. return err;
  1107. cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
  1108. cmd.resp_type = MMC_RSP_R1;
  1109. cmd.cmdarg = 2;
  1110. err = mmc_send_cmd(mmc, &cmd, NULL);
  1111. if (err)
  1112. return err;
  1113. mmc_set_bus_width(mmc, 4);
  1114. }
  1115. if (mmc->card_caps & MMC_MODE_HS)
  1116. mmc->tran_speed = 50000000;
  1117. else
  1118. mmc->tran_speed = 25000000;
  1119. } else if (mmc->version >= MMC_VERSION_4) {
  1120. /* Only version 4 of MMC supports wider bus widths */
  1121. int idx;
  1122. /* An array of possible bus widths in order of preference */
  1123. static unsigned ext_csd_bits[] = {
  1124. EXT_CSD_DDR_BUS_WIDTH_8,
  1125. EXT_CSD_DDR_BUS_WIDTH_4,
  1126. EXT_CSD_BUS_WIDTH_8,
  1127. EXT_CSD_BUS_WIDTH_4,
  1128. EXT_CSD_BUS_WIDTH_1,
  1129. };
  1130. /* An array to map CSD bus widths to host cap bits */
  1131. static unsigned ext_to_hostcaps[] = {
  1132. [EXT_CSD_DDR_BUS_WIDTH_4] =
  1133. MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
  1134. [EXT_CSD_DDR_BUS_WIDTH_8] =
  1135. MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
  1136. [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
  1137. [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
  1138. };
  1139. /* An array to map chosen bus width to an integer */
  1140. static unsigned widths[] = {
  1141. 8, 4, 8, 4, 1,
  1142. };
  1143. for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
  1144. unsigned int extw = ext_csd_bits[idx];
  1145. unsigned int caps = ext_to_hostcaps[extw];
  1146. /*
  1147. * If the bus width is still not changed,
  1148. * don't try to set the default again.
  1149. * Otherwise, recover from switch attempts
  1150. * by switching to 1-bit bus width.
  1151. */
  1152. if (extw == EXT_CSD_BUS_WIDTH_1 &&
  1153. mmc->bus_width == 1) {
  1154. err = 0;
  1155. break;
  1156. }
  1157. /*
  1158. * Check to make sure the card and controller support
  1159. * these capabilities
  1160. */
  1161. if ((mmc->card_caps & caps) != caps)
  1162. continue;
  1163. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1164. EXT_CSD_BUS_WIDTH, extw);
  1165. if (err)
  1166. continue;
  1167. mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
  1168. mmc_set_bus_width(mmc, widths[idx]);
  1169. err = mmc_send_ext_csd(mmc, test_csd);
  1170. if (err)
  1171. continue;
  1172. /* Only compare read only fields */
  1173. if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
  1174. == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
  1175. ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
  1176. == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
  1177. ext_csd[EXT_CSD_REV]
  1178. == test_csd[EXT_CSD_REV] &&
  1179. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1180. == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
  1181. memcmp(&ext_csd[EXT_CSD_SEC_CNT],
  1182. &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
  1183. break;
  1184. else
  1185. err = SWITCH_ERR;
  1186. }
  1187. if (err)
  1188. return err;
  1189. if (mmc->card_caps & MMC_MODE_HS) {
  1190. if (mmc->card_caps & MMC_MODE_HS_52MHz)
  1191. mmc->tran_speed = 52000000;
  1192. else
  1193. mmc->tran_speed = 26000000;
  1194. }
  1195. }
  1196. mmc_set_clock(mmc, mmc->tran_speed);
  1197. /* Fix the block length for DDR mode */
  1198. if (mmc->ddr_mode) {
  1199. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  1200. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  1201. }
  1202. /* fill in device description */
  1203. mmc->block_dev.lun = 0;
  1204. mmc->block_dev.type = 0;
  1205. mmc->block_dev.blksz = mmc->read_bl_len;
  1206. mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
  1207. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  1208. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1209. sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
  1210. mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
  1211. (mmc->cid[3] >> 16) & 0xffff);
  1212. sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
  1213. (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
  1214. (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
  1215. (mmc->cid[2] >> 24) & 0xff);
  1216. sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
  1217. (mmc->cid[2] >> 16) & 0xf);
  1218. #else
  1219. mmc->block_dev.vendor[0] = 0;
  1220. mmc->block_dev.product[0] = 0;
  1221. mmc->block_dev.revision[0] = 0;
  1222. #endif
  1223. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
  1224. init_part(&mmc->block_dev);
  1225. #endif
  1226. return 0;
  1227. }
  1228. static int mmc_send_if_cond(struct mmc *mmc)
  1229. {
  1230. struct mmc_cmd cmd;
  1231. int err;
  1232. cmd.cmdidx = SD_CMD_SEND_IF_COND;
  1233. /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
  1234. cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
  1235. cmd.resp_type = MMC_RSP_R7;
  1236. err = mmc_send_cmd(mmc, &cmd, NULL);
  1237. if (err)
  1238. return err;
  1239. if ((cmd.response[0] & 0xff) != 0xaa)
  1240. return UNUSABLE_ERR;
  1241. else
  1242. mmc->version = SD_VERSION_2;
  1243. return 0;
  1244. }
  1245. /* not used any more */
  1246. int __deprecated mmc_register(struct mmc *mmc)
  1247. {
  1248. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1249. printf("%s is deprecated! use mmc_create() instead.\n", __func__);
  1250. #endif
  1251. return -1;
  1252. }
  1253. struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
  1254. {
  1255. struct mmc *mmc;
  1256. /* quick validation */
  1257. if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
  1258. cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
  1259. return NULL;
  1260. mmc = calloc(1, sizeof(*mmc));
  1261. if (mmc == NULL)
  1262. return NULL;
  1263. mmc->cfg = cfg;
  1264. mmc->priv = priv;
  1265. /* the following chunk was mmc_register() */
  1266. /* Setup dsr related values */
  1267. mmc->dsr_imp = 0;
  1268. mmc->dsr = 0xffffffff;
  1269. /* Setup the universal parts of the block interface just once */
  1270. mmc->block_dev.if_type = IF_TYPE_MMC;
  1271. mmc->block_dev.dev = cur_dev_num++;
  1272. mmc->block_dev.removable = 1;
  1273. mmc->block_dev.block_read = mmc_bread;
  1274. mmc->block_dev.block_write = mmc_bwrite;
  1275. mmc->block_dev.block_erase = mmc_berase;
  1276. /* setup initial part type */
  1277. mmc->block_dev.part_type = mmc->cfg->part_type;
  1278. INIT_LIST_HEAD(&mmc->link);
  1279. list_add_tail(&mmc->link, &mmc_devices);
  1280. return mmc;
  1281. }
  1282. void mmc_destroy(struct mmc *mmc)
  1283. {
  1284. /* only freeing memory for now */
  1285. free(mmc);
  1286. }
  1287. #ifdef CONFIG_PARTITIONS
  1288. block_dev_desc_t *mmc_get_dev(int dev)
  1289. {
  1290. struct mmc *mmc = find_mmc_device(dev);
  1291. if (!mmc || mmc_init(mmc))
  1292. return NULL;
  1293. return &mmc->block_dev;
  1294. }
  1295. #endif
  1296. /* board-specific MMC power initializations. */
  1297. __weak void board_mmc_power_init(void)
  1298. {
  1299. }
  1300. int mmc_start_init(struct mmc *mmc)
  1301. {
  1302. int err;
  1303. /* we pretend there's no card when init is NULL */
  1304. if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
  1305. mmc->has_init = 0;
  1306. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1307. printf("MMC: no card present\n");
  1308. #endif
  1309. return NO_CARD_ERR;
  1310. }
  1311. if (mmc->has_init)
  1312. return 0;
  1313. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1314. mmc_adapter_card_type_ident();
  1315. #endif
  1316. board_mmc_power_init();
  1317. /* made sure it's not NULL earlier */
  1318. err = mmc->cfg->ops->init(mmc);
  1319. if (err)
  1320. return err;
  1321. mmc->ddr_mode = 0;
  1322. mmc_set_bus_width(mmc, 1);
  1323. mmc_set_clock(mmc, 1);
  1324. /* Reset the Card */
  1325. err = mmc_go_idle(mmc);
  1326. if (err)
  1327. return err;
  1328. /* The internal partition reset to user partition(0) at every CMD0*/
  1329. mmc->part_num = 0;
  1330. /* Test for SD version 2 */
  1331. err = mmc_send_if_cond(mmc);
  1332. /* Now try to get the SD card's operating condition */
  1333. err = sd_send_op_cond(mmc);
  1334. /* If the command timed out, we check for an MMC card */
  1335. if (err == TIMEOUT) {
  1336. err = mmc_send_op_cond(mmc);
  1337. if (err) {
  1338. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1339. printf("Card did not respond to voltage select!\n");
  1340. #endif
  1341. return UNUSABLE_ERR;
  1342. }
  1343. }
  1344. if (!err)
  1345. mmc->init_in_progress = 1;
  1346. return err;
  1347. }
  1348. static int mmc_complete_init(struct mmc *mmc)
  1349. {
  1350. int err = 0;
  1351. mmc->init_in_progress = 0;
  1352. if (mmc->op_cond_pending)
  1353. err = mmc_complete_op_cond(mmc);
  1354. if (!err)
  1355. err = mmc_startup(mmc);
  1356. if (err)
  1357. mmc->has_init = 0;
  1358. else
  1359. mmc->has_init = 1;
  1360. return err;
  1361. }
  1362. int mmc_init(struct mmc *mmc)
  1363. {
  1364. int err = 0;
  1365. unsigned start;
  1366. if (mmc->has_init)
  1367. return 0;
  1368. start = get_timer(0);
  1369. if (!mmc->init_in_progress)
  1370. err = mmc_start_init(mmc);
  1371. if (!err)
  1372. err = mmc_complete_init(mmc);
  1373. debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
  1374. return err;
  1375. }
  1376. int mmc_set_dsr(struct mmc *mmc, u16 val)
  1377. {
  1378. mmc->dsr = val;
  1379. return 0;
  1380. }
  1381. /* CPU-specific MMC initializations */
  1382. __weak int cpu_mmc_init(bd_t *bis)
  1383. {
  1384. return -1;
  1385. }
  1386. /* board-specific MMC initializations. */
  1387. __weak int board_mmc_init(bd_t *bis)
  1388. {
  1389. return -1;
  1390. }
  1391. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1392. void print_mmc_devices(char separator)
  1393. {
  1394. struct mmc *m;
  1395. struct list_head *entry;
  1396. char *mmc_type;
  1397. list_for_each(entry, &mmc_devices) {
  1398. m = list_entry(entry, struct mmc, link);
  1399. if (m->has_init)
  1400. mmc_type = IS_SD(m) ? "SD" : "eMMC";
  1401. else
  1402. mmc_type = NULL;
  1403. printf("%s: %d", m->cfg->name, m->block_dev.dev);
  1404. if (mmc_type)
  1405. printf(" (%s)", mmc_type);
  1406. if (entry->next != &mmc_devices) {
  1407. printf("%c", separator);
  1408. if (separator != '\n')
  1409. puts (" ");
  1410. }
  1411. }
  1412. printf("\n");
  1413. }
  1414. #else
  1415. void print_mmc_devices(char separator) { }
  1416. #endif
  1417. int get_mmc_num(void)
  1418. {
  1419. return cur_dev_num;
  1420. }
  1421. void mmc_set_preinit(struct mmc *mmc, int preinit)
  1422. {
  1423. mmc->preinit = preinit;
  1424. }
  1425. static void do_preinit(void)
  1426. {
  1427. struct mmc *m;
  1428. struct list_head *entry;
  1429. list_for_each(entry, &mmc_devices) {
  1430. m = list_entry(entry, struct mmc, link);
  1431. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1432. mmc_set_preinit(m, 1);
  1433. #endif
  1434. if (m->preinit)
  1435. mmc_start_init(m);
  1436. }
  1437. }
  1438. #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
  1439. static int mmc_probe(bd_t *bis)
  1440. {
  1441. return 0;
  1442. }
  1443. #elif defined(CONFIG_DM_MMC)
  1444. static int mmc_probe(bd_t *bis)
  1445. {
  1446. int ret;
  1447. struct uclass *uc;
  1448. struct udevice *m;
  1449. ret = uclass_get(UCLASS_MMC, &uc);
  1450. if (ret)
  1451. return ret;
  1452. uclass_foreach_dev(m, uc) {
  1453. ret = device_probe(m);
  1454. if (ret)
  1455. printf("%s - probe failed: %d\n", m->name, ret);
  1456. }
  1457. return 0;
  1458. }
  1459. #else
  1460. static int mmc_probe(bd_t *bis)
  1461. {
  1462. if (board_mmc_init(bis) < 0)
  1463. cpu_mmc_init(bis);
  1464. return 0;
  1465. }
  1466. #endif
  1467. int mmc_initialize(bd_t *bis)
  1468. {
  1469. static int initialized = 0;
  1470. int ret;
  1471. if (initialized) /* Avoid initializing mmc multiple times */
  1472. return 0;
  1473. initialized = 1;
  1474. INIT_LIST_HEAD (&mmc_devices);
  1475. cur_dev_num = 0;
  1476. ret = mmc_probe(bis);
  1477. if (ret)
  1478. return ret;
  1479. #ifndef CONFIG_SPL_BUILD
  1480. print_mmc_devices(',');
  1481. #endif
  1482. do_preinit();
  1483. return 0;
  1484. }
  1485. #ifdef CONFIG_SUPPORT_EMMC_BOOT
  1486. /*
  1487. * This function changes the size of boot partition and the size of rpmb
  1488. * partition present on EMMC devices.
  1489. *
  1490. * Input Parameters:
  1491. * struct *mmc: pointer for the mmc device strcuture
  1492. * bootsize: size of boot partition
  1493. * rpmbsize: size of rpmb partition
  1494. *
  1495. * Returns 0 on success.
  1496. */
  1497. int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
  1498. unsigned long rpmbsize)
  1499. {
  1500. int err;
  1501. struct mmc_cmd cmd;
  1502. /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
  1503. cmd.cmdidx = MMC_CMD_RES_MAN;
  1504. cmd.resp_type = MMC_RSP_R1b;
  1505. cmd.cmdarg = MMC_CMD62_ARG1;
  1506. err = mmc_send_cmd(mmc, &cmd, NULL);
  1507. if (err) {
  1508. debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
  1509. return err;
  1510. }
  1511. /* Boot partition changing mode */
  1512. cmd.cmdidx = MMC_CMD_RES_MAN;
  1513. cmd.resp_type = MMC_RSP_R1b;
  1514. cmd.cmdarg = MMC_CMD62_ARG2;
  1515. err = mmc_send_cmd(mmc, &cmd, NULL);
  1516. if (err) {
  1517. debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
  1518. return err;
  1519. }
  1520. /* boot partition size is multiple of 128KB */
  1521. bootsize = (bootsize * 1024) / 128;
  1522. /* Arg: boot partition size */
  1523. cmd.cmdidx = MMC_CMD_RES_MAN;
  1524. cmd.resp_type = MMC_RSP_R1b;
  1525. cmd.cmdarg = bootsize;
  1526. err = mmc_send_cmd(mmc, &cmd, NULL);
  1527. if (err) {
  1528. debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
  1529. return err;
  1530. }
  1531. /* RPMB partition size is multiple of 128KB */
  1532. rpmbsize = (rpmbsize * 1024) / 128;
  1533. /* Arg: RPMB partition size */
  1534. cmd.cmdidx = MMC_CMD_RES_MAN;
  1535. cmd.resp_type = MMC_RSP_R1b;
  1536. cmd.cmdarg = rpmbsize;
  1537. err = mmc_send_cmd(mmc, &cmd, NULL);
  1538. if (err) {
  1539. debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
  1540. return err;
  1541. }
  1542. return 0;
  1543. }
  1544. /*
  1545. * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
  1546. * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
  1547. * and BOOT_MODE.
  1548. *
  1549. * Returns 0 on success.
  1550. */
  1551. int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
  1552. {
  1553. int err;
  1554. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
  1555. EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
  1556. EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
  1557. EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
  1558. if (err)
  1559. return err;
  1560. return 0;
  1561. }
  1562. /*
  1563. * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
  1564. * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
  1565. * PARTITION_ACCESS.
  1566. *
  1567. * Returns 0 on success.
  1568. */
  1569. int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
  1570. {
  1571. int err;
  1572. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  1573. EXT_CSD_BOOT_ACK(ack) |
  1574. EXT_CSD_BOOT_PART_NUM(part_num) |
  1575. EXT_CSD_PARTITION_ACCESS(access));
  1576. if (err)
  1577. return err;
  1578. return 0;
  1579. }
  1580. /*
  1581. * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
  1582. * for enable. Note that this is a write-once field for non-zero values.
  1583. *
  1584. * Returns 0 on success.
  1585. */
  1586. int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
  1587. {
  1588. return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
  1589. enable);
  1590. }
  1591. #endif