phy.c 19 KB

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  1. /*
  2. * Generic PHY Management code
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2011 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. *
  9. * Based loosely off of Linux's PHY Lib
  10. */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <console.h>
  14. #include <dm.h>
  15. #include <malloc.h>
  16. #include <net.h>
  17. #include <command.h>
  18. #include <miiphy.h>
  19. #include <phy.h>
  20. #include <errno.h>
  21. #include <linux/err.h>
  22. #include <linux/compiler.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. /* Generic PHY support and helper functions */
  25. /**
  26. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  27. * @phydev: target phy_device struct
  28. *
  29. * Description: Writes MII_ADVERTISE with the appropriate values,
  30. * after sanitizing the values to make sure we only advertise
  31. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  32. * hasn't changed, and > 0 if it has changed.
  33. */
  34. static int genphy_config_advert(struct phy_device *phydev)
  35. {
  36. u32 advertise;
  37. int oldadv, adv;
  38. int err, changed = 0;
  39. /* Only allow advertising what
  40. * this PHY supports */
  41. phydev->advertising &= phydev->supported;
  42. advertise = phydev->advertising;
  43. /* Setup standard advertisement */
  44. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  45. if (adv < 0)
  46. return adv;
  47. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  48. ADVERTISE_PAUSE_ASYM);
  49. if (advertise & ADVERTISED_10baseT_Half)
  50. adv |= ADVERTISE_10HALF;
  51. if (advertise & ADVERTISED_10baseT_Full)
  52. adv |= ADVERTISE_10FULL;
  53. if (advertise & ADVERTISED_100baseT_Half)
  54. adv |= ADVERTISE_100HALF;
  55. if (advertise & ADVERTISED_100baseT_Full)
  56. adv |= ADVERTISE_100FULL;
  57. if (advertise & ADVERTISED_Pause)
  58. adv |= ADVERTISE_PAUSE_CAP;
  59. if (advertise & ADVERTISED_Asym_Pause)
  60. adv |= ADVERTISE_PAUSE_ASYM;
  61. if (advertise & ADVERTISED_1000baseX_Half)
  62. adv |= ADVERTISE_1000XHALF;
  63. if (advertise & ADVERTISED_1000baseX_Full)
  64. adv |= ADVERTISE_1000XFULL;
  65. if (adv != oldadv) {
  66. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  67. if (err < 0)
  68. return err;
  69. changed = 1;
  70. }
  71. /* Configure gigabit if it's supported */
  72. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  73. SUPPORTED_1000baseT_Full)) {
  74. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  75. if (adv < 0)
  76. return adv;
  77. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  78. if (advertise & SUPPORTED_1000baseT_Half)
  79. adv |= ADVERTISE_1000HALF;
  80. if (advertise & SUPPORTED_1000baseT_Full)
  81. adv |= ADVERTISE_1000FULL;
  82. if (adv != oldadv) {
  83. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
  84. adv);
  85. if (err < 0)
  86. return err;
  87. changed = 1;
  88. }
  89. }
  90. return changed;
  91. }
  92. /**
  93. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  94. * @phydev: target phy_device struct
  95. *
  96. * Description: Configures MII_BMCR to force speed/duplex
  97. * to the values in phydev. Assumes that the values are valid.
  98. */
  99. static int genphy_setup_forced(struct phy_device *phydev)
  100. {
  101. int err;
  102. int ctl = 0;
  103. phydev->pause = phydev->asym_pause = 0;
  104. if (SPEED_1000 == phydev->speed)
  105. ctl |= BMCR_SPEED1000;
  106. else if (SPEED_100 == phydev->speed)
  107. ctl |= BMCR_SPEED100;
  108. if (DUPLEX_FULL == phydev->duplex)
  109. ctl |= BMCR_FULLDPLX;
  110. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  111. return err;
  112. }
  113. /**
  114. * genphy_restart_aneg - Enable and Restart Autonegotiation
  115. * @phydev: target phy_device struct
  116. */
  117. int genphy_restart_aneg(struct phy_device *phydev)
  118. {
  119. int ctl;
  120. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  121. if (ctl < 0)
  122. return ctl;
  123. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  124. /* Don't isolate the PHY if we're negotiating */
  125. ctl &= ~(BMCR_ISOLATE);
  126. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  127. return ctl;
  128. }
  129. /**
  130. * genphy_config_aneg - restart auto-negotiation or write BMCR
  131. * @phydev: target phy_device struct
  132. *
  133. * Description: If auto-negotiation is enabled, we configure the
  134. * advertising, and then restart auto-negotiation. If it is not
  135. * enabled, then we write the BMCR.
  136. */
  137. int genphy_config_aneg(struct phy_device *phydev)
  138. {
  139. int result;
  140. if (AUTONEG_ENABLE != phydev->autoneg)
  141. return genphy_setup_forced(phydev);
  142. result = genphy_config_advert(phydev);
  143. if (result < 0) /* error */
  144. return result;
  145. if (result == 0) {
  146. /* Advertisment hasn't changed, but maybe aneg was never on to
  147. * begin with? Or maybe phy was isolated? */
  148. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  149. if (ctl < 0)
  150. return ctl;
  151. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  152. result = 1; /* do restart aneg */
  153. }
  154. /* Only restart aneg if we are advertising something different
  155. * than we were before. */
  156. if (result > 0)
  157. result = genphy_restart_aneg(phydev);
  158. return result;
  159. }
  160. /**
  161. * genphy_update_link - update link status in @phydev
  162. * @phydev: target phy_device struct
  163. *
  164. * Description: Update the value in phydev->link to reflect the
  165. * current link value. In order to do this, we need to read
  166. * the status register twice, keeping the second value.
  167. */
  168. int genphy_update_link(struct phy_device *phydev)
  169. {
  170. unsigned int mii_reg;
  171. /*
  172. * Wait if the link is up, and autonegotiation is in progress
  173. * (ie - we're capable and it's not done)
  174. */
  175. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  176. /*
  177. * If we already saw the link up, and it hasn't gone down, then
  178. * we don't need to wait for autoneg again
  179. */
  180. if (phydev->link && mii_reg & BMSR_LSTATUS)
  181. return 0;
  182. if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
  183. int i = 0;
  184. printf("%s Waiting for PHY auto negotiation to complete",
  185. phydev->dev->name);
  186. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  187. /*
  188. * Timeout reached ?
  189. */
  190. if (i > PHY_ANEG_TIMEOUT) {
  191. printf(" TIMEOUT !\n");
  192. phydev->link = 0;
  193. return 0;
  194. }
  195. if (ctrlc()) {
  196. puts("user interrupt!\n");
  197. phydev->link = 0;
  198. return -EINTR;
  199. }
  200. if ((i++ % 500) == 0)
  201. printf(".");
  202. udelay(1000); /* 1 ms */
  203. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  204. }
  205. printf(" done\n");
  206. phydev->link = 1;
  207. } else {
  208. /* Read the link a second time to clear the latched state */
  209. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  210. if (mii_reg & BMSR_LSTATUS)
  211. phydev->link = 1;
  212. else
  213. phydev->link = 0;
  214. }
  215. return 0;
  216. }
  217. /*
  218. * Generic function which updates the speed and duplex. If
  219. * autonegotiation is enabled, it uses the AND of the link
  220. * partner's advertised capabilities and our advertised
  221. * capabilities. If autonegotiation is disabled, we use the
  222. * appropriate bits in the control register.
  223. *
  224. * Stolen from Linux's mii.c and phy_device.c
  225. */
  226. int genphy_parse_link(struct phy_device *phydev)
  227. {
  228. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  229. /* We're using autonegotiation */
  230. if (phydev->supported & SUPPORTED_Autoneg) {
  231. u32 lpa = 0;
  232. int gblpa = 0;
  233. u32 estatus = 0;
  234. /* Check for gigabit capability */
  235. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  236. SUPPORTED_1000baseT_Half)) {
  237. /* We want a list of states supported by
  238. * both PHYs in the link
  239. */
  240. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  241. if (gblpa < 0) {
  242. debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  243. gblpa = 0;
  244. }
  245. gblpa &= phy_read(phydev,
  246. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  247. }
  248. /* Set the baseline so we only have to set them
  249. * if they're different
  250. */
  251. phydev->speed = SPEED_10;
  252. phydev->duplex = DUPLEX_HALF;
  253. /* Check the gigabit fields */
  254. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  255. phydev->speed = SPEED_1000;
  256. if (gblpa & PHY_1000BTSR_1000FD)
  257. phydev->duplex = DUPLEX_FULL;
  258. /* We're done! */
  259. return 0;
  260. }
  261. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  262. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  263. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  264. phydev->speed = SPEED_100;
  265. if (lpa & LPA_100FULL)
  266. phydev->duplex = DUPLEX_FULL;
  267. } else if (lpa & LPA_10FULL)
  268. phydev->duplex = DUPLEX_FULL;
  269. /*
  270. * Extended status may indicate that the PHY supports
  271. * 1000BASE-T/X even though the 1000BASE-T registers
  272. * are missing. In this case we can't tell whether the
  273. * peer also supports it, so we only check extended
  274. * status if the 1000BASE-T registers are actually
  275. * missing.
  276. */
  277. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  278. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  279. MII_ESTATUS);
  280. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  281. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  282. phydev->speed = SPEED_1000;
  283. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  284. phydev->duplex = DUPLEX_FULL;
  285. }
  286. } else {
  287. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  288. phydev->speed = SPEED_10;
  289. phydev->duplex = DUPLEX_HALF;
  290. if (bmcr & BMCR_FULLDPLX)
  291. phydev->duplex = DUPLEX_FULL;
  292. if (bmcr & BMCR_SPEED1000)
  293. phydev->speed = SPEED_1000;
  294. else if (bmcr & BMCR_SPEED100)
  295. phydev->speed = SPEED_100;
  296. }
  297. return 0;
  298. }
  299. int genphy_config(struct phy_device *phydev)
  300. {
  301. int val;
  302. u32 features;
  303. /* For now, I'll claim that the generic driver supports
  304. * all possible port types */
  305. features = (SUPPORTED_TP | SUPPORTED_MII
  306. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  307. SUPPORTED_BNC);
  308. /* Do we support autonegotiation? */
  309. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  310. if (val < 0)
  311. return val;
  312. if (val & BMSR_ANEGCAPABLE)
  313. features |= SUPPORTED_Autoneg;
  314. if (val & BMSR_100FULL)
  315. features |= SUPPORTED_100baseT_Full;
  316. if (val & BMSR_100HALF)
  317. features |= SUPPORTED_100baseT_Half;
  318. if (val & BMSR_10FULL)
  319. features |= SUPPORTED_10baseT_Full;
  320. if (val & BMSR_10HALF)
  321. features |= SUPPORTED_10baseT_Half;
  322. if (val & BMSR_ESTATEN) {
  323. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  324. if (val < 0)
  325. return val;
  326. if (val & ESTATUS_1000_TFULL)
  327. features |= SUPPORTED_1000baseT_Full;
  328. if (val & ESTATUS_1000_THALF)
  329. features |= SUPPORTED_1000baseT_Half;
  330. if (val & ESTATUS_1000_XFULL)
  331. features |= SUPPORTED_1000baseX_Full;
  332. if (val & ESTATUS_1000_XHALF)
  333. features |= SUPPORTED_1000baseX_Half;
  334. }
  335. phydev->supported = features;
  336. phydev->advertising = features;
  337. genphy_config_aneg(phydev);
  338. return 0;
  339. }
  340. int genphy_startup(struct phy_device *phydev)
  341. {
  342. genphy_update_link(phydev);
  343. genphy_parse_link(phydev);
  344. return 0;
  345. }
  346. int genphy_shutdown(struct phy_device *phydev)
  347. {
  348. return 0;
  349. }
  350. static struct phy_driver genphy_driver = {
  351. .uid = 0xffffffff,
  352. .mask = 0xffffffff,
  353. .name = "Generic PHY",
  354. .features = 0,
  355. .config = genphy_config,
  356. .startup = genphy_startup,
  357. .shutdown = genphy_shutdown,
  358. };
  359. static LIST_HEAD(phy_drivers);
  360. int phy_init(void)
  361. {
  362. #ifdef CONFIG_PHY_AQUANTIA
  363. phy_aquantia_init();
  364. #endif
  365. #ifdef CONFIG_PHY_ATHEROS
  366. phy_atheros_init();
  367. #endif
  368. #ifdef CONFIG_PHY_BROADCOM
  369. phy_broadcom_init();
  370. #endif
  371. #ifdef CONFIG_PHY_CORTINA
  372. phy_cortina_init();
  373. #endif
  374. #ifdef CONFIG_PHY_DAVICOM
  375. phy_davicom_init();
  376. #endif
  377. #ifdef CONFIG_PHY_ET1011C
  378. phy_et1011c_init();
  379. #endif
  380. #ifdef CONFIG_PHY_LXT
  381. phy_lxt_init();
  382. #endif
  383. #ifdef CONFIG_PHY_MARVELL
  384. phy_marvell_init();
  385. #endif
  386. #ifdef CONFIG_PHY_MICREL
  387. phy_micrel_init();
  388. #endif
  389. #ifdef CONFIG_PHY_NATSEMI
  390. phy_natsemi_init();
  391. #endif
  392. #ifdef CONFIG_PHY_REALTEK
  393. phy_realtek_init();
  394. #endif
  395. #ifdef CONFIG_PHY_SMSC
  396. phy_smsc_init();
  397. #endif
  398. #ifdef CONFIG_PHY_TERANETICS
  399. phy_teranetics_init();
  400. #endif
  401. #ifdef CONFIG_PHY_TI
  402. phy_ti_init();
  403. #endif
  404. #ifdef CONFIG_PHY_VITESSE
  405. phy_vitesse_init();
  406. #endif
  407. return 0;
  408. }
  409. int phy_register(struct phy_driver *drv)
  410. {
  411. INIT_LIST_HEAD(&drv->list);
  412. list_add_tail(&drv->list, &phy_drivers);
  413. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  414. if (drv->probe)
  415. drv->probe += gd->reloc_off;
  416. if (drv->config)
  417. drv->config += gd->reloc_off;
  418. if (drv->startup)
  419. drv->startup += gd->reloc_off;
  420. if (drv->shutdown)
  421. drv->shutdown += gd->reloc_off;
  422. if (drv->readext)
  423. drv->readext += gd->reloc_off;
  424. if (drv->writeext)
  425. drv->writeext += gd->reloc_off;
  426. #endif
  427. return 0;
  428. }
  429. static int phy_probe(struct phy_device *phydev)
  430. {
  431. int err = 0;
  432. phydev->advertising = phydev->supported = phydev->drv->features;
  433. phydev->mmds = phydev->drv->mmds;
  434. if (phydev->drv->probe)
  435. err = phydev->drv->probe(phydev);
  436. return err;
  437. }
  438. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  439. {
  440. #ifdef CONFIG_PHYLIB_10G
  441. if (is_10g_interface(interface))
  442. return &gen10g_driver;
  443. #endif
  444. return &genphy_driver;
  445. }
  446. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  447. phy_interface_t interface)
  448. {
  449. struct list_head *entry;
  450. int phy_id = phydev->phy_id;
  451. struct phy_driver *drv = NULL;
  452. list_for_each(entry, &phy_drivers) {
  453. drv = list_entry(entry, struct phy_driver, list);
  454. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  455. return drv;
  456. }
  457. /* If we made it here, there's no driver for this PHY */
  458. return generic_for_interface(interface);
  459. }
  460. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  461. u32 phy_id,
  462. phy_interface_t interface)
  463. {
  464. struct phy_device *dev;
  465. /* We allocate the device, and initialize the
  466. * default values */
  467. dev = malloc(sizeof(*dev));
  468. if (!dev) {
  469. printf("Failed to allocate PHY device for %s:%d\n",
  470. bus->name, addr);
  471. return NULL;
  472. }
  473. memset(dev, 0, sizeof(*dev));
  474. dev->duplex = -1;
  475. dev->link = 0;
  476. dev->interface = interface;
  477. dev->autoneg = AUTONEG_ENABLE;
  478. dev->addr = addr;
  479. dev->phy_id = phy_id;
  480. dev->bus = bus;
  481. dev->drv = get_phy_driver(dev, interface);
  482. phy_probe(dev);
  483. bus->phymap[addr] = dev;
  484. return dev;
  485. }
  486. /**
  487. * get_phy_id - reads the specified addr for its ID.
  488. * @bus: the target MII bus
  489. * @addr: PHY address on the MII bus
  490. * @phy_id: where to store the ID retrieved.
  491. *
  492. * Description: Reads the ID registers of the PHY at @addr on the
  493. * @bus, stores it in @phy_id and returns zero on success.
  494. */
  495. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  496. {
  497. int phy_reg;
  498. /* Grab the bits from PHYIR1, and put them
  499. * in the upper half */
  500. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  501. if (phy_reg < 0)
  502. return -EIO;
  503. *phy_id = (phy_reg & 0xffff) << 16;
  504. /* Grab the bits from PHYIR2, and put them in the lower half */
  505. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  506. if (phy_reg < 0)
  507. return -EIO;
  508. *phy_id |= (phy_reg & 0xffff);
  509. return 0;
  510. }
  511. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  512. unsigned phy_mask, int devad, phy_interface_t interface)
  513. {
  514. u32 phy_id = 0xffffffff;
  515. while (phy_mask) {
  516. int addr = ffs(phy_mask) - 1;
  517. int r = get_phy_id(bus, addr, devad, &phy_id);
  518. /* If the PHY ID is mostly f's, we didn't find anything */
  519. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  520. return phy_device_create(bus, addr, phy_id, interface);
  521. phy_mask &= ~(1 << addr);
  522. }
  523. return NULL;
  524. }
  525. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  526. unsigned phy_mask, phy_interface_t interface)
  527. {
  528. /* If we have one, return the existing device, with new interface */
  529. while (phy_mask) {
  530. int addr = ffs(phy_mask) - 1;
  531. if (bus->phymap[addr]) {
  532. bus->phymap[addr]->interface = interface;
  533. return bus->phymap[addr];
  534. }
  535. phy_mask &= ~(1 << addr);
  536. }
  537. return NULL;
  538. }
  539. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  540. unsigned phy_mask, phy_interface_t interface)
  541. {
  542. int i;
  543. struct phy_device *phydev;
  544. phydev = search_for_existing_phy(bus, phy_mask, interface);
  545. if (phydev)
  546. return phydev;
  547. /* Try Standard (ie Clause 22) access */
  548. /* Otherwise we have to try Clause 45 */
  549. for (i = 0; i < 5; i++) {
  550. phydev = create_phy_by_mask(bus, phy_mask,
  551. i ? i : MDIO_DEVAD_NONE, interface);
  552. if (IS_ERR(phydev))
  553. return NULL;
  554. if (phydev)
  555. return phydev;
  556. }
  557. debug("\n%s PHY: ", bus->name);
  558. while (phy_mask) {
  559. int addr = ffs(phy_mask) - 1;
  560. debug("%d ", addr);
  561. phy_mask &= ~(1 << addr);
  562. }
  563. debug("not found\n");
  564. return NULL;
  565. }
  566. /**
  567. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  568. * @bus: the target MII bus
  569. * @addr: PHY address on the MII bus
  570. *
  571. * Description: Reads the ID registers of the PHY at @addr on the
  572. * @bus, then allocates and returns the phy_device to represent it.
  573. */
  574. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  575. phy_interface_t interface)
  576. {
  577. return get_phy_device_by_mask(bus, 1 << addr, interface);
  578. }
  579. int phy_reset(struct phy_device *phydev)
  580. {
  581. int reg;
  582. int timeout = 500;
  583. int devad = MDIO_DEVAD_NONE;
  584. #ifdef CONFIG_PHYLIB_10G
  585. /* If it's 10G, we need to issue reset through one of the MMDs */
  586. if (is_10g_interface(phydev->interface)) {
  587. if (!phydev->mmds)
  588. gen10g_discover_mmds(phydev);
  589. devad = ffs(phydev->mmds) - 1;
  590. }
  591. #endif
  592. if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
  593. debug("PHY reset failed\n");
  594. return -1;
  595. }
  596. #ifdef CONFIG_PHY_RESET_DELAY
  597. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  598. #endif
  599. /*
  600. * Poll the control register for the reset bit to go to 0 (it is
  601. * auto-clearing). This should happen within 0.5 seconds per the
  602. * IEEE spec.
  603. */
  604. reg = phy_read(phydev, devad, MII_BMCR);
  605. while ((reg & BMCR_RESET) && timeout--) {
  606. reg = phy_read(phydev, devad, MII_BMCR);
  607. if (reg < 0) {
  608. debug("PHY status read failed\n");
  609. return -1;
  610. }
  611. udelay(1000);
  612. }
  613. if (reg & BMCR_RESET) {
  614. puts("PHY reset timed out\n");
  615. return -1;
  616. }
  617. return 0;
  618. }
  619. int miiphy_reset(const char *devname, unsigned char addr)
  620. {
  621. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  622. struct phy_device *phydev;
  623. /*
  624. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  625. * If later code tries to connect with the right interface, this will
  626. * be corrected by get_phy_device in phy_connect()
  627. */
  628. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  629. return phy_reset(phydev);
  630. }
  631. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  632. phy_interface_t interface)
  633. {
  634. /* Reset the bus */
  635. if (bus->reset) {
  636. bus->reset(bus);
  637. /* Wait 15ms to make sure the PHY has come out of hard reset */
  638. udelay(15000);
  639. }
  640. return get_phy_device_by_mask(bus, phy_mask, interface);
  641. }
  642. #ifdef CONFIG_DM_ETH
  643. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
  644. #else
  645. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  646. #endif
  647. {
  648. /* Soft Reset the PHY */
  649. phy_reset(phydev);
  650. if (phydev->dev && phydev->dev != dev) {
  651. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  652. phydev->bus->name, phydev->addr,
  653. phydev->dev->name, dev->name);
  654. }
  655. phydev->dev = dev;
  656. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  657. }
  658. #ifdef CONFIG_DM_ETH
  659. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  660. struct udevice *dev, phy_interface_t interface)
  661. #else
  662. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  663. struct eth_device *dev, phy_interface_t interface)
  664. #endif
  665. {
  666. struct phy_device *phydev;
  667. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  668. if (phydev)
  669. phy_connect_dev(phydev, dev);
  670. else
  671. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  672. return phydev;
  673. }
  674. /*
  675. * Start the PHY. Returns 0 on success, or a negative error code.
  676. */
  677. int phy_startup(struct phy_device *phydev)
  678. {
  679. if (phydev->drv->startup)
  680. return phydev->drv->startup(phydev);
  681. return 0;
  682. }
  683. __weak int board_phy_config(struct phy_device *phydev)
  684. {
  685. if (phydev->drv->config)
  686. return phydev->drv->config(phydev);
  687. return 0;
  688. }
  689. int phy_config(struct phy_device *phydev)
  690. {
  691. /* Invoke an optional board-specific helper */
  692. board_phy_config(phydev);
  693. return 0;
  694. }
  695. int phy_shutdown(struct phy_device *phydev)
  696. {
  697. if (phydev->drv->shutdown)
  698. phydev->drv->shutdown(phydev);
  699. return 0;
  700. }
  701. int phy_get_interface_by_name(const char *str)
  702. {
  703. int i;
  704. for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
  705. if (!strcmp(str, phy_interface_strings[i]))
  706. return i;
  707. }
  708. return -1;
  709. }