ns16550.c 14 KB

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  1. /*
  2. * COM1 NS16550 support
  3. * originally from linux source (arch/powerpc/boot/ns16550.c)
  4. * modified to use CONFIG_SYS_ISA_MEM and new defines
  5. */
  6. #include <common.h>
  7. #include <clk.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <ns16550.h>
  11. #include <reset.h>
  12. #include <serial.h>
  13. #include <watchdog.h>
  14. #include <linux/types.h>
  15. #include <asm/io.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  18. #define UART_MCRVAL (UART_MCR_DTR | \
  19. UART_MCR_RTS) /* RTS/DTR */
  20. #ifndef CONFIG_DM_SERIAL
  21. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  22. #define serial_out(x, y) outb(x, (ulong)y)
  23. #define serial_in(y) inb((ulong)y)
  24. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
  25. #define serial_out(x, y) out_be32(y, x)
  26. #define serial_in(y) in_be32(y)
  27. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
  28. #define serial_out(x, y) out_le32(y, x)
  29. #define serial_in(y) in_le32(y)
  30. #else
  31. #define serial_out(x, y) writeb(x, y)
  32. #define serial_in(y) readb(y)
  33. #endif
  34. #endif /* !CONFIG_DM_SERIAL */
  35. #if defined(CONFIG_SOC_KEYSTONE)
  36. #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
  37. #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
  38. #undef UART_MCRVAL
  39. #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
  40. #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
  41. #else
  42. #define UART_MCRVAL (UART_MCR_RTS)
  43. #endif
  44. #endif
  45. #ifndef CONFIG_SYS_NS16550_IER
  46. #define CONFIG_SYS_NS16550_IER 0x00
  47. #endif /* CONFIG_SYS_NS16550_IER */
  48. static inline void serial_out_shift(void *addr, int shift, int value)
  49. {
  50. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  51. outb(value, (ulong)addr);
  52. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  53. out_le32(addr, value);
  54. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  55. out_be32(addr, value);
  56. #elif defined(CONFIG_SYS_NS16550_MEM32)
  57. writel(value, addr);
  58. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  59. writeb(value, addr + (1 << shift) - 1);
  60. #else
  61. writeb(value, addr);
  62. #endif
  63. }
  64. static inline int serial_in_shift(void *addr, int shift)
  65. {
  66. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  67. return inb((ulong)addr);
  68. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  69. return in_le32(addr);
  70. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  71. return in_be32(addr);
  72. #elif defined(CONFIG_SYS_NS16550_MEM32)
  73. return readl(addr);
  74. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  75. return readb(addr + (1 << shift) - 1);
  76. #else
  77. return readb(addr);
  78. #endif
  79. }
  80. #ifdef CONFIG_DM_SERIAL
  81. #ifndef CONFIG_SYS_NS16550_CLK
  82. #define CONFIG_SYS_NS16550_CLK 0
  83. #endif
  84. static void ns16550_writeb(NS16550_t port, int offset, int value)
  85. {
  86. struct ns16550_platdata *plat = port->plat;
  87. unsigned char *addr;
  88. offset *= 1 << plat->reg_shift;
  89. addr = (unsigned char *)plat->base + offset;
  90. /*
  91. * As far as we know it doesn't make sense to support selection of
  92. * these options at run-time, so use the existing CONFIG options.
  93. */
  94. serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
  95. }
  96. static int ns16550_readb(NS16550_t port, int offset)
  97. {
  98. struct ns16550_platdata *plat = port->plat;
  99. unsigned char *addr;
  100. offset *= 1 << plat->reg_shift;
  101. addr = (unsigned char *)plat->base + offset;
  102. return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
  103. }
  104. static u32 ns16550_getfcr(NS16550_t port)
  105. {
  106. struct ns16550_platdata *plat = port->plat;
  107. return plat->fcr;
  108. }
  109. /* We can clean these up once everything is moved to driver model */
  110. #define serial_out(value, addr) \
  111. ns16550_writeb(com_port, \
  112. (unsigned char *)addr - (unsigned char *)com_port, value)
  113. #define serial_in(addr) \
  114. ns16550_readb(com_port, \
  115. (unsigned char *)addr - (unsigned char *)com_port)
  116. #else
  117. static u32 ns16550_getfcr(NS16550_t port)
  118. {
  119. return UART_FCR_DEFVAL;
  120. }
  121. #endif
  122. int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
  123. {
  124. const unsigned int mode_x_div = 16;
  125. return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
  126. }
  127. static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
  128. {
  129. /* to keep serial format, read lcr before writing BKSE */
  130. int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
  131. serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
  132. serial_out(baud_divisor & 0xff, &com_port->dll);
  133. serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
  134. serial_out(lcr_val, &com_port->lcr);
  135. }
  136. void NS16550_init(NS16550_t com_port, int baud_divisor)
  137. {
  138. #if (defined(CONFIG_SPL_BUILD) && \
  139. (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
  140. /*
  141. * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
  142. * before SPL starts only THRE bit is set. We have to empty the
  143. * transmitter before initialization starts.
  144. */
  145. if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
  146. == UART_LSR_THRE) {
  147. if (baud_divisor != -1)
  148. NS16550_setbrg(com_port, baud_divisor);
  149. serial_out(0, &com_port->mdr1);
  150. }
  151. #endif
  152. while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
  153. ;
  154. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  155. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
  156. serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
  157. #endif
  158. serial_out(UART_MCRVAL, &com_port->mcr);
  159. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  160. /* initialize serial config to 8N1 before writing baudrate */
  161. serial_out(UART_LCRVAL, &com_port->lcr);
  162. if (baud_divisor != -1)
  163. NS16550_setbrg(com_port, baud_divisor);
  164. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
  165. defined(CONFIG_OMAP_SERIAL)
  166. /* /16 is proper to hit 115200 with 48MHz */
  167. serial_out(0, &com_port->mdr1);
  168. #endif
  169. #if defined(CONFIG_SOC_KEYSTONE)
  170. serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
  171. #endif
  172. }
  173. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  174. void NS16550_reinit(NS16550_t com_port, int baud_divisor)
  175. {
  176. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  177. NS16550_setbrg(com_port, 0);
  178. serial_out(UART_MCRVAL, &com_port->mcr);
  179. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  180. NS16550_setbrg(com_port, baud_divisor);
  181. }
  182. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  183. void NS16550_putc(NS16550_t com_port, char c)
  184. {
  185. while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
  186. ;
  187. serial_out(c, &com_port->thr);
  188. /*
  189. * Call watchdog_reset() upon newline. This is done here in putc
  190. * since the environment code uses a single puts() to print the complete
  191. * environment upon "printenv". So we can't put this watchdog call
  192. * in puts().
  193. */
  194. if (c == '\n')
  195. WATCHDOG_RESET();
  196. }
  197. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  198. char NS16550_getc(NS16550_t com_port)
  199. {
  200. while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
  201. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
  202. extern void usbtty_poll(void);
  203. usbtty_poll();
  204. #endif
  205. WATCHDOG_RESET();
  206. }
  207. return serial_in(&com_port->rbr);
  208. }
  209. int NS16550_tstc(NS16550_t com_port)
  210. {
  211. return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
  212. }
  213. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  214. #ifdef CONFIG_DEBUG_UART_NS16550
  215. #include <debug_uart.h>
  216. static inline void _debug_uart_init(void)
  217. {
  218. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  219. int baud_divisor;
  220. /*
  221. * We copy the code from above because it is already horribly messy.
  222. * Trying to refactor to nicely remove the duplication doesn't seem
  223. * feasible. The better fix is to move all users of this driver to
  224. * driver model.
  225. */
  226. baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
  227. CONFIG_BAUDRATE);
  228. serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
  229. serial_dout(&com_port->mcr, UART_MCRVAL);
  230. serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
  231. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  232. serial_dout(&com_port->dll, baud_divisor & 0xff);
  233. serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
  234. serial_dout(&com_port->lcr, UART_LCRVAL);
  235. }
  236. static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
  237. {
  238. int ret;
  239. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  240. ret = serial_din(&com_port->dll) & 0xff;
  241. ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
  242. serial_dout(&com_port->lcr, UART_LCRVAL);
  243. return ret;
  244. }
  245. static inline void _debug_uart_putc(int ch)
  246. {
  247. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  248. while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
  249. if (!NS16550_read_baud_divisor(com_port))
  250. return;
  251. }
  252. serial_dout(&com_port->thr, ch);
  253. }
  254. DEBUG_UART_FUNCS
  255. #endif
  256. #ifdef CONFIG_DM_SERIAL
  257. static int ns16550_serial_putc(struct udevice *dev, const char ch)
  258. {
  259. struct NS16550 *const com_port = dev_get_priv(dev);
  260. if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
  261. return -EAGAIN;
  262. serial_out(ch, &com_port->thr);
  263. /*
  264. * Call watchdog_reset() upon newline. This is done here in putc
  265. * since the environment code uses a single puts() to print the complete
  266. * environment upon "printenv". So we can't put this watchdog call
  267. * in puts().
  268. */
  269. if (ch == '\n')
  270. WATCHDOG_RESET();
  271. return 0;
  272. }
  273. static int ns16550_serial_pending(struct udevice *dev, bool input)
  274. {
  275. struct NS16550 *const com_port = dev_get_priv(dev);
  276. if (input)
  277. return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
  278. else
  279. return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
  280. }
  281. static int ns16550_serial_getc(struct udevice *dev)
  282. {
  283. struct NS16550 *const com_port = dev_get_priv(dev);
  284. if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
  285. return -EAGAIN;
  286. return serial_in(&com_port->rbr);
  287. }
  288. static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
  289. {
  290. struct NS16550 *const com_port = dev_get_priv(dev);
  291. struct ns16550_platdata *plat = com_port->plat;
  292. int clock_divisor;
  293. clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
  294. NS16550_setbrg(com_port, clock_divisor);
  295. return 0;
  296. }
  297. static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
  298. {
  299. struct NS16550 *const com_port = dev_get_priv(dev);
  300. int lcr_val = UART_LCR_WLS_8;
  301. uint parity = SERIAL_GET_PARITY(serial_config);
  302. uint bits = SERIAL_GET_BITS(serial_config);
  303. uint stop = SERIAL_GET_STOP(serial_config);
  304. /*
  305. * only parity config is implemented, check if other serial settings
  306. * are the default one.
  307. */
  308. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
  309. return -ENOTSUPP; /* not supported in driver*/
  310. switch (parity) {
  311. case SERIAL_PAR_NONE:
  312. /* no bits to add */
  313. break;
  314. case SERIAL_PAR_ODD:
  315. lcr_val |= UART_LCR_PEN;
  316. break;
  317. case SERIAL_PAR_EVEN:
  318. lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
  319. break;
  320. default:
  321. return -ENOTSUPP; /* not supported in driver*/
  322. }
  323. serial_out(lcr_val, &com_port->lcr);
  324. return 0;
  325. }
  326. int ns16550_serial_probe(struct udevice *dev)
  327. {
  328. struct NS16550 *const com_port = dev_get_priv(dev);
  329. struct reset_ctl_bulk reset_bulk;
  330. int ret;
  331. ret = reset_get_bulk(dev, &reset_bulk);
  332. if (!ret)
  333. reset_deassert_bulk(&reset_bulk);
  334. com_port->plat = dev_get_platdata(dev);
  335. NS16550_init(com_port, -1);
  336. return 0;
  337. }
  338. #if CONFIG_IS_ENABLED(OF_CONTROL)
  339. enum {
  340. PORT_NS16550 = 0,
  341. PORT_JZ4780,
  342. };
  343. #endif
  344. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  345. int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
  346. {
  347. struct ns16550_platdata *plat = dev->platdata;
  348. const u32 port_type = dev_get_driver_data(dev);
  349. fdt_addr_t addr;
  350. struct clk clk;
  351. int err;
  352. /* try Processor Local Bus device first */
  353. addr = dev_read_addr(dev);
  354. #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
  355. if (addr == FDT_ADDR_T_NONE) {
  356. /* then try pci device */
  357. struct fdt_pci_addr pci_addr;
  358. u32 bar;
  359. int ret;
  360. /* we prefer to use a memory-mapped register */
  361. ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
  362. FDT_PCI_SPACE_MEM32, "reg",
  363. &pci_addr);
  364. if (ret) {
  365. /* try if there is any i/o-mapped register */
  366. ret = fdtdec_get_pci_addr(gd->fdt_blob,
  367. dev_of_offset(dev),
  368. FDT_PCI_SPACE_IO,
  369. "reg", &pci_addr);
  370. if (ret)
  371. return ret;
  372. }
  373. ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
  374. if (ret)
  375. return ret;
  376. addr = bar;
  377. }
  378. #endif
  379. if (addr == FDT_ADDR_T_NONE)
  380. return -EINVAL;
  381. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  382. plat->base = addr;
  383. #else
  384. plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
  385. #endif
  386. plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
  387. plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
  388. err = clk_get_by_index(dev, 0, &clk);
  389. if (!err) {
  390. err = clk_get_rate(&clk);
  391. if (!IS_ERR_VALUE(err))
  392. plat->clock = err;
  393. } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
  394. debug("ns16550 failed to get clock\n");
  395. return err;
  396. }
  397. if (!plat->clock)
  398. plat->clock = dev_read_u32_default(dev, "clock-frequency",
  399. CONFIG_SYS_NS16550_CLK);
  400. if (!plat->clock) {
  401. debug("ns16550 clock not defined\n");
  402. return -EINVAL;
  403. }
  404. plat->fcr = UART_FCR_DEFVAL;
  405. if (port_type == PORT_JZ4780)
  406. plat->fcr |= UART_FCR_UME;
  407. return 0;
  408. }
  409. #endif
  410. const struct dm_serial_ops ns16550_serial_ops = {
  411. .putc = ns16550_serial_putc,
  412. .pending = ns16550_serial_pending,
  413. .getc = ns16550_serial_getc,
  414. .setbrg = ns16550_serial_setbrg,
  415. .setconfig = ns16550_serial_setconfig
  416. };
  417. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  418. /*
  419. * Please consider existing compatible strings before adding a new
  420. * one to keep this table compact. Or you may add a generic "ns16550"
  421. * compatible string to your dts.
  422. */
  423. static const struct udevice_id ns16550_serial_ids[] = {
  424. { .compatible = "ns16550", .data = PORT_NS16550 },
  425. { .compatible = "ns16550a", .data = PORT_NS16550 },
  426. { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
  427. { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
  428. { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
  429. {}
  430. };
  431. #endif /* OF_CONTROL && !OF_PLATDATA */
  432. #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
  433. /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
  434. #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
  435. U_BOOT_DRIVER(ns16550_serial) = {
  436. .name = "ns16550_serial",
  437. .id = UCLASS_SERIAL,
  438. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  439. .of_match = ns16550_serial_ids,
  440. .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
  441. .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
  442. #endif
  443. .priv_auto_alloc_size = sizeof(struct NS16550),
  444. .probe = ns16550_serial_probe,
  445. .ops = &ns16550_serial_ops,
  446. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  447. .flags = DM_FLAG_PRE_RELOC,
  448. #endif
  449. };
  450. #endif
  451. #endif /* SERIAL_PRESENT */
  452. #endif /* CONFIG_DM_SERIAL */