cmd_ace.c 6.8 KB

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  1. /*
  2. * Copyright (c) 2004 Picture Elements, Inc.
  3. * Stephen Williams (XXXXXXXXXXXXXXXX)
  4. *
  5. * This source code is free software; you can redistribute it
  6. * and/or modify it in source code form under the terms of the GNU
  7. * General Public License as published by the Free Software
  8. * Foundation; either version 2 of the License, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  19. */
  20. /*
  21. * The Xilinx SystemACE chip support is activated by defining
  22. * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
  23. * to set the base address of the device. This code currently
  24. * assumes that the chip is connected via a byte-wide bus.
  25. *
  26. * The CONFIG_SYSTEMACE also adds to fat support the device class
  27. * "ace" that allows the user to execute "fatls ace 0" and the
  28. * like. This works by making the systemace_get_dev function
  29. * available to cmd_fat.c:get_dev and filling in a block device
  30. * description that has all the bits needed for FAT support to
  31. * read sectors.
  32. *
  33. * According to Xilinx technical support, before accessing the
  34. * SystemACE CF you need to set the following control bits:
  35. * FORCECFGMODE : 1
  36. * CFGMODE : 0
  37. * CFGSTART : 0
  38. */
  39. #include <common.h>
  40. #include <command.h>
  41. #include <systemace.h>
  42. #include <part.h>
  43. #include <asm/io.h>
  44. #ifdef CONFIG_SYSTEMACE
  45. /*
  46. * The ace_readw and writew functions read/write 16bit words, but the
  47. * offset value is the BYTE offset as most used in the Xilinx
  48. * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
  49. * to be the base address for the chip, usually in the local
  50. * peripheral bus.
  51. */
  52. static unsigned ace_readw(unsigned offset)
  53. {
  54. #if (CFG_SYSTEMACE_WIDTH == 8)
  55. u16 temp;
  56. #if !defined(__BIG_ENDIAN)
  57. temp = ((u16) readb(CFG_SYSTEMACE_BASE + offset) << 8);
  58. temp |= (u16) readb(CFG_SYSTEMACE_BASE + offset + 1);
  59. #else
  60. temp = (u16) readb(CFG_SYSTEMACE_BASE + offset);
  61. temp |= ((u16) readb(CFG_SYSTEMACE_BASE + offset + 1) << 8);
  62. #endif
  63. return temp;
  64. #else
  65. return readw(CFG_SYSTEMACE_BASE + offset);
  66. #endif
  67. }
  68. static void ace_writew(unsigned val, unsigned offset)
  69. {
  70. #if (CFG_SYSTEMACE_WIDTH == 8)
  71. #if !defined(__BIG_ENDIAN)
  72. writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset);
  73. writeb((u8) val, CFG_SYSTEMACE_BASE + offset + 1);
  74. #else
  75. writeb((u8) val, CFG_SYSTEMACE_BASE + offset);
  76. writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset + 1);
  77. #endif
  78. #else
  79. writew(val, CFG_SYSTEMACE_BASE + offset);
  80. #endif
  81. }
  82. /* */
  83. static unsigned long systemace_read(int dev, unsigned long start,
  84. unsigned long blkcnt,
  85. unsigned long *buffer);
  86. static block_dev_desc_t systemace_dev = { 0 };
  87. static int get_cf_lock(void)
  88. {
  89. int retry = 10;
  90. /* CONTROLREG = LOCKREG */
  91. unsigned val = ace_readw(0x18);
  92. val |= 0x0002;
  93. ace_writew((val & 0xffff), 0x18);
  94. /* Wait for MPULOCK in STATUSREG[15:0] */
  95. while (!(ace_readw(0x04) & 0x0002)) {
  96. if (retry < 0)
  97. return -1;
  98. udelay(100000);
  99. retry -= 1;
  100. }
  101. return 0;
  102. }
  103. static void release_cf_lock(void)
  104. {
  105. unsigned val = ace_readw(0x18);
  106. val &= ~(0x0002);
  107. ace_writew((val & 0xffff), 0x18);
  108. }
  109. block_dev_desc_t *systemace_get_dev(int dev)
  110. {
  111. /* The first time through this, the systemace_dev object is
  112. not yet initialized. In that case, fill it in. */
  113. if (systemace_dev.blksz == 0) {
  114. systemace_dev.if_type = IF_TYPE_UNKNOWN;
  115. systemace_dev.dev = 0;
  116. systemace_dev.part_type = PART_TYPE_UNKNOWN;
  117. systemace_dev.type = DEV_TYPE_HARDDISK;
  118. systemace_dev.blksz = 512;
  119. systemace_dev.removable = 1;
  120. systemace_dev.block_read = systemace_read;
  121. init_part(&systemace_dev);
  122. }
  123. return &systemace_dev;
  124. }
  125. /*
  126. * This function is called (by dereferencing the block_read pointer in
  127. * the dev_desc) to read blocks of data. The return value is the
  128. * number of blocks read. A zero return indicates an error.
  129. */
  130. static unsigned long systemace_read(int dev, unsigned long start,
  131. unsigned long blkcnt, unsigned long *buffer)
  132. {
  133. int retry;
  134. unsigned blk_countdown;
  135. unsigned char *dp = (unsigned char *)buffer;
  136. unsigned val;
  137. if (get_cf_lock() < 0) {
  138. unsigned status = ace_readw(0x04);
  139. /* If CFDETECT is false, card is missing. */
  140. if (!(status & 0x0010)) {
  141. printf("** CompactFlash card not present. **\n");
  142. return 0;
  143. }
  144. printf("**** ACE locked away from me (STATUSREG=%04x)\n",
  145. status);
  146. return 0;
  147. }
  148. #ifdef DEBUG_SYSTEMACE
  149. printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
  150. #endif
  151. retry = 2000;
  152. for (;;) {
  153. val = ace_readw(0x04);
  154. /* If CFDETECT is false, card is missing. */
  155. if (!(val & 0x0010)) {
  156. printf("**** ACE CompactFlash not found.\n");
  157. release_cf_lock();
  158. return 0;
  159. }
  160. /* If RDYFORCMD, then we are ready to go. */
  161. if (val & 0x0100)
  162. break;
  163. if (retry < 0) {
  164. printf("**** SystemACE not ready.\n");
  165. release_cf_lock();
  166. return 0;
  167. }
  168. udelay(1000);
  169. retry -= 1;
  170. }
  171. /* The SystemACE can only transfer 256 sectors at a time, so
  172. limit the current chunk of sectors. The blk_countdown
  173. variable is the number of sectors left to transfer. */
  174. blk_countdown = blkcnt;
  175. while (blk_countdown > 0) {
  176. unsigned trans = blk_countdown;
  177. if (trans > 256)
  178. trans = 256;
  179. #ifdef DEBUG_SYSTEMACE
  180. printf("... transfer %lu sector in a chunk\n", trans);
  181. #endif
  182. /* Write LBA block address */
  183. ace_writew((start >> 0) & 0xffff, 0x10);
  184. ace_writew((start >> 16) & 0x00ff, 0x12);
  185. /* NOTE: in the Write Sector count below, a count of 0
  186. causes a transfer of 256, so &0xff gives the right
  187. value for whatever transfer count we want. */
  188. /* Write sector count | ReadMemCardData. */
  189. ace_writew((trans & 0xff) | 0x0300, 0x14);
  190. /* Reset the configruation controller */
  191. val = ace_readw(0x18);
  192. val |= 0x0080;
  193. ace_writew(val, 0x18);
  194. retry = trans * 16;
  195. while (retry > 0) {
  196. int idx;
  197. /* Wait for buffer to become ready. */
  198. while (!(ace_readw(0x04) & 0x0020)) {
  199. udelay(100);
  200. }
  201. /* Read 16 words of 2bytes from the sector buffer. */
  202. for (idx = 0; idx < 16; idx += 1) {
  203. unsigned short val = ace_readw(0x40);
  204. *dp++ = val & 0xff;
  205. *dp++ = (val >> 8) & 0xff;
  206. }
  207. retry -= 1;
  208. }
  209. /* Clear the configruation controller reset */
  210. val = ace_readw(0x18);
  211. val &= ~0x0080;
  212. ace_writew(val, 0x18);
  213. /* Count the blocks we transfer this time. */
  214. start += trans;
  215. blk_countdown -= trans;
  216. }
  217. release_cf_lock();
  218. return blkcnt;
  219. }
  220. #endif /* CONFIG_SYSTEMACE */