cmd_ide.c 50 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #ifdef CONFIG_ORION5X
  44. #include <asm/arch/orion5x.h>
  45. #elif defined CONFIG_KIRKWOOD
  46. #include <asm/arch/kirkwood.h>
  47. #endif
  48. #include <ide.h>
  49. #include <ata.h>
  50. #ifdef CONFIG_STATUS_LED
  51. # include <status_led.h>
  52. #endif
  53. #ifdef CONFIG_IDE_8xx_DIRECT
  54. DECLARE_GLOBAL_DATA_PTR;
  55. #endif
  56. #ifdef __PPC__
  57. # define EIEIO __asm__ volatile ("eieio")
  58. # define SYNC __asm__ volatile ("sync")
  59. #else
  60. # define EIEIO /* nothing */
  61. # define SYNC /* nothing */
  62. #endif
  63. #ifdef CONFIG_IDE_8xx_DIRECT
  64. /* Timings for IDE Interface
  65. *
  66. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  67. * 70 165 30 PIO-Mode 0, [ns]
  68. * 4 9 2 [Cycles]
  69. * 50 125 20 PIO-Mode 1, [ns]
  70. * 3 7 2 [Cycles]
  71. * 30 100 15 PIO-Mode 2, [ns]
  72. * 2 6 1 [Cycles]
  73. * 30 80 10 PIO-Mode 3, [ns]
  74. * 2 5 1 [Cycles]
  75. * 25 70 10 PIO-Mode 4, [ns]
  76. * 2 4 1 [Cycles]
  77. */
  78. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  79. {
  80. /* Setup Length Hold */
  81. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  82. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  83. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  84. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  85. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  86. };
  87. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  88. #ifndef CONFIG_SYS_PIO_MODE
  89. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  90. #endif
  91. static int pio_mode = CONFIG_SYS_PIO_MODE;
  92. /* Make clock cycles and always round up */
  93. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  94. #endif /* CONFIG_IDE_8xx_DIRECT */
  95. /* ------------------------------------------------------------------------- */
  96. /* Current I/O Device */
  97. static int curr_device = -1;
  98. /* Current offset for IDE0 / IDE1 bus access */
  99. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  100. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  101. CONFIG_SYS_ATA_IDE0_OFFSET,
  102. #endif
  103. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  104. CONFIG_SYS_ATA_IDE1_OFFSET,
  105. #endif
  106. };
  107. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  108. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  109. /* ------------------------------------------------------------------------- */
  110. #ifdef CONFIG_IDE_LED
  111. # if !defined(CONFIG_BMS2003) && \
  112. !defined(CONFIG_CPC45) && \
  113. !defined(CONFIG_KUP4K) && \
  114. !defined(CONFIG_KUP4X)
  115. static void ide_led (uchar led, uchar status);
  116. #else
  117. extern void ide_led (uchar led, uchar status);
  118. #endif
  119. #else
  120. #define ide_led(a,b) /* dummy */
  121. #endif
  122. #ifdef CONFIG_IDE_RESET
  123. static void ide_reset (void);
  124. #else
  125. #define ide_reset() /* dummy */
  126. #endif
  127. static void ide_ident (block_dev_desc_t *dev_desc);
  128. static uchar ide_wait (int dev, ulong t);
  129. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  130. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  131. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  132. static void input_data(int dev, ulong *sect_buf, int words);
  133. static void output_data(int dev, const ulong *sect_buf, int words);
  134. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  135. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  136. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  137. #endif
  138. #ifdef CONFIG_ATAPI
  139. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  140. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  141. #endif
  142. #ifdef CONFIG_IDE_8xx_DIRECT
  143. static void set_pcmcia_timing (int pmode);
  144. #endif
  145. /* ------------------------------------------------------------------------- */
  146. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  147. {
  148. int rcode = 0;
  149. switch (argc) {
  150. case 0:
  151. case 1:
  152. return cmd_usage(cmdtp);
  153. case 2:
  154. if (strncmp(argv[1],"res",3) == 0) {
  155. puts ("\nReset IDE"
  156. #ifdef CONFIG_IDE_8xx_DIRECT
  157. " on PCMCIA " PCMCIA_SLOT_MSG
  158. #endif
  159. ": ");
  160. ide_init ();
  161. return 0;
  162. } else if (strncmp(argv[1],"inf",3) == 0) {
  163. int i;
  164. putc ('\n');
  165. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  166. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  167. continue; /* list only known devices */
  168. printf ("IDE device %d: ", i);
  169. dev_print(&ide_dev_desc[i]);
  170. }
  171. return 0;
  172. } else if (strncmp(argv[1],"dev",3) == 0) {
  173. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  174. puts ("\nno IDE devices available\n");
  175. return 1;
  176. }
  177. printf ("\nIDE device %d: ", curr_device);
  178. dev_print(&ide_dev_desc[curr_device]);
  179. return 0;
  180. } else if (strncmp(argv[1],"part",4) == 0) {
  181. int dev, ok;
  182. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  183. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  184. ++ok;
  185. if (dev)
  186. putc ('\n');
  187. print_part(&ide_dev_desc[dev]);
  188. }
  189. }
  190. if (!ok) {
  191. puts ("\nno IDE devices available\n");
  192. rcode ++;
  193. }
  194. return rcode;
  195. }
  196. return cmd_usage(cmdtp);
  197. case 3:
  198. if (strncmp(argv[1],"dev",3) == 0) {
  199. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  200. printf ("\nIDE device %d: ", dev);
  201. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  202. puts ("unknown device\n");
  203. return 1;
  204. }
  205. dev_print(&ide_dev_desc[dev]);
  206. /*ide_print (dev);*/
  207. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  208. return 1;
  209. }
  210. curr_device = dev;
  211. puts ("... is now current device\n");
  212. return 0;
  213. } else if (strncmp(argv[1],"part",4) == 0) {
  214. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  215. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  216. print_part(&ide_dev_desc[dev]);
  217. } else {
  218. printf ("\nIDE device %d not available\n", dev);
  219. rcode = 1;
  220. }
  221. return rcode;
  222. #if 0
  223. } else if (strncmp(argv[1],"pio",4) == 0) {
  224. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  225. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  226. puts ("\nSetting ");
  227. pio_mode = mode;
  228. ide_init ();
  229. } else {
  230. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  231. mode, IDE_MAX_PIO_MODE);
  232. }
  233. return;
  234. #endif
  235. }
  236. return cmd_usage(cmdtp);
  237. default:
  238. /* at least 4 args */
  239. if (strcmp(argv[1],"read") == 0) {
  240. ulong addr = simple_strtoul(argv[2], NULL, 16);
  241. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  242. ulong n;
  243. #ifdef CONFIG_SYS_64BIT_LBA
  244. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  245. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  246. curr_device, blk, cnt);
  247. #else
  248. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  249. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  250. curr_device, blk, cnt);
  251. #endif
  252. n = ide_dev_desc[curr_device].block_read (curr_device,
  253. blk, cnt,
  254. (ulong *)addr);
  255. /* flush cache after read */
  256. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  257. printf ("%ld blocks read: %s\n",
  258. n, (n==cnt) ? "OK" : "ERROR");
  259. if (n==cnt) {
  260. return 0;
  261. } else {
  262. return 1;
  263. }
  264. } else if (strcmp(argv[1],"write") == 0) {
  265. ulong addr = simple_strtoul(argv[2], NULL, 16);
  266. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  267. ulong n;
  268. #ifdef CONFIG_SYS_64BIT_LBA
  269. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  270. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  271. curr_device, blk, cnt);
  272. #else
  273. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  274. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  275. curr_device, blk, cnt);
  276. #endif
  277. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  278. printf ("%ld blocks written: %s\n",
  279. n, (n==cnt) ? "OK" : "ERROR");
  280. if (n==cnt)
  281. return 0;
  282. else
  283. return 1;
  284. } else {
  285. return cmd_usage(cmdtp);
  286. }
  287. return rcode;
  288. }
  289. }
  290. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  291. {
  292. char *boot_device = NULL;
  293. char *ep;
  294. int dev, part = 0;
  295. ulong addr, cnt;
  296. disk_partition_t info;
  297. image_header_t *hdr;
  298. int rcode = 0;
  299. #if defined(CONFIG_FIT)
  300. const void *fit_hdr = NULL;
  301. #endif
  302. show_boot_progress (41);
  303. switch (argc) {
  304. case 1:
  305. addr = CONFIG_SYS_LOAD_ADDR;
  306. boot_device = getenv ("bootdevice");
  307. break;
  308. case 2:
  309. addr = simple_strtoul(argv[1], NULL, 16);
  310. boot_device = getenv ("bootdevice");
  311. break;
  312. case 3:
  313. addr = simple_strtoul(argv[1], NULL, 16);
  314. boot_device = argv[2];
  315. break;
  316. default:
  317. show_boot_progress (-42);
  318. return cmd_usage(cmdtp);
  319. }
  320. show_boot_progress (42);
  321. if (!boot_device) {
  322. puts ("\n** No boot device **\n");
  323. show_boot_progress (-43);
  324. return 1;
  325. }
  326. show_boot_progress (43);
  327. dev = simple_strtoul(boot_device, &ep, 16);
  328. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  329. printf ("\n** Device %d not available\n", dev);
  330. show_boot_progress (-44);
  331. return 1;
  332. }
  333. show_boot_progress (44);
  334. if (*ep) {
  335. if (*ep != ':') {
  336. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  337. show_boot_progress (-45);
  338. return 1;
  339. }
  340. part = simple_strtoul(++ep, NULL, 16);
  341. }
  342. show_boot_progress (45);
  343. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  344. show_boot_progress (-46);
  345. return 1;
  346. }
  347. show_boot_progress (46);
  348. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  349. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  350. printf ("\n** Invalid partition type \"%.32s\""
  351. " (expect \"" BOOT_PART_TYPE "\")\n",
  352. info.type);
  353. show_boot_progress (-47);
  354. return 1;
  355. }
  356. show_boot_progress (47);
  357. printf ("\nLoading from IDE device %d, partition %d: "
  358. "Name: %.32s Type: %.32s\n",
  359. dev, part, info.name, info.type);
  360. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  361. info.start, info.size, info.blksz);
  362. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  363. printf ("** Read error on %d:%d\n", dev, part);
  364. show_boot_progress (-48);
  365. return 1;
  366. }
  367. show_boot_progress (48);
  368. switch (genimg_get_format ((void *)addr)) {
  369. case IMAGE_FORMAT_LEGACY:
  370. hdr = (image_header_t *)addr;
  371. show_boot_progress (49);
  372. if (!image_check_hcrc (hdr)) {
  373. puts ("\n** Bad Header Checksum **\n");
  374. show_boot_progress (-50);
  375. return 1;
  376. }
  377. show_boot_progress (50);
  378. image_print_contents (hdr);
  379. cnt = image_get_image_size (hdr);
  380. break;
  381. #if defined(CONFIG_FIT)
  382. case IMAGE_FORMAT_FIT:
  383. fit_hdr = (const void *)addr;
  384. puts ("Fit image detected...\n");
  385. cnt = fit_get_size (fit_hdr);
  386. break;
  387. #endif
  388. default:
  389. show_boot_progress (-49);
  390. puts ("** Unknown image type\n");
  391. return 1;
  392. }
  393. cnt += info.blksz - 1;
  394. cnt /= info.blksz;
  395. cnt -= 1;
  396. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  397. (ulong *)(addr+info.blksz)) != cnt) {
  398. printf ("** Read error on %d:%d\n", dev, part);
  399. show_boot_progress (-51);
  400. return 1;
  401. }
  402. show_boot_progress (51);
  403. #if defined(CONFIG_FIT)
  404. /* This cannot be done earlier, we need complete FIT image in RAM first */
  405. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  406. if (!fit_check_format (fit_hdr)) {
  407. show_boot_progress (-140);
  408. puts ("** Bad FIT image format\n");
  409. return 1;
  410. }
  411. show_boot_progress (141);
  412. fit_print_contents (fit_hdr);
  413. }
  414. #endif
  415. /* Loading ok, update default load address */
  416. load_addr = addr;
  417. /* Check if we should attempt an auto-start */
  418. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  419. char *local_args[2];
  420. local_args[0] = argv[0];
  421. local_args[1] = NULL;
  422. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  423. do_bootm (cmdtp, 0, 1, local_args);
  424. rcode = 1;
  425. }
  426. return rcode;
  427. }
  428. /* ------------------------------------------------------------------------- */
  429. void inline
  430. __ide_outb(int dev, int port, unsigned char val)
  431. {
  432. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  433. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  434. #if defined(CONFIG_IDE_AHB)
  435. if (port) {
  436. /* write command */
  437. ide_write_register(dev, port, val);
  438. } else {
  439. /* write data */
  440. outb(val, (ATA_CURR_BASE(dev)));
  441. }
  442. #else
  443. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  444. #endif
  445. }
  446. void ide_outb (int dev, int port, unsigned char val)
  447. __attribute__((weak, alias("__ide_outb")));
  448. unsigned char inline
  449. __ide_inb(int dev, int port)
  450. {
  451. uchar val;
  452. #if defined(CONFIG_IDE_AHB)
  453. val = ide_read_register(dev, port);
  454. #else
  455. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  456. #endif
  457. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  458. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  459. return val;
  460. }
  461. unsigned char ide_inb(int dev, int port)
  462. __attribute__((weak, alias("__ide_inb")));
  463. #ifdef CONFIG_TUNE_PIO
  464. int inline
  465. __ide_set_piomode(int pio_mode)
  466. {
  467. return 0;
  468. }
  469. int inline ide_set_piomode(int pio_mode)
  470. __attribute__((weak, alias("__ide_set_piomode")));
  471. #endif
  472. void ide_init (void)
  473. {
  474. #ifdef CONFIG_IDE_8xx_DIRECT
  475. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  476. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  477. #endif
  478. unsigned char c;
  479. int i, bus;
  480. #if defined(CONFIG_SC3)
  481. unsigned int ata_reset_time = ATA_RESET_TIME;
  482. #endif
  483. #ifdef CONFIG_IDE_8xx_PCCARD
  484. extern int pcmcia_on (void);
  485. extern int ide_devices_found; /* Initialized in check_ide_device() */
  486. #endif /* CONFIG_IDE_8xx_PCCARD */
  487. #ifdef CONFIG_IDE_PREINIT
  488. extern int ide_preinit (void);
  489. WATCHDOG_RESET();
  490. if (ide_preinit ()) {
  491. puts ("ide_preinit failed\n");
  492. return;
  493. }
  494. #endif /* CONFIG_IDE_PREINIT */
  495. #ifdef CONFIG_IDE_8xx_PCCARD
  496. extern int pcmcia_on (void);
  497. extern int ide_devices_found; /* Initialized in check_ide_device() */
  498. WATCHDOG_RESET();
  499. ide_devices_found = 0;
  500. /* initialize the PCMCIA IDE adapter card */
  501. pcmcia_on();
  502. if (!ide_devices_found)
  503. return;
  504. udelay (1000000); /* 1 s */
  505. #endif /* CONFIG_IDE_8xx_PCCARD */
  506. WATCHDOG_RESET();
  507. #ifdef CONFIG_IDE_8xx_DIRECT
  508. /* Initialize PIO timing tables */
  509. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  510. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  511. gd->bus_clk);
  512. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  513. gd->bus_clk);
  514. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  515. gd->bus_clk);
  516. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  517. " len=%3d ns/%d clk"
  518. " hold=%2d ns/%d clk\n",
  519. i,
  520. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  521. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  522. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  523. }
  524. #endif /* CONFIG_IDE_8xx_DIRECT */
  525. /* Reset the IDE just to be sure.
  526. * Light LED's to show
  527. */
  528. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  529. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  530. #ifdef CONFIG_IDE_8xx_DIRECT
  531. /* PCMCIA / IDE initialization for common mem space */
  532. pcmp->pcmc_pgcrb = 0;
  533. /* start in PIO mode 0 - most relaxed timings */
  534. pio_mode = 0;
  535. set_pcmcia_timing (pio_mode);
  536. #endif /* CONFIG_IDE_8xx_DIRECT */
  537. /*
  538. * Wait for IDE to get ready.
  539. * According to spec, this can take up to 31 seconds!
  540. */
  541. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  542. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  543. #ifdef CONFIG_IDE_8xx_PCCARD
  544. /* Skip non-ide devices from probing */
  545. if ((ide_devices_found & (1 << bus)) == 0) {
  546. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  547. continue;
  548. }
  549. #endif
  550. printf ("Bus %d: ", bus);
  551. ide_bus_ok[bus] = 0;
  552. /* Select device
  553. */
  554. udelay (100000); /* 100 ms */
  555. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  556. udelay (100000); /* 100 ms */
  557. i = 0;
  558. do {
  559. udelay (10000); /* 10 ms */
  560. c = ide_inb (dev, ATA_STATUS);
  561. i++;
  562. #if defined(CONFIG_SC3)
  563. if (i > (ata_reset_time * 100)) {
  564. #else
  565. if (i > (ATA_RESET_TIME * 100)) {
  566. #endif
  567. puts ("** Timeout **\n");
  568. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  569. return;
  570. }
  571. if ((i >= 100) && ((i%100)==0)) {
  572. putc ('.');
  573. }
  574. } while (c & ATA_STAT_BUSY);
  575. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  576. puts ("not available ");
  577. debug ("Status = 0x%02X ", c);
  578. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  579. } else if ((c & ATA_STAT_READY) == 0) {
  580. puts ("not available ");
  581. debug ("Status = 0x%02X ", c);
  582. #endif
  583. } else {
  584. puts ("OK ");
  585. ide_bus_ok[bus] = 1;
  586. }
  587. WATCHDOG_RESET();
  588. }
  589. putc ('\n');
  590. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  591. curr_device = -1;
  592. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  593. #ifdef CONFIG_IDE_LED
  594. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  595. #endif
  596. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  597. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  598. ide_dev_desc[i].dev=i;
  599. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  600. ide_dev_desc[i].blksz=0;
  601. ide_dev_desc[i].lba=0;
  602. ide_dev_desc[i].block_read=ide_read;
  603. ide_dev_desc[i].block_write = ide_write;
  604. if (!ide_bus_ok[IDE_BUS(i)])
  605. continue;
  606. ide_led (led, 1); /* LED on */
  607. ide_ident(&ide_dev_desc[i]);
  608. ide_led (led, 0); /* LED off */
  609. dev_print(&ide_dev_desc[i]);
  610. /* ide_print (i); */
  611. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  612. init_part (&ide_dev_desc[i]); /* initialize partition type */
  613. if (curr_device < 0)
  614. curr_device = i;
  615. }
  616. }
  617. WATCHDOG_RESET();
  618. }
  619. /* ------------------------------------------------------------------------- */
  620. block_dev_desc_t * ide_get_dev(int dev)
  621. {
  622. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  623. }
  624. #ifdef CONFIG_IDE_8xx_DIRECT
  625. static void
  626. set_pcmcia_timing (int pmode)
  627. {
  628. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  629. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  630. ulong timings;
  631. debug ("Set timing for PIO Mode %d\n", pmode);
  632. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  633. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  634. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  635. ;
  636. /* IDE 0
  637. */
  638. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  639. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  640. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  641. | timings
  642. #endif
  643. ;
  644. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  645. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  646. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  647. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  648. | timings
  649. #endif
  650. ;
  651. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  652. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  653. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  654. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  655. | timings
  656. #endif
  657. ;
  658. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  659. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  660. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  661. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  662. | timings
  663. #endif
  664. ;
  665. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  666. /* IDE 1
  667. */
  668. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  669. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  670. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  671. | timings
  672. #endif
  673. ;
  674. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  675. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  676. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  677. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  678. | timings
  679. #endif
  680. ;
  681. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  682. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  683. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  684. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  685. | timings
  686. #endif
  687. ;
  688. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  689. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  690. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  691. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  692. | timings
  693. #endif
  694. ;
  695. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  696. }
  697. #endif /* CONFIG_IDE_8xx_DIRECT */
  698. /* ------------------------------------------------------------------------- */
  699. /* We only need to swap data if we are running on a big endian cpu. */
  700. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  701. #if defined(__LITTLE_ENDIAN) || \
  702. (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
  703. #define input_swap_data(x,y,z) input_data(x,y,z)
  704. #else
  705. static void
  706. input_swap_data(int dev, ulong *sect_buf, int words)
  707. {
  708. #if defined(CONFIG_CPC45)
  709. uchar i;
  710. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  711. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  712. ushort *dbuf = (ushort *)sect_buf;
  713. while (words--) {
  714. for (i=0; i<2; i++) {
  715. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  716. *(uchar *)dbuf = *pbuf_odd;
  717. dbuf+=1;
  718. }
  719. }
  720. #else
  721. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  722. ushort *dbuf = (ushort *)sect_buf;
  723. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  724. while (words--) {
  725. #ifdef __MIPS__
  726. *dbuf++ = swab16p((u16*)pbuf);
  727. *dbuf++ = swab16p((u16*)pbuf);
  728. #elif defined(CONFIG_PCS440EP)
  729. *dbuf++ = *pbuf;
  730. *dbuf++ = *pbuf;
  731. #else
  732. *dbuf++ = ld_le16(pbuf);
  733. *dbuf++ = ld_le16(pbuf);
  734. #endif /* !MIPS */
  735. }
  736. #endif
  737. }
  738. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  739. #if defined(CONFIG_IDE_SWAP_IO)
  740. static void
  741. output_data(int dev, const ulong *sect_buf, int words)
  742. {
  743. #if defined(CONFIG_CPC45)
  744. uchar *dbuf;
  745. volatile uchar *pbuf_even;
  746. volatile uchar *pbuf_odd;
  747. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  748. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  749. dbuf = (uchar *)sect_buf;
  750. while (words--) {
  751. EIEIO;
  752. *pbuf_even = *dbuf++;
  753. EIEIO;
  754. *pbuf_odd = *dbuf++;
  755. EIEIO;
  756. *pbuf_even = *dbuf++;
  757. EIEIO;
  758. *pbuf_odd = *dbuf++;
  759. }
  760. #else
  761. ushort *dbuf;
  762. volatile ushort *pbuf;
  763. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  764. dbuf = (ushort *)sect_buf;
  765. while (words--) {
  766. #if defined(CONFIG_PCS440EP)
  767. /* not tested, because CF was write protected */
  768. EIEIO;
  769. *pbuf = ld_le16(dbuf++);
  770. EIEIO;
  771. *pbuf = ld_le16(dbuf++);
  772. #else
  773. EIEIO;
  774. *pbuf = *dbuf++;
  775. EIEIO;
  776. *pbuf = *dbuf++;
  777. #endif
  778. }
  779. #endif
  780. }
  781. #else /* ! CONFIG_IDE_SWAP_IO */
  782. static void
  783. output_data(int dev, const ulong *sect_buf, int words)
  784. {
  785. #if defined(CONFIG_IDE_AHB)
  786. ide_write_data(dev, sect_buf, words);
  787. #else
  788. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  789. #endif
  790. }
  791. #endif /* CONFIG_IDE_SWAP_IO */
  792. #if defined(CONFIG_IDE_SWAP_IO)
  793. static void
  794. input_data(int dev, ulong *sect_buf, int words)
  795. {
  796. #if defined(CONFIG_CPC45)
  797. uchar *dbuf;
  798. volatile uchar *pbuf_even;
  799. volatile uchar *pbuf_odd;
  800. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  801. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  802. dbuf = (uchar *)sect_buf;
  803. while (words--) {
  804. *dbuf++ = *pbuf_even;
  805. EIEIO;
  806. SYNC;
  807. *dbuf++ = *pbuf_odd;
  808. EIEIO;
  809. SYNC;
  810. *dbuf++ = *pbuf_even;
  811. EIEIO;
  812. SYNC;
  813. *dbuf++ = *pbuf_odd;
  814. EIEIO;
  815. SYNC;
  816. }
  817. #else
  818. ushort *dbuf;
  819. volatile ushort *pbuf;
  820. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  821. dbuf = (ushort *)sect_buf;
  822. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  823. while (words--) {
  824. #if defined(CONFIG_PCS440EP)
  825. EIEIO;
  826. *dbuf++ = ld_le16(pbuf);
  827. EIEIO;
  828. *dbuf++ = ld_le16(pbuf);
  829. #else
  830. EIEIO;
  831. *dbuf++ = *pbuf;
  832. EIEIO;
  833. *dbuf++ = *pbuf;
  834. #endif
  835. }
  836. #endif
  837. }
  838. #else /* ! CONFIG_IDE_SWAP_IO */
  839. static void
  840. input_data(int dev, ulong *sect_buf, int words)
  841. {
  842. #if defined(CONFIG_IDE_AHB)
  843. ide_read_data(dev, sect_buf, words);
  844. #else
  845. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  846. #endif
  847. }
  848. #endif /* CONFIG_IDE_SWAP_IO */
  849. /* -------------------------------------------------------------------------
  850. */
  851. static void ide_ident (block_dev_desc_t *dev_desc)
  852. {
  853. ulong iobuf[ATA_SECTORWORDS];
  854. unsigned char c;
  855. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  856. #ifdef CONFIG_ATAPI
  857. int retries = 0;
  858. int do_retry = 0;
  859. #endif
  860. #ifdef CONFIG_TUNE_PIO
  861. int pio_mode;
  862. #endif
  863. #if 0
  864. int mode, cycle_time;
  865. #endif
  866. int device;
  867. device=dev_desc->dev;
  868. printf (" Device %d: ", device);
  869. ide_led (DEVICE_LED(device), 1); /* LED on */
  870. /* Select device
  871. */
  872. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  873. dev_desc->if_type=IF_TYPE_IDE;
  874. #ifdef CONFIG_ATAPI
  875. do_retry = 0;
  876. retries = 0;
  877. /* Warning: This will be tricky to read */
  878. while (retries <= 1) {
  879. /* check signature */
  880. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  881. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  882. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  883. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  884. /* ATAPI Signature found */
  885. dev_desc->if_type=IF_TYPE_ATAPI;
  886. /* Start Ident Command
  887. */
  888. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  889. /*
  890. * Wait for completion - ATAPI devices need more time
  891. * to become ready
  892. */
  893. c = ide_wait (device, ATAPI_TIME_OUT);
  894. } else
  895. #endif
  896. {
  897. /* Start Ident Command
  898. */
  899. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  900. /* Wait for completion
  901. */
  902. c = ide_wait (device, IDE_TIME_OUT);
  903. }
  904. ide_led (DEVICE_LED(device), 0); /* LED off */
  905. if (((c & ATA_STAT_DRQ) == 0) ||
  906. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  907. #ifdef CONFIG_ATAPI
  908. {
  909. /* Need to soft reset the device in case it's an ATAPI... */
  910. debug ("Retrying...\n");
  911. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  912. udelay(100000);
  913. ide_outb (device, ATA_COMMAND, 0x08);
  914. udelay (500000); /* 500 ms */
  915. }
  916. /* Select device
  917. */
  918. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  919. retries++;
  920. #else
  921. return;
  922. #endif
  923. }
  924. #ifdef CONFIG_ATAPI
  925. else
  926. break;
  927. } /* see above - ugly to read */
  928. if (retries == 2) /* Not found */
  929. return;
  930. #endif
  931. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  932. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  933. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  934. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  935. #ifdef __LITTLE_ENDIAN
  936. /*
  937. * firmware revision, model, and serial number have Big Endian Byte
  938. * order in Word. Convert all three to little endian.
  939. *
  940. * See CF+ and CompactFlash Specification Revision 2.0:
  941. * 6.2.1.6: Identify Drive, Table 39 for more details
  942. */
  943. strswab (dev_desc->revision);
  944. strswab (dev_desc->vendor);
  945. strswab (dev_desc->product);
  946. #endif /* __LITTLE_ENDIAN */
  947. if ((iop->config & 0x0080)==0x0080)
  948. dev_desc->removable = 1;
  949. else
  950. dev_desc->removable = 0;
  951. #ifdef CONFIG_TUNE_PIO
  952. /* Mode 0 - 2 only, are directly determined by word 51. */
  953. pio_mode = iop->tPIO;
  954. if (pio_mode > 2) {
  955. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  956. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  957. }
  958. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  959. * shall set bit 1 of word 53 to one and support the fields contained
  960. * in words 64 through 70.
  961. */
  962. if (iop->field_valid & 0x02) {
  963. /* Mode 3 and above are possible. Check in order from slow
  964. * to fast, so we wind up with the highest mode allowed.
  965. */
  966. if (iop->eide_pio_modes & 0x01)
  967. pio_mode = 3;
  968. if (iop->eide_pio_modes & 0x02)
  969. pio_mode = 4;
  970. if (ata_id_is_cfa((u16 *)iop)) {
  971. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  972. pio_mode = 5;
  973. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  974. pio_mode = 6;
  975. }
  976. }
  977. /* System-specific, depends on bus speeds, etc. */
  978. ide_set_piomode(pio_mode);
  979. #endif /* CONFIG_TUNE_PIO */
  980. #if 0
  981. /*
  982. * Drive PIO mode autoselection
  983. */
  984. mode = iop->tPIO;
  985. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  986. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  987. mode = 2;
  988. debug ("Override tPIO -> 2\n");
  989. }
  990. if (iop->field_valid & 2) { /* drive implements ATA2? */
  991. debug ("Drive implements ATA2\n");
  992. if (iop->capability & 8) { /* drive supports use_iordy? */
  993. cycle_time = iop->eide_pio_iordy;
  994. } else {
  995. cycle_time = iop->eide_pio;
  996. }
  997. debug ("cycle time = %d\n", cycle_time);
  998. mode = 4;
  999. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  1000. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  1001. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  1002. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  1003. }
  1004. printf ("PIO mode to use: PIO %d\n", mode);
  1005. #endif /* 0 */
  1006. #ifdef CONFIG_ATAPI
  1007. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  1008. atapi_inquiry(dev_desc);
  1009. return;
  1010. }
  1011. #endif /* CONFIG_ATAPI */
  1012. #ifdef __BIG_ENDIAN
  1013. /* swap shorts */
  1014. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  1015. #else /* ! __BIG_ENDIAN */
  1016. /*
  1017. * do not swap shorts on little endian
  1018. *
  1019. * See CF+ and CompactFlash Specification Revision 2.0:
  1020. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1021. */
  1022. dev_desc->lba = iop->lba_capacity;
  1023. #endif /* __BIG_ENDIAN */
  1024. #ifdef CONFIG_LBA48
  1025. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  1026. dev_desc->lba48 = 1;
  1027. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1028. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1029. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1030. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1031. } else {
  1032. dev_desc->lba48 = 0;
  1033. }
  1034. #endif /* CONFIG_LBA48 */
  1035. /* assuming HD */
  1036. dev_desc->type=DEV_TYPE_HARDDISK;
  1037. dev_desc->blksz=ATA_BLOCKSIZE;
  1038. dev_desc->lun=0; /* just to fill something in... */
  1039. #if 0 /* only used to test the powersaving mode,
  1040. * if enabled, the drive goes after 5 sec
  1041. * in standby mode */
  1042. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1043. c = ide_wait (device, IDE_TIME_OUT);
  1044. ide_outb (device, ATA_SECT_CNT, 1);
  1045. ide_outb (device, ATA_LBA_LOW, 0);
  1046. ide_outb (device, ATA_LBA_MID, 0);
  1047. ide_outb (device, ATA_LBA_HIGH, 0);
  1048. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1049. ide_outb (device, ATA_COMMAND, 0xe3);
  1050. udelay (50);
  1051. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1052. #endif
  1053. }
  1054. /* ------------------------------------------------------------------------- */
  1055. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1056. {
  1057. ulong n = 0;
  1058. unsigned char c;
  1059. unsigned char pwrsave=0; /* power save */
  1060. #ifdef CONFIG_LBA48
  1061. unsigned char lba48 = 0;
  1062. if (blknr & 0x0000fffff0000000ULL) {
  1063. /* more than 28 bits used, use 48bit mode */
  1064. lba48 = 1;
  1065. }
  1066. #endif
  1067. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1068. device, blknr, blkcnt, (ulong)buffer);
  1069. ide_led (DEVICE_LED(device), 1); /* LED on */
  1070. /* Select device
  1071. */
  1072. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1073. c = ide_wait (device, IDE_TIME_OUT);
  1074. if (c & ATA_STAT_BUSY) {
  1075. printf ("IDE read: device %d not ready\n", device);
  1076. goto IDE_READ_E;
  1077. }
  1078. /* first check if the drive is in Powersaving mode, if yes,
  1079. * increase the timeout value */
  1080. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1081. udelay (50);
  1082. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1083. if (c & ATA_STAT_BUSY) {
  1084. printf ("IDE read: device %d not ready\n", device);
  1085. goto IDE_READ_E;
  1086. }
  1087. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1088. printf ("No Powersaving mode %X\n", c);
  1089. } else {
  1090. c = ide_inb(device,ATA_SECT_CNT);
  1091. debug ("Powersaving %02X\n",c);
  1092. if(c==0)
  1093. pwrsave=1;
  1094. }
  1095. while (blkcnt-- > 0) {
  1096. c = ide_wait (device, IDE_TIME_OUT);
  1097. if (c & ATA_STAT_BUSY) {
  1098. printf ("IDE read: device %d not ready\n", device);
  1099. break;
  1100. }
  1101. #ifdef CONFIG_LBA48
  1102. if (lba48) {
  1103. /* write high bits */
  1104. ide_outb (device, ATA_SECT_CNT, 0);
  1105. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1106. #ifdef CONFIG_SYS_64BIT_LBA
  1107. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1108. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1109. #else
  1110. ide_outb (device, ATA_LBA_MID, 0);
  1111. ide_outb (device, ATA_LBA_HIGH, 0);
  1112. #endif
  1113. }
  1114. #endif
  1115. ide_outb (device, ATA_SECT_CNT, 1);
  1116. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1117. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1118. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1119. #ifdef CONFIG_LBA48
  1120. if (lba48) {
  1121. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1122. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1123. } else
  1124. #endif
  1125. {
  1126. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1127. ATA_DEVICE(device) |
  1128. ((blknr >> 24) & 0xF) );
  1129. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1130. }
  1131. udelay (50);
  1132. if(pwrsave) {
  1133. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1134. pwrsave=0;
  1135. } else {
  1136. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1137. }
  1138. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1139. #if defined(CONFIG_SYS_64BIT_LBA)
  1140. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1141. device, blknr, c);
  1142. #else
  1143. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1144. device, (ulong)blknr, c);
  1145. #endif
  1146. break;
  1147. }
  1148. input_data (device, buffer, ATA_SECTORWORDS);
  1149. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1150. ++n;
  1151. ++blknr;
  1152. buffer += ATA_BLOCKSIZE;
  1153. }
  1154. IDE_READ_E:
  1155. ide_led (DEVICE_LED(device), 0); /* LED off */
  1156. return (n);
  1157. }
  1158. /* ------------------------------------------------------------------------- */
  1159. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
  1160. {
  1161. ulong n = 0;
  1162. unsigned char c;
  1163. #ifdef CONFIG_LBA48
  1164. unsigned char lba48 = 0;
  1165. if (blknr & 0x0000fffff0000000ULL) {
  1166. /* more than 28 bits used, use 48bit mode */
  1167. lba48 = 1;
  1168. }
  1169. #endif
  1170. ide_led (DEVICE_LED(device), 1); /* LED on */
  1171. /* Select device
  1172. */
  1173. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1174. while (blkcnt-- > 0) {
  1175. c = ide_wait (device, IDE_TIME_OUT);
  1176. if (c & ATA_STAT_BUSY) {
  1177. printf ("IDE read: device %d not ready\n", device);
  1178. goto WR_OUT;
  1179. }
  1180. #ifdef CONFIG_LBA48
  1181. if (lba48) {
  1182. /* write high bits */
  1183. ide_outb (device, ATA_SECT_CNT, 0);
  1184. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1185. #ifdef CONFIG_SYS_64BIT_LBA
  1186. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1187. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1188. #else
  1189. ide_outb (device, ATA_LBA_MID, 0);
  1190. ide_outb (device, ATA_LBA_HIGH, 0);
  1191. #endif
  1192. }
  1193. #endif
  1194. ide_outb (device, ATA_SECT_CNT, 1);
  1195. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1196. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1197. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1198. #ifdef CONFIG_LBA48
  1199. if (lba48) {
  1200. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1201. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1202. } else
  1203. #endif
  1204. {
  1205. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1206. ATA_DEVICE(device) |
  1207. ((blknr >> 24) & 0xF) );
  1208. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1209. }
  1210. udelay (50);
  1211. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1212. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1213. #if defined(CONFIG_SYS_64BIT_LBA)
  1214. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1215. device, blknr, c);
  1216. #else
  1217. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1218. device, (ulong)blknr, c);
  1219. #endif
  1220. goto WR_OUT;
  1221. }
  1222. output_data (device, buffer, ATA_SECTORWORDS);
  1223. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1224. ++n;
  1225. ++blknr;
  1226. buffer += ATA_BLOCKSIZE;
  1227. }
  1228. WR_OUT:
  1229. ide_led (DEVICE_LED(device), 0); /* LED off */
  1230. return (n);
  1231. }
  1232. /* ------------------------------------------------------------------------- */
  1233. /*
  1234. * copy src to dest, skipping leading and trailing blanks and null
  1235. * terminate the string
  1236. * "len" is the size of available memory including the terminating '\0'
  1237. */
  1238. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1239. {
  1240. unsigned char *end, *last;
  1241. last = dst;
  1242. end = src + len - 1;
  1243. /* reserve space for '\0' */
  1244. if (len < 2)
  1245. goto OUT;
  1246. /* skip leading white space */
  1247. while ((*src) && (src<end) && (*src==' '))
  1248. ++src;
  1249. /* copy string, omitting trailing white space */
  1250. while ((*src) && (src<end)) {
  1251. *dst++ = *src;
  1252. if (*src++ != ' ')
  1253. last = dst;
  1254. }
  1255. OUT:
  1256. *last = '\0';
  1257. }
  1258. /* ------------------------------------------------------------------------- */
  1259. /*
  1260. * Wait until Busy bit is off, or timeout (in ms)
  1261. * Return last status
  1262. */
  1263. static uchar ide_wait (int dev, ulong t)
  1264. {
  1265. ulong delay = 10 * t; /* poll every 100 us */
  1266. uchar c;
  1267. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1268. udelay (100);
  1269. if (delay-- == 0) {
  1270. break;
  1271. }
  1272. }
  1273. return (c);
  1274. }
  1275. /* ------------------------------------------------------------------------- */
  1276. #ifdef CONFIG_IDE_RESET
  1277. extern void ide_set_reset(int idereset);
  1278. static void ide_reset (void)
  1279. {
  1280. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1281. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1282. #endif
  1283. int i;
  1284. curr_device = -1;
  1285. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1286. ide_bus_ok[i] = 0;
  1287. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1288. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1289. ide_set_reset (1); /* assert reset */
  1290. /* the reset signal shall be asserted for et least 25 us */
  1291. udelay(25);
  1292. WATCHDOG_RESET();
  1293. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1294. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1295. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1296. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1297. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1298. /* wait 500 ms for the voltage to stabilize
  1299. */
  1300. for (i=0; i<500; ++i) {
  1301. udelay (1000);
  1302. }
  1303. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1304. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1305. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1306. /* configure IDE Motor voltage monitor pin as input */
  1307. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1308. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1309. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1310. /* wait up to 1 s for the motor voltage to stabilize
  1311. */
  1312. for (i=0; i<1000; ++i) {
  1313. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1314. break;
  1315. }
  1316. udelay (1000);
  1317. }
  1318. if (i == 1000) { /* Timeout */
  1319. printf ("\nWarning: 5V for IDE Motor missing\n");
  1320. # ifdef CONFIG_STATUS_LED
  1321. # ifdef STATUS_LED_YELLOW
  1322. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1323. # endif
  1324. # ifdef STATUS_LED_GREEN
  1325. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1326. # endif
  1327. # endif /* CONFIG_STATUS_LED */
  1328. }
  1329. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1330. WATCHDOG_RESET();
  1331. /* de-assert RESET signal */
  1332. ide_set_reset(0);
  1333. /* wait 250 ms */
  1334. for (i=0; i<250; ++i) {
  1335. udelay (1000);
  1336. }
  1337. }
  1338. #endif /* CONFIG_IDE_RESET */
  1339. /* ------------------------------------------------------------------------- */
  1340. #if defined(CONFIG_IDE_LED) && \
  1341. !defined(CONFIG_CPC45) && \
  1342. !defined(CONFIG_KUP4K) && \
  1343. !defined(CONFIG_KUP4X)
  1344. static uchar led_buffer = 0; /* Buffer for current LED status */
  1345. static void ide_led (uchar led, uchar status)
  1346. {
  1347. uchar *led_port = LED_PORT;
  1348. if (status) { /* switch LED on */
  1349. led_buffer |= led;
  1350. } else { /* switch LED off */
  1351. led_buffer &= ~led;
  1352. }
  1353. *led_port = led_buffer;
  1354. }
  1355. #endif /* CONFIG_IDE_LED */
  1356. #if defined(CONFIG_OF_IDE_FIXUP)
  1357. int ide_device_present(int dev)
  1358. {
  1359. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1360. return 0;
  1361. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1362. }
  1363. #endif
  1364. /* ------------------------------------------------------------------------- */
  1365. #ifdef CONFIG_ATAPI
  1366. /****************************************************************************
  1367. * ATAPI Support
  1368. */
  1369. #if defined(CONFIG_IDE_SWAP_IO)
  1370. /* since ATAPI may use commands with not 4 bytes alligned length
  1371. * we have our own transfer functions, 2 bytes alligned */
  1372. static void
  1373. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1374. {
  1375. #if defined(CONFIG_CPC45)
  1376. uchar *dbuf;
  1377. volatile uchar *pbuf_even;
  1378. volatile uchar *pbuf_odd;
  1379. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1380. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1381. while (shorts--) {
  1382. EIEIO;
  1383. *pbuf_even = *dbuf++;
  1384. EIEIO;
  1385. *pbuf_odd = *dbuf++;
  1386. }
  1387. #else
  1388. ushort *dbuf;
  1389. volatile ushort *pbuf;
  1390. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1391. dbuf = (ushort *)sect_buf;
  1392. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1393. while (shorts--) {
  1394. EIEIO;
  1395. *pbuf = *dbuf++;
  1396. }
  1397. #endif
  1398. }
  1399. static void
  1400. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1401. {
  1402. #if defined(CONFIG_CPC45)
  1403. uchar *dbuf;
  1404. volatile uchar *pbuf_even;
  1405. volatile uchar *pbuf_odd;
  1406. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1407. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1408. while (shorts--) {
  1409. EIEIO;
  1410. *dbuf++ = *pbuf_even;
  1411. EIEIO;
  1412. *dbuf++ = *pbuf_odd;
  1413. }
  1414. #else
  1415. ushort *dbuf;
  1416. volatile ushort *pbuf;
  1417. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1418. dbuf = (ushort *)sect_buf;
  1419. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1420. while (shorts--) {
  1421. EIEIO;
  1422. *dbuf++ = *pbuf;
  1423. }
  1424. #endif
  1425. }
  1426. #else /* ! CONFIG_IDE_SWAP_IO */
  1427. static void
  1428. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1429. {
  1430. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1431. }
  1432. static void
  1433. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1434. {
  1435. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1436. }
  1437. #endif /* CONFIG_IDE_SWAP_IO */
  1438. /*
  1439. * Wait until (Status & mask) == res, or timeout (in ms)
  1440. * Return last status
  1441. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1442. * and then they set their DRQ Bit
  1443. */
  1444. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1445. {
  1446. ulong delay = 10 * t; /* poll every 100 us */
  1447. uchar c;
  1448. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1449. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1450. /* break if error occurs (doesn't make sense to wait more) */
  1451. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1452. break;
  1453. udelay (100);
  1454. if (delay-- == 0) {
  1455. break;
  1456. }
  1457. }
  1458. return (c);
  1459. }
  1460. /*
  1461. * issue an atapi command
  1462. */
  1463. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1464. {
  1465. unsigned char c,err,mask,res;
  1466. int n;
  1467. ide_led (DEVICE_LED(device), 1); /* LED on */
  1468. /* Select device
  1469. */
  1470. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1471. res = 0;
  1472. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1473. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1474. if ((c & mask) != res) {
  1475. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1476. err=0xFF;
  1477. goto AI_OUT;
  1478. }
  1479. /* write taskfile */
  1480. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1481. ide_outb (device, ATA_SECT_CNT, 0);
  1482. ide_outb (device, ATA_SECT_NUM, 0);
  1483. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1484. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1485. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1486. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1487. udelay (50);
  1488. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1489. res = ATA_STAT_DRQ;
  1490. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1491. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1492. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1493. err=0xFF;
  1494. goto AI_OUT;
  1495. }
  1496. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1497. /* ATAPI Command written wait for completition */
  1498. udelay (5000); /* device must set bsy */
  1499. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1500. /* if no data wait for DRQ = 0 BSY = 0
  1501. * if data wait for DRQ = 1 BSY = 0 */
  1502. res=0;
  1503. if(buflen)
  1504. res = ATA_STAT_DRQ;
  1505. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1506. if ((c & mask) != res ) {
  1507. if (c & ATA_STAT_ERR) {
  1508. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1509. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1510. } else {
  1511. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1512. err=0xFF;
  1513. }
  1514. goto AI_OUT;
  1515. }
  1516. n=ide_inb(device, ATA_CYL_HIGH);
  1517. n<<=8;
  1518. n+=ide_inb(device, ATA_CYL_LOW);
  1519. if(n>buflen) {
  1520. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1521. err=0xff;
  1522. goto AI_OUT;
  1523. }
  1524. if((n==0)&&(buflen<0)) {
  1525. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1526. err=0xff;
  1527. goto AI_OUT;
  1528. }
  1529. if(n!=buflen) {
  1530. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1531. }
  1532. if(n!=0) { /* data transfer */
  1533. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1534. /* we transfer shorts */
  1535. n>>=1;
  1536. /* ok now decide if it is an in or output */
  1537. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1538. debug ("Write to device\n");
  1539. output_data_shorts(device,(unsigned short *)buffer,n);
  1540. } else {
  1541. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1542. input_data_shorts(device,(unsigned short *)buffer,n);
  1543. }
  1544. }
  1545. udelay(5000); /* seems that some CD ROMs need this... */
  1546. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1547. res=0;
  1548. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1549. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1550. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1551. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1552. } else {
  1553. err = 0;
  1554. }
  1555. AI_OUT:
  1556. ide_led (DEVICE_LED(device), 0); /* LED off */
  1557. return (err);
  1558. }
  1559. /*
  1560. * sending the command to atapi_issue. If an status other than good
  1561. * returns, an request_sense will be issued
  1562. */
  1563. #define ATAPI_DRIVE_NOT_READY 100
  1564. #define ATAPI_UNIT_ATTN 10
  1565. unsigned char atapi_issue_autoreq (int device,
  1566. unsigned char* ccb,
  1567. int ccblen,
  1568. unsigned char *buffer,
  1569. int buflen)
  1570. {
  1571. unsigned char sense_data[18],sense_ccb[12];
  1572. unsigned char res,key,asc,ascq;
  1573. int notready,unitattn;
  1574. unitattn=ATAPI_UNIT_ATTN;
  1575. notready=ATAPI_DRIVE_NOT_READY;
  1576. retry:
  1577. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1578. if (res==0)
  1579. return (0); /* Ok */
  1580. if (res==0xFF)
  1581. return (0xFF); /* error */
  1582. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1583. memset(sense_ccb,0,sizeof(sense_ccb));
  1584. memset(sense_data,0,sizeof(sense_data));
  1585. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1586. sense_ccb[4]=18; /* allocation Length */
  1587. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1588. key=(sense_data[2]&0xF);
  1589. asc=(sense_data[12]);
  1590. ascq=(sense_data[13]);
  1591. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1592. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1593. sense_data[0],
  1594. key,
  1595. asc,
  1596. ascq);
  1597. if((key==0))
  1598. return 0; /* ok device ready */
  1599. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1600. if(unitattn-->0) {
  1601. udelay(200*1000);
  1602. goto retry;
  1603. }
  1604. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1605. goto error;
  1606. }
  1607. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1608. if (notready-->0) {
  1609. udelay(200*1000);
  1610. goto retry;
  1611. }
  1612. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1613. goto error;
  1614. }
  1615. if(asc==0x3a) {
  1616. debug ("Media not present\n");
  1617. goto error;
  1618. }
  1619. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1620. error:
  1621. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1622. return (0xFF);
  1623. }
  1624. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1625. {
  1626. unsigned char ccb[12]; /* Command descriptor block */
  1627. unsigned char iobuf[64]; /* temp buf */
  1628. unsigned char c;
  1629. int device;
  1630. device=dev_desc->dev;
  1631. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1632. dev_desc->block_read=atapi_read;
  1633. memset(ccb,0,sizeof(ccb));
  1634. memset(iobuf,0,sizeof(iobuf));
  1635. ccb[0]=ATAPI_CMD_INQUIRY;
  1636. ccb[4]=40; /* allocation Legnth */
  1637. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1638. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1639. if (c!=0)
  1640. return;
  1641. /* copy device ident strings */
  1642. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1643. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1644. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1645. dev_desc->lun=0;
  1646. dev_desc->lba=0;
  1647. dev_desc->blksz=0;
  1648. dev_desc->type=iobuf[0] & 0x1f;
  1649. if ((iobuf[1]&0x80)==0x80)
  1650. dev_desc->removable = 1;
  1651. else
  1652. dev_desc->removable = 0;
  1653. memset(ccb,0,sizeof(ccb));
  1654. memset(iobuf,0,sizeof(iobuf));
  1655. ccb[0]=ATAPI_CMD_START_STOP;
  1656. ccb[4]=0x03; /* start */
  1657. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1658. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1659. if (c!=0)
  1660. return;
  1661. memset(ccb,0,sizeof(ccb));
  1662. memset(iobuf,0,sizeof(iobuf));
  1663. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1664. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1665. if (c!=0)
  1666. return;
  1667. memset(ccb,0,sizeof(ccb));
  1668. memset(iobuf,0,sizeof(iobuf));
  1669. ccb[0]=ATAPI_CMD_READ_CAP;
  1670. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1671. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1672. if (c!=0)
  1673. return;
  1674. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1675. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1676. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1677. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1678. ((unsigned long)iobuf[1]<<16) +
  1679. ((unsigned long)iobuf[2]<< 8) +
  1680. ((unsigned long)iobuf[3]);
  1681. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1682. ((unsigned long)iobuf[5]<<16) +
  1683. ((unsigned long)iobuf[6]<< 8) +
  1684. ((unsigned long)iobuf[7]);
  1685. #ifdef CONFIG_LBA48
  1686. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1687. #endif
  1688. return;
  1689. }
  1690. /*
  1691. * atapi_read:
  1692. * we transfer only one block per command, since the multiple DRQ per
  1693. * command is not yet implemented
  1694. */
  1695. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1696. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1697. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1698. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1699. {
  1700. ulong n = 0;
  1701. unsigned char ccb[12]; /* Command descriptor block */
  1702. ulong cnt;
  1703. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1704. device, blknr, blkcnt, (ulong)buffer);
  1705. do {
  1706. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1707. cnt=ATAPI_READ_MAX_BLOCK;
  1708. } else {
  1709. cnt=blkcnt;
  1710. }
  1711. ccb[0]=ATAPI_CMD_READ_12;
  1712. ccb[1]=0; /* reserved */
  1713. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1714. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1715. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1716. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1717. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1718. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1719. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1720. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1721. ccb[10]=0; /* reserved */
  1722. ccb[11]=0; /* reserved */
  1723. if (atapi_issue_autoreq(device,ccb,12,
  1724. (unsigned char *)buffer,
  1725. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1726. return (n);
  1727. }
  1728. n+=cnt;
  1729. blkcnt-=cnt;
  1730. blknr+=cnt;
  1731. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1732. } while (blkcnt > 0);
  1733. return (n);
  1734. }
  1735. /* ------------------------------------------------------------------------- */
  1736. #endif /* CONFIG_ATAPI */
  1737. U_BOOT_CMD(
  1738. ide, 5, 1, do_ide,
  1739. "IDE sub-system",
  1740. "reset - reset IDE controller\n"
  1741. "ide info - show available IDE devices\n"
  1742. "ide device [dev] - show or set current device\n"
  1743. "ide part [dev] - print partition table of one or all IDE devices\n"
  1744. "ide read addr blk# cnt\n"
  1745. "ide write addr blk# cnt - read/write `cnt'"
  1746. " blocks starting at block `blk#'\n"
  1747. " to/from memory address `addr'"
  1748. );
  1749. U_BOOT_CMD(
  1750. diskboot, 3, 1, do_diskboot,
  1751. "boot from IDE device",
  1752. "loadAddr dev:part"
  1753. );