designware_i2c.h 3.0 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef __DW_I2C_H_
  8. #define __DW_I2C_H_
  9. struct i2c_regs {
  10. u32 ic_con;
  11. u32 ic_tar;
  12. u32 ic_sar;
  13. u32 ic_hs_maddr;
  14. u32 ic_cmd_data;
  15. u32 ic_ss_scl_hcnt;
  16. u32 ic_ss_scl_lcnt;
  17. u32 ic_fs_scl_hcnt;
  18. u32 ic_fs_scl_lcnt;
  19. u32 ic_hs_scl_hcnt;
  20. u32 ic_hs_scl_lcnt;
  21. u32 ic_intr_stat;
  22. u32 ic_intr_mask;
  23. u32 ic_raw_intr_stat;
  24. u32 ic_rx_tl;
  25. u32 ic_tx_tl;
  26. u32 ic_clr_intr;
  27. u32 ic_clr_rx_under;
  28. u32 ic_clr_rx_over;
  29. u32 ic_clr_tx_over;
  30. u32 ic_clr_rd_req;
  31. u32 ic_clr_tx_abrt;
  32. u32 ic_clr_rx_done;
  33. u32 ic_clr_activity;
  34. u32 ic_clr_stop_det;
  35. u32 ic_clr_start_det;
  36. u32 ic_clr_gen_call;
  37. u32 ic_enable;
  38. u32 ic_status;
  39. u32 ic_txflr;
  40. u32 ix_rxflr;
  41. u32 reserved_1;
  42. u32 ic_tx_abrt_source;
  43. };
  44. #if !defined(IC_CLK)
  45. #define IC_CLK 166
  46. #endif
  47. #define NANO_TO_MICRO 1000
  48. /* High and low times in different speed modes (in ns) */
  49. #define MIN_SS_SCL_HIGHTIME 4000
  50. #define MIN_SS_SCL_LOWTIME 4700
  51. #define MIN_FS_SCL_HIGHTIME 600
  52. #define MIN_FS_SCL_LOWTIME 1300
  53. #define MIN_HS_SCL_HIGHTIME 60
  54. #define MIN_HS_SCL_LOWTIME 160
  55. /* Worst case timeout for 1 byte is kept as 2ms */
  56. #define I2C_BYTE_TO (CONFIG_SYS_HZ/500)
  57. #define I2C_STOPDET_TO (CONFIG_SYS_HZ/500)
  58. #define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16)
  59. /* i2c control register definitions */
  60. #define IC_CON_SD 0x0040
  61. #define IC_CON_RE 0x0020
  62. #define IC_CON_10BITADDRMASTER 0x0010
  63. #define IC_CON_10BITADDR_SLAVE 0x0008
  64. #define IC_CON_SPD_MSK 0x0006
  65. #define IC_CON_SPD_SS 0x0002
  66. #define IC_CON_SPD_FS 0x0004
  67. #define IC_CON_SPD_HS 0x0006
  68. #define IC_CON_MM 0x0001
  69. /* i2c target address register definitions */
  70. #define TAR_ADDR 0x0050
  71. /* i2c slave address register definitions */
  72. #define IC_SLAVE_ADDR 0x0002
  73. /* i2c data buffer and command register definitions */
  74. #define IC_CMD 0x0100
  75. #define IC_STOP 0x0200
  76. /* i2c interrupt status register definitions */
  77. #define IC_GEN_CALL 0x0800
  78. #define IC_START_DET 0x0400
  79. #define IC_STOP_DET 0x0200
  80. #define IC_ACTIVITY 0x0100
  81. #define IC_RX_DONE 0x0080
  82. #define IC_TX_ABRT 0x0040
  83. #define IC_RD_REQ 0x0020
  84. #define IC_TX_EMPTY 0x0010
  85. #define IC_TX_OVER 0x0008
  86. #define IC_RX_FULL 0x0004
  87. #define IC_RX_OVER 0x0002
  88. #define IC_RX_UNDER 0x0001
  89. /* fifo threshold register definitions */
  90. #define IC_TL0 0x00
  91. #define IC_TL1 0x01
  92. #define IC_TL2 0x02
  93. #define IC_TL3 0x03
  94. #define IC_TL4 0x04
  95. #define IC_TL5 0x05
  96. #define IC_TL6 0x06
  97. #define IC_TL7 0x07
  98. #define IC_RX_TL IC_TL0
  99. #define IC_TX_TL IC_TL0
  100. /* i2c enable register definitions */
  101. #define IC_ENABLE_0B 0x0001
  102. /* i2c status register definitions */
  103. #define IC_STATUS_SA 0x0040
  104. #define IC_STATUS_MA 0x0020
  105. #define IC_STATUS_RFF 0x0010
  106. #define IC_STATUS_RFNE 0x0008
  107. #define IC_STATUS_TFE 0x0004
  108. #define IC_STATUS_TFNF 0x0002
  109. #define IC_STATUS_ACT 0x0001
  110. /* Speed Selection */
  111. #define IC_SPEED_MODE_STANDARD 1
  112. #define IC_SPEED_MODE_FAST 2
  113. #define IC_SPEED_MODE_MAX 3
  114. #define I2C_MAX_SPEED 3400000
  115. #define I2C_FAST_SPEED 400000
  116. #define I2C_STANDARD_SPEED 100000
  117. #endif /* __DW_I2C_H_ */