fsl_hash.c 5.0 KB

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  1. /*
  2. * Copyright 2014 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. */
  7. #include <common.h>
  8. #include <malloc.h>
  9. #include "jobdesc.h"
  10. #include "desc.h"
  11. #include "jr.h"
  12. #include "fsl_hash.h"
  13. #include <hw_sha.h>
  14. #include <asm-generic/errno.h>
  15. #define CRYPTO_MAX_ALG_NAME 80
  16. #define SHA1_DIGEST_SIZE 20
  17. #define SHA256_DIGEST_SIZE 32
  18. struct caam_hash_template {
  19. char name[CRYPTO_MAX_ALG_NAME];
  20. unsigned int digestsize;
  21. u32 alg_type;
  22. };
  23. enum caam_hash_algos {
  24. SHA1 = 0,
  25. SHA256
  26. };
  27. static struct caam_hash_template driver_hash[] = {
  28. {
  29. .name = "sha1",
  30. .digestsize = SHA1_DIGEST_SIZE,
  31. .alg_type = OP_ALG_ALGSEL_SHA1,
  32. },
  33. {
  34. .name = "sha256",
  35. .digestsize = SHA256_DIGEST_SIZE,
  36. .alg_type = OP_ALG_ALGSEL_SHA256,
  37. },
  38. };
  39. static enum caam_hash_algos get_hash_type(struct hash_algo *algo)
  40. {
  41. if (!strcmp(algo->name, driver_hash[SHA1].name))
  42. return SHA1;
  43. else
  44. return SHA256;
  45. }
  46. /* Create the context for progressive hashing using h/w acceleration.
  47. *
  48. * @ctxp: Pointer to the pointer of the context for hashing
  49. * @caam_algo: Enum for SHA1 or SHA256
  50. * @return 0 if ok, -ENOMEM on error
  51. */
  52. static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo)
  53. {
  54. *ctxp = calloc(1, sizeof(struct sha_ctx));
  55. if (*ctxp == NULL) {
  56. debug("Cannot allocate memory for context\n");
  57. return -ENOMEM;
  58. }
  59. return 0;
  60. }
  61. /*
  62. * Update sg table for progressive hashing using h/w acceleration
  63. *
  64. * The context is freed by this function if an error occurs.
  65. * We support at most 32 Scatter/Gather Entries.
  66. *
  67. * @hash_ctx: Pointer to the context for hashing
  68. * @buf: Pointer to the buffer being hashed
  69. * @size: Size of the buffer being hashed
  70. * @is_last: 1 if this is the last update; 0 otherwise
  71. * @caam_algo: Enum for SHA1 or SHA256
  72. * @return 0 if ok, -EINVAL on error
  73. */
  74. static int caam_hash_update(void *hash_ctx, const void *buf,
  75. unsigned int size, int is_last,
  76. enum caam_hash_algos caam_algo)
  77. {
  78. uint32_t final = 0;
  79. dma_addr_t addr = virt_to_phys((void *)buf);
  80. struct sha_ctx *ctx = hash_ctx;
  81. if (ctx->sg_num >= MAX_SG_32) {
  82. free(ctx);
  83. return -EINVAL;
  84. }
  85. #ifdef CONFIG_PHYS_64BIT
  86. ctx->sg_tbl[ctx->sg_num].addr_hi = addr >> 32;
  87. #else
  88. ctx->sg_tbl[ctx->sg_num].addr_hi = 0x0;
  89. #endif
  90. ctx->sg_tbl[ctx->sg_num].addr_lo = addr;
  91. sec_out32(&ctx->sg_tbl[ctx->sg_num].len_flag,
  92. (size & SG_ENTRY_LENGTH_MASK));
  93. ctx->sg_num++;
  94. if (is_last) {
  95. final = sec_in32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag) |
  96. SG_ENTRY_FINAL_BIT;
  97. sec_out32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag, final);
  98. }
  99. return 0;
  100. }
  101. /*
  102. * Perform progressive hashing on the given buffer and copy hash at
  103. * destination buffer
  104. *
  105. * The context is freed after completion of hash operation.
  106. *
  107. * @hash_ctx: Pointer to the context for hashing
  108. * @dest_buf: Pointer to the destination buffer where hash is to be copied
  109. * @size: Size of the buffer being hashed
  110. * @caam_algo: Enum for SHA1 or SHA256
  111. * @return 0 if ok, -EINVAL on error
  112. */
  113. static int caam_hash_finish(void *hash_ctx, void *dest_buf,
  114. int size, enum caam_hash_algos caam_algo)
  115. {
  116. uint32_t len = 0;
  117. struct sha_ctx *ctx = hash_ctx;
  118. int i = 0, ret = 0;
  119. if (size < driver_hash[caam_algo].digestsize) {
  120. free(ctx);
  121. return -EINVAL;
  122. }
  123. for (i = 0; i < ctx->sg_num; i++)
  124. len += (sec_in32(&ctx->sg_tbl[i].len_flag) &
  125. SG_ENTRY_LENGTH_MASK);
  126. inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len,
  127. ctx->hash,
  128. driver_hash[caam_algo].alg_type,
  129. driver_hash[caam_algo].digestsize,
  130. 1);
  131. ret = run_descriptor_jr(ctx->sha_desc);
  132. if (ret)
  133. debug("Error %x\n", ret);
  134. else
  135. memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
  136. free(ctx);
  137. return ret;
  138. }
  139. int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
  140. unsigned char *pout, enum caam_hash_algos algo)
  141. {
  142. int ret = 0;
  143. uint32_t *desc;
  144. desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE);
  145. if (!desc) {
  146. debug("Not enough memory for descriptor allocation\n");
  147. return -ENOMEM;
  148. }
  149. inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout,
  150. driver_hash[algo].alg_type,
  151. driver_hash[algo].digestsize,
  152. 0);
  153. ret = run_descriptor_jr(desc);
  154. free(desc);
  155. return ret;
  156. }
  157. void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
  158. unsigned char *pout, unsigned int chunk_size)
  159. {
  160. if (caam_hash(pbuf, buf_len, pout, SHA256))
  161. printf("CAAM was not setup properly or it is faulty\n");
  162. }
  163. void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
  164. unsigned char *pout, unsigned int chunk_size)
  165. {
  166. if (caam_hash(pbuf, buf_len, pout, SHA1))
  167. printf("CAAM was not setup properly or it is faulty\n");
  168. }
  169. int hw_sha_init(struct hash_algo *algo, void **ctxp)
  170. {
  171. return caam_hash_init(ctxp, get_hash_type(algo));
  172. }
  173. int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
  174. unsigned int size, int is_last)
  175. {
  176. return caam_hash_update(ctx, buf, size, is_last, get_hash_type(algo));
  177. }
  178. int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
  179. int size)
  180. {
  181. return caam_hash_finish(ctx, dest_buf, size, get_hash_type(algo));
  182. }