fsp_common.c 2.0 KB

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  1. /*
  2. * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <asm/mrccache.h>
  10. #include <asm/post.h>
  11. #include <asm/processor.h>
  12. #include <asm/fsp/fsp_support.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. int print_cpuinfo(void)
  15. {
  16. post_code(POST_CPU_INFO);
  17. return default_print_cpuinfo();
  18. }
  19. int fsp_init_phase_pci(void)
  20. {
  21. u32 status;
  22. /* call into FspNotify */
  23. debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
  24. status = fsp_notify(NULL, INIT_PHASE_PCI);
  25. if (status)
  26. debug("fail, error code %x\n", status);
  27. else
  28. debug("OK\n");
  29. return status ? -EPERM : 0;
  30. }
  31. void board_final_cleanup(void)
  32. {
  33. u32 status;
  34. /* call into FspNotify */
  35. debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
  36. status = fsp_notify(NULL, INIT_PHASE_BOOT);
  37. if (status)
  38. debug("fail, error code %x\n", status);
  39. else
  40. debug("OK\n");
  41. return;
  42. }
  43. static __maybe_unused void *fsp_prepare_mrc_cache(void)
  44. {
  45. struct mrc_data_container *cache;
  46. struct mrc_region entry;
  47. int ret;
  48. ret = mrccache_get_region(NULL, &entry);
  49. if (ret)
  50. return NULL;
  51. cache = mrccache_find_current(&entry);
  52. if (!cache)
  53. return NULL;
  54. debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
  55. cache->data, cache->data_size, cache->checksum);
  56. return cache->data;
  57. }
  58. int x86_fsp_init(void)
  59. {
  60. void *nvs;
  61. if (!gd->arch.hob_list) {
  62. #ifdef CONFIG_ENABLE_MRC_CACHE
  63. nvs = fsp_prepare_mrc_cache();
  64. #else
  65. nvs = NULL;
  66. #endif
  67. /*
  68. * The first time we enter here, call fsp_init().
  69. * Note the execution does not return to this function,
  70. * instead it jumps to fsp_continue().
  71. */
  72. fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
  73. } else {
  74. /*
  75. * The second time we enter here, adjust the size of malloc()
  76. * pool before relocation. Given gd->malloc_base was adjusted
  77. * after the call to board_init_f_mem() in arch/x86/cpu/start.S,
  78. * we should fix up gd->malloc_limit here.
  79. */
  80. gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
  81. }
  82. return 0;
  83. }