board.c 5.1 KB

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  1. /*
  2. * (C) Copyright 2010,2011
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <ns16550.h>
  9. #include <linux/compiler.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/clock.h>
  12. #ifdef CONFIG_LCD
  13. #include <asm/arch/display.h>
  14. #endif
  15. #include <asm/arch/funcmux.h>
  16. #include <asm/arch/pinmux.h>
  17. #include <asm/arch/pmu.h>
  18. #ifdef CONFIG_PWM_TEGRA
  19. #include <asm/arch/pwm.h>
  20. #endif
  21. #include <asm/arch/tegra.h>
  22. #include <asm/arch-tegra/board.h>
  23. #include <asm/arch-tegra/clk_rst.h>
  24. #include <asm/arch-tegra/pmc.h>
  25. #include <asm/arch-tegra/sys_proto.h>
  26. #include <asm/arch-tegra/uart.h>
  27. #include <asm/arch-tegra/warmboot.h>
  28. #ifdef CONFIG_TEGRA_CLOCK_SCALING
  29. #include <asm/arch/emc.h>
  30. #endif
  31. #ifdef CONFIG_USB_EHCI_TEGRA
  32. #include <asm/arch-tegra/usb.h>
  33. #include <usb.h>
  34. #endif
  35. #ifdef CONFIG_TEGRA_MMC
  36. #include <asm/arch-tegra/tegra_mmc.h>
  37. #include <asm/arch-tegra/mmc.h>
  38. #endif
  39. #include <i2c.h>
  40. #include <spi.h>
  41. #include "emc.h"
  42. DECLARE_GLOBAL_DATA_PTR;
  43. const struct tegra_sysinfo sysinfo = {
  44. CONFIG_TEGRA_BOARD_STRING
  45. };
  46. void __pinmux_init(void)
  47. {
  48. }
  49. void pinmux_init(void) __attribute__((weak, alias("__pinmux_init")));
  50. void __pin_mux_usb(void)
  51. {
  52. }
  53. void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
  54. void __pin_mux_spi(void)
  55. {
  56. }
  57. void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
  58. void __gpio_early_init_uart(void)
  59. {
  60. }
  61. void gpio_early_init_uart(void)
  62. __attribute__((weak, alias("__gpio_early_init_uart")));
  63. #if defined(CONFIG_TEGRA_NAND)
  64. void __pin_mux_nand(void)
  65. {
  66. funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
  67. }
  68. void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
  69. #endif
  70. void __pin_mux_display(void)
  71. {
  72. }
  73. void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
  74. /*
  75. * Routine: power_det_init
  76. * Description: turn off power detects
  77. */
  78. static void power_det_init(void)
  79. {
  80. #if defined(CONFIG_TEGRA20)
  81. struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
  82. /* turn off power detects */
  83. writel(0, &pmc->pmc_pwr_det_latch);
  84. writel(0, &pmc->pmc_pwr_det);
  85. #endif
  86. }
  87. /*
  88. * Routine: board_init
  89. * Description: Early hardware init.
  90. */
  91. int board_init(void)
  92. {
  93. __maybe_unused int err;
  94. /* Do clocks and UART first so that printf() works */
  95. clock_init();
  96. clock_verify();
  97. #ifdef CONFIG_FDT_SPI
  98. pin_mux_spi();
  99. spi_init();
  100. #endif
  101. #ifdef CONFIG_PWM_TEGRA
  102. if (pwm_init(gd->fdt_blob))
  103. debug("%s: Failed to init pwm\n", __func__);
  104. #endif
  105. #ifdef CONFIG_LCD
  106. pin_mux_display();
  107. tegra_lcd_check_next_stage(gd->fdt_blob, 0);
  108. #endif
  109. /* boot param addr */
  110. gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
  111. power_det_init();
  112. #ifdef CONFIG_SYS_I2C_TEGRA
  113. #ifndef CONFIG_SYS_I2C_INIT_BOARD
  114. #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
  115. #endif
  116. i2c_init_board();
  117. # ifdef CONFIG_TEGRA_PMU
  118. if (pmu_set_nominal())
  119. debug("Failed to select nominal voltages\n");
  120. # ifdef CONFIG_TEGRA_CLOCK_SCALING
  121. err = board_emc_init();
  122. if (err)
  123. debug("Memory controller init failed: %d\n", err);
  124. # endif
  125. # endif /* CONFIG_TEGRA_PMU */
  126. #endif /* CONFIG_SYS_I2C_TEGRA */
  127. #ifdef CONFIG_USB_EHCI_TEGRA
  128. pin_mux_usb();
  129. usb_process_devicetree(gd->fdt_blob);
  130. #endif
  131. #ifdef CONFIG_LCD
  132. tegra_lcd_check_next_stage(gd->fdt_blob, 0);
  133. #endif
  134. #ifdef CONFIG_TEGRA_NAND
  135. pin_mux_nand();
  136. #endif
  137. #ifdef CONFIG_TEGRA_LP0
  138. /* save Sdram params to PMC 2, 4, and 24 for WB0 */
  139. warmboot_save_sdram_params();
  140. /* prepare the WB code to LP0 location */
  141. warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
  142. #endif
  143. return 0;
  144. }
  145. #ifdef CONFIG_BOARD_EARLY_INIT_F
  146. static void __gpio_early_init(void)
  147. {
  148. }
  149. void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
  150. int board_early_init_f(void)
  151. {
  152. pinmux_init();
  153. board_init_uart_f();
  154. /* Initialize periph GPIOs */
  155. gpio_early_init();
  156. gpio_early_init_uart();
  157. #ifdef CONFIG_LCD
  158. tegra_lcd_early_init(gd->fdt_blob);
  159. #endif
  160. return 0;
  161. }
  162. #endif /* EARLY_INIT */
  163. int board_late_init(void)
  164. {
  165. #ifdef CONFIG_LCD
  166. /* Make sure we finish initing the LCD */
  167. tegra_lcd_check_next_stage(gd->fdt_blob, 1);
  168. #endif
  169. return 0;
  170. }
  171. #if defined(CONFIG_TEGRA_MMC)
  172. void __pin_mux_mmc(void)
  173. {
  174. }
  175. void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
  176. /* this is a weak define that we are overriding */
  177. int board_mmc_init(bd_t *bd)
  178. {
  179. debug("%s called\n", __func__);
  180. /* Enable muxes, etc. for SDMMC controllers */
  181. pin_mux_mmc();
  182. debug("%s: init MMC\n", __func__);
  183. tegra_mmc_init();
  184. return 0;
  185. }
  186. void pad_init_mmc(struct mmc_host *host)
  187. {
  188. #if defined(CONFIG_TEGRA30)
  189. enum periph_id id = host->mmc_id;
  190. u32 val;
  191. debug("%s: sdmmc address = %08x, id = %d\n", __func__,
  192. (unsigned int)host->reg, id);
  193. /* Set the pad drive strength for SDMMC1 or 3 only */
  194. if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
  195. debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
  196. __func__);
  197. return;
  198. }
  199. val = readl(&host->reg->sdmemcmppadctl);
  200. val &= 0xFFFFFFF0;
  201. val |= MEMCOMP_PADCTRL_VREF;
  202. writel(val, &host->reg->sdmemcmppadctl);
  203. val = readl(&host->reg->autocalcfg);
  204. val &= 0xFFFF0000;
  205. val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
  206. writel(val, &host->reg->autocalcfg);
  207. #endif /* T30 */
  208. }
  209. #endif /* MMC */