serial.c 11 KB

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  1. /*
  2. * (C) Copyright 2000 - 2010
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Based ont the MPC5200 PSC driver.
  24. * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
  25. */
  26. /*
  27. * Minimal serial functions needed to use one of the PSC ports
  28. * as serial console interface.
  29. */
  30. #include <common.h>
  31. #include <asm/io.h>
  32. #include <asm/processor.h>
  33. #include <serial.h>
  34. DECLARE_GLOBAL_DATA_PTR;
  35. #if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI)
  36. static void fifo_init (volatile psc512x_t *psc)
  37. {
  38. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  39. u32 tfsize, rfsize;
  40. /* reset Rx & Tx fifo slice */
  41. out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
  42. out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE);
  43. /* disable Tx & Rx FIFO interrupts */
  44. out_be32(&psc->rfintmask, 0);
  45. out_be32(&psc->tfintmask, 0);
  46. #if defined(CONFIG_SERIAL_MULTI)
  47. switch (((u32)psc & 0xf00) >> 8) {
  48. case 0:
  49. tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
  50. rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
  51. break;
  52. case 1:
  53. tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
  54. rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
  55. break;
  56. case 2:
  57. tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
  58. rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
  59. break;
  60. case 3:
  61. tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
  62. rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
  63. break;
  64. case 4:
  65. tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
  66. rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
  67. break;
  68. case 5:
  69. tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
  70. rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
  71. break;
  72. case 6:
  73. tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
  74. rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
  75. break;
  76. case 7:
  77. tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
  78. rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
  79. break;
  80. case 8:
  81. tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
  82. rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
  83. break;
  84. case 9:
  85. tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
  86. rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
  87. break;
  88. case 10:
  89. tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
  90. rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
  91. break;
  92. case 11:
  93. tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
  94. rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
  95. break;
  96. default:
  97. return;
  98. }
  99. #else
  100. tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
  101. rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
  102. #endif
  103. out_be32(&psc->tfsize, tfsize);
  104. out_be32(&psc->rfsize, rfsize);
  105. /* enable Tx & Rx FIFO slice */
  106. out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
  107. out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE);
  108. out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE);
  109. __asm__ volatile ("sync");
  110. }
  111. void serial_setbrg_dev(unsigned int idx)
  112. {
  113. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  114. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  115. unsigned long baseclk, div;
  116. unsigned long baudrate;
  117. char buf[16];
  118. char *br_env;
  119. baudrate = gd->baudrate;
  120. if (idx != CONFIG_PSC_CONSOLE) {
  121. /* Allows setting baudrate for other serial devices
  122. * on PSCx using environment. If not specified, use
  123. * the same baudrate as for console.
  124. */
  125. sprintf(buf, "psc%d_baudrate", idx);
  126. br_env = getenv(buf);
  127. if (br_env)
  128. baudrate = simple_strtoul(br_env, NULL, 10);
  129. debug("%s: idx %d, baudrate %d\n", __func__, idx, baudrate);
  130. }
  131. /* calculate divisor for setting PSC CTUR and CTLR registers */
  132. baseclk = (gd->ips_clk + 8) / 16;
  133. div = (baseclk + (baudrate / 2)) / baudrate;
  134. out_8(&psc->ctur, (div >> 8) & 0xff);
  135. out_8(&psc->ctlr, div & 0xff); /* set baudrate */
  136. }
  137. int serial_init_dev(unsigned int idx)
  138. {
  139. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  140. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  141. #if defined(CONFIG_SERIAL_MULTI)
  142. u32 reg;
  143. reg = in_be32(&im->clk.sccr[0]);
  144. out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
  145. #endif
  146. fifo_init (psc);
  147. /* set MR register to point to MR1 */
  148. out_8(&psc->command, PSC_SEL_MODE_REG_1);
  149. /* disable Tx/Rx */
  150. out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
  151. /* choose the prescaler by 16 for the Tx/Rx clock generation */
  152. out_be16(&psc->psc_clock_select, 0xdd00);
  153. /* switch to UART mode */
  154. out_be32(&psc->sicr, 0);
  155. /* mode register points to mr1 */
  156. /* configure parity, bit length and so on in mode register 1*/
  157. out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
  158. /* now, mode register points to mr2 */
  159. out_8(&psc->mode, PSC_MODE_1_STOPBIT);
  160. /* set baudrate */
  161. serial_setbrg_dev(idx);
  162. /* disable all interrupts */
  163. out_be16(&psc->psc_imr, 0);
  164. /* reset and enable Rx/Tx */
  165. out_8(&psc->command, PSC_RST_RX);
  166. out_8(&psc->command, PSC_RST_TX);
  167. out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
  168. return 0;
  169. }
  170. int serial_uninit_dev(unsigned int idx)
  171. {
  172. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  173. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  174. u32 reg;
  175. out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
  176. reg = in_be32(&im->clk.sccr[0]);
  177. reg &= ~CLOCK_SCCR1_PSC_EN(idx);
  178. out_be32(&im->clk.sccr[0], reg);
  179. return 0;
  180. }
  181. void serial_putc_dev(unsigned int idx, const char c)
  182. {
  183. volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  184. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  185. if (c == '\n')
  186. serial_putc_dev(idx, '\r');
  187. /* Wait for last character to go. */
  188. while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
  189. ;
  190. out_8(&psc->tfdata_8, c);
  191. }
  192. void serial_putc_raw_dev(unsigned int idx, const char c)
  193. {
  194. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  195. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  196. /* Wait for last character to go. */
  197. while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
  198. ;
  199. out_8(&psc->tfdata_8, c);
  200. }
  201. void serial_puts_dev(unsigned int idx, const char *s)
  202. {
  203. while (*s)
  204. serial_putc_dev(idx, *s++);
  205. }
  206. int serial_getc_dev(unsigned int idx)
  207. {
  208. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  209. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  210. /* Wait for a character to arrive. */
  211. while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
  212. ;
  213. return in_8(&psc->rfdata_8);
  214. }
  215. int serial_tstc_dev(unsigned int idx)
  216. {
  217. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  218. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  219. return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
  220. }
  221. void serial_setrts_dev(unsigned int idx, int s)
  222. {
  223. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  224. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  225. if (s) {
  226. /* Assert RTS (become LOW) */
  227. out_8(&psc->op1, 0x1);
  228. }
  229. else {
  230. /* Negate RTS (become HIGH) */
  231. out_8(&psc->op0, 0x1);
  232. }
  233. }
  234. int serial_getcts_dev(unsigned int idx)
  235. {
  236. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  237. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  238. return (in_8(&psc->ip) & 0x1) ? 0 : 1;
  239. }
  240. #endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */
  241. #if defined(CONFIG_SERIAL_MULTI)
  242. #define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
  243. int serial##port##_init(void) \
  244. { \
  245. return serial_init_dev(port); \
  246. } \
  247. int serial##port##_uninit(void) \
  248. { \
  249. return serial_uninit_dev(port); \
  250. } \
  251. void serial##port##_setbrg(void) \
  252. { \
  253. serial_setbrg_dev(port); \
  254. } \
  255. int serial##port##_getc(void) \
  256. { \
  257. return serial_getc_dev(port); \
  258. } \
  259. int serial##port##_tstc(void) \
  260. { \
  261. return serial_tstc_dev(port); \
  262. } \
  263. void serial##port##_putc(const char c) \
  264. { \
  265. serial_putc_dev(port, c); \
  266. } \
  267. void serial##port##_puts(const char *s) \
  268. { \
  269. serial_puts_dev(port, s); \
  270. }
  271. #define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \
  272. name, \
  273. bus, \
  274. serial##port##_init, \
  275. serial##port##_uninit, \
  276. serial##port##_setbrg, \
  277. serial##port##_getc, \
  278. serial##port##_tstc, \
  279. serial##port##_putc, \
  280. serial##port##_puts, \
  281. }
  282. #if defined(CONFIG_SYS_PSC1)
  283. DECLARE_PSC_SERIAL_FUNCTIONS(1);
  284. struct serial_device serial1_device =
  285. INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1");
  286. #endif
  287. #if defined(CONFIG_SYS_PSC3)
  288. DECLARE_PSC_SERIAL_FUNCTIONS(3);
  289. struct serial_device serial3_device =
  290. INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3");
  291. #endif
  292. #if defined(CONFIG_SYS_PSC4)
  293. DECLARE_PSC_SERIAL_FUNCTIONS(4);
  294. struct serial_device serial4_device =
  295. INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4");
  296. #endif
  297. #if defined(CONFIG_SYS_PSC6)
  298. DECLARE_PSC_SERIAL_FUNCTIONS(6);
  299. struct serial_device serial6_device =
  300. INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6");
  301. #endif
  302. #else
  303. void serial_setbrg(void)
  304. {
  305. serial_setbrg_dev(CONFIG_PSC_CONSOLE);
  306. }
  307. int serial_init(void)
  308. {
  309. return serial_init_dev(CONFIG_PSC_CONSOLE);
  310. }
  311. void serial_putc(const char c)
  312. {
  313. serial_putc_dev(CONFIG_PSC_CONSOLE, c);
  314. }
  315. void serial_putc_raw(const char c)
  316. {
  317. serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c);
  318. }
  319. void serial_puts(const char *s)
  320. {
  321. serial_puts_dev(CONFIG_PSC_CONSOLE, s);
  322. }
  323. int serial_getc(void)
  324. {
  325. return serial_getc_dev(CONFIG_PSC_CONSOLE);
  326. }
  327. int serial_tstc(void)
  328. {
  329. return serial_tstc_dev(CONFIG_PSC_CONSOLE);
  330. }
  331. void serial_setrts(int s)
  332. {
  333. return serial_setrts_dev(CONFIG_PSC_CONSOLE, s);
  334. }
  335. int serial_getcts(void)
  336. {
  337. return serial_getcts_dev(CONFIG_PSC_CONSOLE);
  338. }
  339. #endif /* CONFIG_PSC_CONSOLE */
  340. #if defined(CONFIG_SERIAL_MULTI)
  341. #include <stdio_dev.h>
  342. /*
  343. * Routines for communication with serial devices over PSC
  344. */
  345. /* Bitfield for initialized PSCs */
  346. static unsigned int initialized;
  347. struct stdio_dev *open_port(int num, int baudrate)
  348. {
  349. struct stdio_dev *port;
  350. char env_var[16];
  351. char env_val[10];
  352. char name[7];
  353. if (num < 0 || num > 11)
  354. return NULL;
  355. sprintf(name, "psc%d", num);
  356. port = stdio_get_by_name(name);
  357. if (!port)
  358. return NULL;
  359. if (!test_bit(num, &initialized)) {
  360. sprintf(env_var, "psc%d_baudrate", num);
  361. sprintf(env_val, "%d", baudrate);
  362. setenv(env_var, env_val);
  363. if (port->start())
  364. return NULL;
  365. set_bit(num, &initialized);
  366. }
  367. return port;
  368. }
  369. int close_port(int num)
  370. {
  371. struct stdio_dev *port;
  372. int ret;
  373. char name[7];
  374. if (num < 0 || num > 11)
  375. return -1;
  376. sprintf(name, "psc%d", num);
  377. port = stdio_get_by_name(name);
  378. if (!port)
  379. return -1;
  380. ret = port->stop();
  381. clear_bit(num, &initialized);
  382. return ret;
  383. }
  384. int write_port(struct stdio_dev *port, char *buf)
  385. {
  386. if (!port || !buf)
  387. return -1;
  388. port->puts(buf);
  389. return 0;
  390. }
  391. int read_port(struct stdio_dev *port, char *buf, int size)
  392. {
  393. int cnt = 0;
  394. if (!port || !buf)
  395. return -1;
  396. if (!size)
  397. return 0;
  398. while (port->tstc()) {
  399. buf[cnt++] = port->getc();
  400. if (cnt > size)
  401. break;
  402. }
  403. return cnt;
  404. }
  405. #endif /* CONFIG_SERIAL_MULTI */