lowlevel_init.S 2.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788
  1. /*
  2. * Board specific setup info
  3. *
  4. * (C) Copyright 2010
  5. * Texas Instruments, <www.ti.com>
  6. *
  7. * Author :
  8. * Aneesh V <aneesh@ti.com>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <asm/arch/omap.h>
  29. #include <linux/linkage.h>
  30. ENTRY(save_boot_params)
  31. /*
  32. * See if the rom code passed pointer is valid:
  33. * It is not valid if it is not in non-secure SRAM
  34. * This may happen if you are booting with the help of
  35. * debugger
  36. */
  37. ldr r2, =NON_SECURE_SRAM_START
  38. cmp r2, r0
  39. bgt 1f
  40. ldr r2, =NON_SECURE_SRAM_END
  41. cmp r2, r0
  42. blt 1f
  43. /*
  44. * store the boot params passed from rom code or saved
  45. * and passed by SPL
  46. */
  47. cmp r0, #0
  48. beq 1f
  49. ldr r1, =boot_params
  50. str r0, [r1]
  51. #ifdef CONFIG_SPL_BUILD
  52. /* Store the boot device in spl_boot_device */
  53. ldrb r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device
  54. and r2, #BOOT_DEVICE_MASK
  55. ldr r3, =boot_params
  56. strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device <- r1
  57. /* boot mode is passed only for devices that can raw/fat mode */
  58. cmp r2, #2
  59. blt 2f
  60. cmp r2, #7
  61. bgt 2f
  62. /* Store the boot mode (raw/FAT) in omap_bootmode */
  63. ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr
  64. ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr
  65. ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode
  66. ldr r3, =omap_bootmode
  67. str r2, [r3]
  68. #endif
  69. 2:
  70. ldrb r2, [r0, #CH_FLAGS_OFFSET]
  71. ldr r3, =boot_params
  72. strb r2, [r3, #CH_FLAGS_OFFSET]
  73. 1:
  74. bx lr
  75. ENDPROC(save_boot_params)
  76. ENTRY(set_pl310_ctrl_reg)
  77. PUSH {r4-r11, lr} @ save registers - ROM code may pollute
  78. @ our registers
  79. LDR r12, =0x102 @ Set PL310 control register - value in R0
  80. .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
  81. @ call ROM Code API to set control register
  82. POP {r4-r11, pc}
  83. ENDPROC(set_pl310_ctrl_reg)