cfi_flash.c 34 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. * Modified to work with AMD flashes
  8. *
  9. * Copyright (C) 2004
  10. * Ed Okerson
  11. * Modified to work with little-endian systems.
  12. *
  13. * See file CREDITS for list of people who contributed to this
  14. * project.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation; either version 2 of
  19. * the License, or (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29. * MA 02111-1307 USA
  30. *
  31. * History
  32. * 01/20/2004 - combined variants of original driver.
  33. * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34. * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35. * 01/27/2004 - Little endian support Ed Okerson
  36. *
  37. * Tested Architectures
  38. * Port Width Chip Width # of banks Flash Chip Board
  39. * 32 16 1 28F128J3 seranoa/eagle
  40. * 64 16 1 28F128J3 seranoa/falcon
  41. *
  42. */
  43. /* The DEBUG define must be before common to enable debugging */
  44. /* #define DEBUG */
  45. #include <common.h>
  46. #include <asm/processor.h>
  47. #include <asm/byteorder.h>
  48. #include <environment.h>
  49. #ifdef CFG_FLASH_CFI_DRIVER
  50. /*
  51. * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  52. * The width of the port and the width of the chips are determined at initialization.
  53. * These widths are used to calculate the address for access CFI data structures.
  54. * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  55. *
  56. * References
  57. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  58. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  59. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  60. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  61. *
  62. * TODO
  63. *
  64. * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  65. * Table (ALT) to determine if protection is available
  66. *
  67. * Add support for other command sets Use the PRI and ALT to determine command set
  68. * Verify erase and program timeouts.
  69. */
  70. #ifndef CFG_FLASH_BANKS_LIST
  71. #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  72. #endif
  73. #define FLASH_CMD_CFI 0x98
  74. #define FLASH_CMD_READ_ID 0x90
  75. #define FLASH_CMD_RESET 0xff
  76. #define FLASH_CMD_BLOCK_ERASE 0x20
  77. #define FLASH_CMD_ERASE_CONFIRM 0xD0
  78. #define FLASH_CMD_WRITE 0x40
  79. #define FLASH_CMD_PROTECT 0x60
  80. #define FLASH_CMD_PROTECT_SET 0x01
  81. #define FLASH_CMD_PROTECT_CLEAR 0xD0
  82. #define FLASH_CMD_CLEAR_STATUS 0x50
  83. #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
  84. #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
  85. #define FLASH_STATUS_DONE 0x80
  86. #define FLASH_STATUS_ESS 0x40
  87. #define FLASH_STATUS_ECLBS 0x20
  88. #define FLASH_STATUS_PSLBS 0x10
  89. #define FLASH_STATUS_VPENS 0x08
  90. #define FLASH_STATUS_PSS 0x04
  91. #define FLASH_STATUS_DPS 0x02
  92. #define FLASH_STATUS_R 0x01
  93. #define FLASH_STATUS_PROTECT 0x01
  94. #define AMD_CMD_RESET 0xF0
  95. #define AMD_CMD_WRITE 0xA0
  96. #define AMD_CMD_ERASE_START 0x80
  97. #define AMD_CMD_ERASE_SECTOR 0x30
  98. #define AMD_CMD_UNLOCK_START 0xAA
  99. #define AMD_CMD_UNLOCK_ACK 0x55
  100. #define AMD_STATUS_TOGGLE 0x40
  101. #define AMD_STATUS_ERROR 0x20
  102. #define AMD_ADDR_ERASE_START 0x555
  103. #define AMD_ADDR_START 0x555
  104. #define AMD_ADDR_ACK 0x2AA
  105. #define FLASH_OFFSET_CFI 0x55
  106. #define FLASH_OFFSET_CFI_RESP 0x10
  107. #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
  108. #define FLASH_OFFSET_WTOUT 0x1F
  109. #define FLASH_OFFSET_WBTOUT 0x20
  110. #define FLASH_OFFSET_ETOUT 0x21
  111. #define FLASH_OFFSET_CETOUT 0x22
  112. #define FLASH_OFFSET_WMAX_TOUT 0x23
  113. #define FLASH_OFFSET_WBMAX_TOUT 0x24
  114. #define FLASH_OFFSET_EMAX_TOUT 0x25
  115. #define FLASH_OFFSET_CEMAX_TOUT 0x26
  116. #define FLASH_OFFSET_SIZE 0x27
  117. #define FLASH_OFFSET_INTERFACE 0x28
  118. #define FLASH_OFFSET_BUFFER_SIZE 0x2A
  119. #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
  120. #define FLASH_OFFSET_ERASE_REGIONS 0x2D
  121. #define FLASH_OFFSET_PROTECT 0x02
  122. #define FLASH_OFFSET_USER_PROTECTION 0x85
  123. #define FLASH_OFFSET_INTEL_PROTECTION 0x81
  124. #define FLASH_MAN_CFI 0x01000000
  125. #define CFI_CMDSET_NONE 0
  126. #define CFI_CMDSET_INTEL_EXTENDED 1
  127. #define CFI_CMDSET_AMD_STANDARD 2
  128. #define CFI_CMDSET_INTEL_STANDARD 3
  129. #define CFI_CMDSET_AMD_EXTENDED 4
  130. #define CFI_CMDSET_MITSU_STANDARD 256
  131. #define CFI_CMDSET_MITSU_EXTENDED 257
  132. #define CFI_CMDSET_SST 258
  133. #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
  134. # undef FLASH_CMD_RESET
  135. # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
  136. #endif
  137. typedef union {
  138. unsigned char c;
  139. unsigned short w;
  140. unsigned long l;
  141. unsigned long long ll;
  142. } cfiword_t;
  143. typedef union {
  144. volatile unsigned char *cp;
  145. volatile unsigned short *wp;
  146. volatile unsigned long *lp;
  147. volatile unsigned long long *llp;
  148. } cfiptr_t;
  149. #define NUM_ERASE_REGIONS 4
  150. /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
  151. #ifdef CFG_MAX_FLASH_BANKS_DETECT
  152. static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
  153. flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
  154. #else
  155. static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
  156. flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
  157. #endif
  158. /*-----------------------------------------------------------------------
  159. * Functions
  160. */
  161. typedef unsigned long flash_sect_t;
  162. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
  163. static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
  164. static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
  165. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
  166. static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
  167. static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
  168. static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
  169. static int flash_detect_cfi (flash_info_t * info);
  170. ulong flash_get_size (ulong base, int banknum);
  171. static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
  172. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  173. ulong tout, char *prompt);
  174. #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  175. static flash_info_t *flash_get_info(ulong base);
  176. #endif
  177. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  178. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
  179. #endif
  180. /*-----------------------------------------------------------------------
  181. * create an address based on the offset and the port width
  182. */
  183. inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
  184. {
  185. return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
  186. }
  187. #ifdef DEBUG
  188. /*-----------------------------------------------------------------------
  189. * Debug support
  190. */
  191. void print_longlong (char *str, unsigned long long data)
  192. {
  193. int i;
  194. char *cp;
  195. cp = (unsigned char *) &data;
  196. for (i = 0; i < 8; i++)
  197. sprintf (&str[i * 2], "%2.2x", *cp++);
  198. }
  199. static void flash_printqry (flash_info_t * info, flash_sect_t sect)
  200. {
  201. cfiptr_t cptr;
  202. int x, y;
  203. for (x = 0; x < 0x40; x += 16U / info->portwidth) {
  204. cptr.cp =
  205. flash_make_addr (info, sect,
  206. x + FLASH_OFFSET_CFI_RESP);
  207. debug ("%p : ", cptr.cp);
  208. for (y = 0; y < 16; y++) {
  209. debug ("%2.2x ", cptr.cp[y]);
  210. }
  211. debug (" ");
  212. for (y = 0; y < 16; y++) {
  213. if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
  214. debug ("%c", cptr.cp[y]);
  215. } else {
  216. debug (".");
  217. }
  218. }
  219. debug ("\n");
  220. }
  221. }
  222. #endif
  223. /*-----------------------------------------------------------------------
  224. * read a character at a port width address
  225. */
  226. inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  227. {
  228. uchar *cp;
  229. cp = flash_make_addr (info, 0, offset);
  230. #if defined(__LITTLE_ENDIAN)
  231. return (cp[0]);
  232. #else
  233. return (cp[info->portwidth - 1]);
  234. #endif
  235. }
  236. /*-----------------------------------------------------------------------
  237. * read a short word by swapping for ppc format.
  238. */
  239. ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
  240. {
  241. uchar *addr;
  242. ushort retval;
  243. #ifdef DEBUG
  244. int x;
  245. #endif
  246. addr = flash_make_addr (info, sect, offset);
  247. #ifdef DEBUG
  248. debug ("ushort addr is at %p info->portwidth = %d\n", addr,
  249. info->portwidth);
  250. for (x = 0; x < 2 * info->portwidth; x++) {
  251. debug ("addr[%x] = 0x%x\n", x, addr[x]);
  252. }
  253. #endif
  254. #if defined(__LITTLE_ENDIAN)
  255. retval = ((addr[(info->portwidth)] << 8) | addr[0]);
  256. #else
  257. retval = ((addr[(2 * info->portwidth) - 1] << 8) |
  258. addr[info->portwidth - 1]);
  259. #endif
  260. debug ("retval = 0x%x\n", retval);
  261. return retval;
  262. }
  263. /*-----------------------------------------------------------------------
  264. * read a long word by picking the least significant byte of each maiximum
  265. * port size word. Swap for ppc format.
  266. */
  267. ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
  268. {
  269. uchar *addr;
  270. ulong retval;
  271. #ifdef DEBUG
  272. int x;
  273. #endif
  274. addr = flash_make_addr (info, sect, offset);
  275. #ifdef DEBUG
  276. debug ("long addr is at %p info->portwidth = %d\n", addr,
  277. info->portwidth);
  278. for (x = 0; x < 4 * info->portwidth; x++) {
  279. debug ("addr[%x] = 0x%x\n", x, addr[x]);
  280. }
  281. #endif
  282. #if defined(__LITTLE_ENDIAN)
  283. retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
  284. (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
  285. #else
  286. retval = (addr[(2 * info->portwidth) - 1] << 24) |
  287. (addr[(info->portwidth) - 1] << 16) |
  288. (addr[(4 * info->portwidth) - 1] << 8) |
  289. addr[(3 * info->portwidth) - 1];
  290. #endif
  291. return retval;
  292. }
  293. /*-----------------------------------------------------------------------
  294. */
  295. unsigned long flash_init (void)
  296. {
  297. unsigned long size = 0;
  298. int i;
  299. /* Init: no FLASHes known */
  300. for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
  301. flash_info[i].flash_id = FLASH_UNKNOWN;
  302. size += flash_info[i].size = flash_get_size (bank_base[i], i);
  303. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  304. printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
  305. i, flash_info[i].size, flash_info[i].size << 20);
  306. }
  307. }
  308. /* Monitor protection ON by default */
  309. #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  310. flash_protect (FLAG_PROTECT_SET,
  311. CFG_MONITOR_BASE,
  312. CFG_MONITOR_BASE + monitor_flash_len - 1,
  313. flash_get_info(CFG_MONITOR_BASE));
  314. #endif
  315. /* Environment protection ON by default */
  316. #ifdef CFG_ENV_IS_IN_FLASH
  317. flash_protect (FLAG_PROTECT_SET,
  318. CFG_ENV_ADDR,
  319. CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
  320. flash_get_info(CFG_ENV_ADDR));
  321. #endif
  322. /* Redundant environment protection ON by default */
  323. #ifdef CFG_ENV_ADDR_REDUND
  324. flash_protect (FLAG_PROTECT_SET,
  325. CFG_ENV_ADDR_REDUND,
  326. CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
  327. flash_get_info(CFG_ENV_ADDR_REDUND));
  328. #endif
  329. return (size);
  330. }
  331. /*-----------------------------------------------------------------------
  332. */
  333. #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
  334. static flash_info_t *flash_get_info(ulong base)
  335. {
  336. int i;
  337. flash_info_t * info = 0;
  338. for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
  339. info = & flash_info[i];
  340. if (info->size && info->start[0] <= base &&
  341. base <= info->start[0] + info->size - 1)
  342. break;
  343. }
  344. return i == CFG_MAX_FLASH_BANKS ? 0 : info;
  345. }
  346. #endif
  347. /*-----------------------------------------------------------------------
  348. */
  349. int flash_erase (flash_info_t * info, int s_first, int s_last)
  350. {
  351. int rcode = 0;
  352. int prot;
  353. flash_sect_t sect;
  354. if (info->flash_id != FLASH_MAN_CFI) {
  355. puts ("Can't erase unknown flash type - aborted\n");
  356. return 1;
  357. }
  358. if ((s_first < 0) || (s_first > s_last)) {
  359. puts ("- no sectors to erase\n");
  360. return 1;
  361. }
  362. prot = 0;
  363. for (sect = s_first; sect <= s_last; ++sect) {
  364. if (info->protect[sect]) {
  365. prot++;
  366. }
  367. }
  368. if (prot) {
  369. printf ("- Warning: %d protected sectors will not be erased!\n", prot);
  370. } else {
  371. putc ('\n');
  372. }
  373. for (sect = s_first; sect <= s_last; sect++) {
  374. if (info->protect[sect] == 0) { /* not protected */
  375. switch (info->vendor) {
  376. case CFI_CMDSET_INTEL_STANDARD:
  377. case CFI_CMDSET_INTEL_EXTENDED:
  378. flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
  379. flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
  380. flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
  381. break;
  382. case CFI_CMDSET_AMD_STANDARD:
  383. case CFI_CMDSET_AMD_EXTENDED:
  384. flash_unlock_seq (info, sect);
  385. flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
  386. AMD_CMD_ERASE_START);
  387. flash_unlock_seq (info, sect);
  388. flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
  389. break;
  390. default:
  391. debug ("Unkown flash vendor %d\n",
  392. info->vendor);
  393. break;
  394. }
  395. if (flash_full_status_check
  396. (info, sect, info->erase_blk_tout, "erase")) {
  397. rcode = 1;
  398. } else
  399. putc ('.');
  400. }
  401. }
  402. puts (" done\n");
  403. return rcode;
  404. }
  405. /*-----------------------------------------------------------------------
  406. */
  407. void flash_print_info (flash_info_t * info)
  408. {
  409. int i;
  410. if (info->flash_id != FLASH_MAN_CFI) {
  411. puts ("missing or unknown FLASH type\n");
  412. return;
  413. }
  414. printf ("CFI conformant FLASH (%d x %d)",
  415. (info->portwidth << 3), (info->chipwidth << 3));
  416. printf (" Size: %ld MB in %d Sectors\n",
  417. info->size >> 20, info->sector_count);
  418. printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
  419. info->erase_blk_tout,
  420. info->write_tout,
  421. info->buffer_write_tout,
  422. info->buffer_size);
  423. puts (" Sector Start Addresses:");
  424. for (i = 0; i < info->sector_count; ++i) {
  425. #ifdef CFG_FLASH_EMPTY_INFO
  426. int k;
  427. int size;
  428. int erased;
  429. volatile unsigned long *flash;
  430. /*
  431. * Check if whole sector is erased
  432. */
  433. if (i != (info->sector_count - 1))
  434. size = info->start[i + 1] - info->start[i];
  435. else
  436. size = info->start[0] + info->size - info->start[i];
  437. erased = 1;
  438. flash = (volatile unsigned long *) info->start[i];
  439. size = size >> 2; /* divide by 4 for longword access */
  440. for (k = 0; k < size; k++) {
  441. if (*flash++ != 0xffffffff) {
  442. erased = 0;
  443. break;
  444. }
  445. }
  446. if ((i % 5) == 0)
  447. printf ("\n");
  448. /* print empty and read-only info */
  449. printf (" %08lX%s%s",
  450. info->start[i],
  451. erased ? " E" : " ",
  452. info->protect[i] ? "RO " : " ");
  453. #else /* ! CFG_FLASH_EMPTY_INFO */
  454. if ((i % 5) == 0)
  455. printf ("\n ");
  456. printf (" %08lX%s",
  457. info->start[i], info->protect[i] ? " (RO)" : " ");
  458. #endif
  459. }
  460. putc ('\n');
  461. return;
  462. }
  463. /*-----------------------------------------------------------------------
  464. * Copy memory to flash, returns:
  465. * 0 - OK
  466. * 1 - write timeout
  467. * 2 - Flash not erased
  468. */
  469. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  470. {
  471. ulong wp;
  472. ulong cp;
  473. int aln;
  474. cfiword_t cword;
  475. int i, rc;
  476. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  477. int buffered_size;
  478. #endif
  479. /* get lower aligned address */
  480. /* get lower aligned address */
  481. wp = (addr & ~(info->portwidth - 1));
  482. /* handle unaligned start */
  483. if ((aln = addr - wp) != 0) {
  484. cword.l = 0;
  485. cp = wp;
  486. for (i = 0; i < aln; ++i, ++cp)
  487. flash_add_byte (info, &cword, (*(uchar *) cp));
  488. for (; (i < info->portwidth) && (cnt > 0); i++) {
  489. flash_add_byte (info, &cword, *src++);
  490. cnt--;
  491. cp++;
  492. }
  493. for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
  494. flash_add_byte (info, &cword, (*(uchar *) cp));
  495. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  496. return rc;
  497. wp = cp;
  498. }
  499. /* handle the aligned part */
  500. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  501. buffered_size = (info->portwidth / info->chipwidth);
  502. buffered_size *= info->buffer_size;
  503. while (cnt >= info->portwidth) {
  504. i = buffered_size > cnt ? cnt : buffered_size;
  505. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  506. return rc;
  507. i -= i & (info->portwidth - 1);
  508. wp += i;
  509. src += i;
  510. cnt -= i;
  511. }
  512. #else
  513. while (cnt >= info->portwidth) {
  514. cword.l = 0;
  515. for (i = 0; i < info->portwidth; i++) {
  516. flash_add_byte (info, &cword, *src++);
  517. }
  518. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  519. return rc;
  520. wp += info->portwidth;
  521. cnt -= info->portwidth;
  522. }
  523. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  524. if (cnt == 0) {
  525. return (0);
  526. }
  527. /*
  528. * handle unaligned tail bytes
  529. */
  530. cword.l = 0;
  531. for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
  532. flash_add_byte (info, &cword, *src++);
  533. --cnt;
  534. }
  535. for (; i < info->portwidth; ++i, ++cp) {
  536. flash_add_byte (info, &cword, (*(uchar *) cp));
  537. }
  538. return flash_write_cfiword (info, wp, cword);
  539. }
  540. /*-----------------------------------------------------------------------
  541. */
  542. #ifdef CFG_FLASH_PROTECTION
  543. int flash_real_protect (flash_info_t * info, long sector, int prot)
  544. {
  545. int retcode = 0;
  546. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  547. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  548. if (prot)
  549. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  550. else
  551. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  552. if ((retcode =
  553. flash_full_status_check (info, sector, info->erase_blk_tout,
  554. prot ? "protect" : "unprotect")) == 0) {
  555. info->protect[sector] = prot;
  556. /* Intel's unprotect unprotects all locking */
  557. if (prot == 0) {
  558. flash_sect_t i;
  559. for (i = 0; i < info->sector_count; i++) {
  560. if (info->protect[i])
  561. flash_real_protect (info, i, 1);
  562. }
  563. }
  564. }
  565. return retcode;
  566. }
  567. /*-----------------------------------------------------------------------
  568. * flash_read_user_serial - read the OneTimeProgramming cells
  569. */
  570. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  571. int len)
  572. {
  573. uchar *src;
  574. uchar *dst;
  575. dst = buffer;
  576. src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
  577. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  578. memcpy (dst, src + offset, len);
  579. flash_write_cmd (info, 0, 0, info->cmd_reset);
  580. }
  581. /*
  582. * flash_read_factory_serial - read the device Id from the protection area
  583. */
  584. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  585. int len)
  586. {
  587. uchar *src;
  588. src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  589. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  590. memcpy (buffer, src + offset, len);
  591. flash_write_cmd (info, 0, 0, info->cmd_reset);
  592. }
  593. #endif /* CFG_FLASH_PROTECTION */
  594. /*
  595. * flash_is_busy - check to see if the flash is busy
  596. * This routine checks the status of the chip and returns true if the chip is busy
  597. */
  598. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  599. {
  600. int retval;
  601. switch (info->vendor) {
  602. case CFI_CMDSET_INTEL_STANDARD:
  603. case CFI_CMDSET_INTEL_EXTENDED:
  604. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  605. break;
  606. case CFI_CMDSET_AMD_STANDARD:
  607. case CFI_CMDSET_AMD_EXTENDED:
  608. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  609. break;
  610. default:
  611. retval = 0;
  612. }
  613. debug ("flash_is_busy: %d\n", retval);
  614. return retval;
  615. }
  616. /*-----------------------------------------------------------------------
  617. * wait for XSR.7 to be set. Time out with an error if it does not.
  618. * This routine does not set the flash to read-array mode.
  619. */
  620. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  621. ulong tout, char *prompt)
  622. {
  623. ulong start;
  624. /* Wait for command completion */
  625. start = get_timer (0);
  626. while (flash_is_busy (info, sector)) {
  627. if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
  628. printf ("Flash %s timeout at address %lx data %lx\n",
  629. prompt, info->start[sector],
  630. flash_read_long (info, sector, 0));
  631. flash_write_cmd (info, sector, 0, info->cmd_reset);
  632. return ERR_TIMOUT;
  633. }
  634. }
  635. return ERR_OK;
  636. }
  637. /*-----------------------------------------------------------------------
  638. * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
  639. * This routine sets the flash to read-array mode.
  640. */
  641. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  642. ulong tout, char *prompt)
  643. {
  644. int retcode;
  645. retcode = flash_status_check (info, sector, tout, prompt);
  646. switch (info->vendor) {
  647. case CFI_CMDSET_INTEL_EXTENDED:
  648. case CFI_CMDSET_INTEL_STANDARD:
  649. if ((retcode != ERR_OK)
  650. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  651. retcode = ERR_INVAL;
  652. printf ("Flash %s error at address %lx\n", prompt,
  653. info->start[sector]);
  654. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
  655. puts ("Command Sequence Error.\n");
  656. } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
  657. puts ("Block Erase Error.\n");
  658. retcode = ERR_NOT_ERASED;
  659. } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
  660. puts ("Locking Error\n");
  661. }
  662. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  663. puts ("Block locked.\n");
  664. retcode = ERR_PROTECTED;
  665. }
  666. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  667. puts ("Vpp Low Error.\n");
  668. }
  669. flash_write_cmd (info, sector, 0, info->cmd_reset);
  670. break;
  671. default:
  672. break;
  673. }
  674. return retcode;
  675. }
  676. /*-----------------------------------------------------------------------
  677. */
  678. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  679. {
  680. #if defined(__LITTLE_ENDIAN)
  681. unsigned short w;
  682. unsigned int l;
  683. unsigned long long ll;
  684. #endif
  685. switch (info->portwidth) {
  686. case FLASH_CFI_8BIT:
  687. cword->c = c;
  688. break;
  689. case FLASH_CFI_16BIT:
  690. #if defined(__LITTLE_ENDIAN)
  691. w = c;
  692. w <<= 8;
  693. cword->w = (cword->w >> 8) | w;
  694. #else
  695. cword->w = (cword->w << 8) | c;
  696. #endif
  697. break;
  698. case FLASH_CFI_32BIT:
  699. #if defined(__LITTLE_ENDIAN)
  700. l = c;
  701. l <<= 24;
  702. cword->l = (cword->l >> 8) | l;
  703. #else
  704. cword->l = (cword->l << 8) | c;
  705. #endif
  706. break;
  707. case FLASH_CFI_64BIT:
  708. #if defined(__LITTLE_ENDIAN)
  709. ll = c;
  710. ll <<= 56;
  711. cword->ll = (cword->ll >> 8) | ll;
  712. #else
  713. cword->ll = (cword->ll << 8) | c;
  714. #endif
  715. break;
  716. }
  717. }
  718. /*-----------------------------------------------------------------------
  719. * make a proper sized command based on the port and chip widths
  720. */
  721. static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
  722. {
  723. int i;
  724. uchar *cp = (uchar *) cmdbuf;
  725. #if defined(__LITTLE_ENDIAN)
  726. for (i = info->portwidth; i > 0; i--)
  727. #else
  728. for (i = 1; i <= info->portwidth; i++)
  729. #endif
  730. *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
  731. }
  732. /*
  733. * Write a proper sized command to the correct address
  734. */
  735. static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
  736. {
  737. volatile cfiptr_t addr;
  738. cfiword_t cword;
  739. addr.cp = flash_make_addr (info, sect, offset);
  740. flash_make_cmd (info, cmd, &cword);
  741. switch (info->portwidth) {
  742. case FLASH_CFI_8BIT:
  743. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
  744. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  745. *addr.cp = cword.c;
  746. break;
  747. case FLASH_CFI_16BIT:
  748. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
  749. cmd, cword.w,
  750. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  751. *addr.wp = cword.w;
  752. break;
  753. case FLASH_CFI_32BIT:
  754. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
  755. cmd, cword.l,
  756. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  757. *addr.lp = cword.l;
  758. break;
  759. case FLASH_CFI_64BIT:
  760. #ifdef DEBUG
  761. {
  762. char str[20];
  763. print_longlong (str, cword.ll);
  764. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  765. addr.llp, cmd, str,
  766. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  767. }
  768. #endif
  769. *addr.llp = cword.ll;
  770. break;
  771. }
  772. }
  773. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  774. {
  775. flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
  776. flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
  777. }
  778. /*-----------------------------------------------------------------------
  779. */
  780. static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
  781. {
  782. cfiptr_t cptr;
  783. cfiword_t cword;
  784. int retval;
  785. cptr.cp = flash_make_addr (info, sect, offset);
  786. flash_make_cmd (info, cmd, &cword);
  787. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
  788. switch (info->portwidth) {
  789. case FLASH_CFI_8BIT:
  790. debug ("is= %x %x\n", cptr.cp[0], cword.c);
  791. retval = (cptr.cp[0] == cword.c);
  792. break;
  793. case FLASH_CFI_16BIT:
  794. debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
  795. retval = (cptr.wp[0] == cword.w);
  796. break;
  797. case FLASH_CFI_32BIT:
  798. debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
  799. retval = (cptr.lp[0] == cword.l);
  800. break;
  801. case FLASH_CFI_64BIT:
  802. #ifdef DEBUG
  803. {
  804. char str1[20];
  805. char str2[20];
  806. print_longlong (str1, cptr.llp[0]);
  807. print_longlong (str2, cword.ll);
  808. debug ("is= %s %s\n", str1, str2);
  809. }
  810. #endif
  811. retval = (cptr.llp[0] == cword.ll);
  812. break;
  813. default:
  814. retval = 0;
  815. break;
  816. }
  817. return retval;
  818. }
  819. /*-----------------------------------------------------------------------
  820. */
  821. static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
  822. {
  823. cfiptr_t cptr;
  824. cfiword_t cword;
  825. int retval;
  826. cptr.cp = flash_make_addr (info, sect, offset);
  827. flash_make_cmd (info, cmd, &cword);
  828. switch (info->portwidth) {
  829. case FLASH_CFI_8BIT:
  830. retval = ((cptr.cp[0] & cword.c) == cword.c);
  831. break;
  832. case FLASH_CFI_16BIT:
  833. retval = ((cptr.wp[0] & cword.w) == cword.w);
  834. break;
  835. case FLASH_CFI_32BIT:
  836. retval = ((cptr.lp[0] & cword.l) == cword.l);
  837. break;
  838. case FLASH_CFI_64BIT:
  839. retval = ((cptr.llp[0] & cword.ll) == cword.ll);
  840. break;
  841. default:
  842. retval = 0;
  843. break;
  844. }
  845. return retval;
  846. }
  847. /*-----------------------------------------------------------------------
  848. */
  849. static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
  850. {
  851. cfiptr_t cptr;
  852. cfiword_t cword;
  853. int retval;
  854. cptr.cp = flash_make_addr (info, sect, offset);
  855. flash_make_cmd (info, cmd, &cword);
  856. switch (info->portwidth) {
  857. case FLASH_CFI_8BIT:
  858. retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
  859. break;
  860. case FLASH_CFI_16BIT:
  861. retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
  862. break;
  863. case FLASH_CFI_32BIT:
  864. retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
  865. break;
  866. case FLASH_CFI_64BIT:
  867. retval = ((cptr.llp[0] & cword.ll) !=
  868. (cptr.llp[0] & cword.ll));
  869. break;
  870. default:
  871. retval = 0;
  872. break;
  873. }
  874. return retval;
  875. }
  876. /*-----------------------------------------------------------------------
  877. * detect if flash is compatible with the Common Flash Interface (CFI)
  878. * http://www.jedec.org/download/search/jesd68.pdf
  879. *
  880. */
  881. static int flash_detect_cfi (flash_info_t * info)
  882. {
  883. debug ("flash detect cfi\n");
  884. for (info->portwidth = FLASH_CFI_8BIT;
  885. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  886. for (info->chipwidth = FLASH_CFI_BY8;
  887. info->chipwidth <= info->portwidth;
  888. info->chipwidth <<= 1) {
  889. flash_write_cmd (info, 0, 0, info->cmd_reset);
  890. flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
  891. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  892. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  893. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  894. info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
  895. debug ("device interface is %d\n",
  896. info->interface);
  897. debug ("found port %d chip %d ",
  898. info->portwidth, info->chipwidth);
  899. debug ("port %d bits chip %d bits\n",
  900. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  901. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  902. return 1;
  903. }
  904. }
  905. }
  906. debug ("not found\n");
  907. return 0;
  908. }
  909. /*
  910. * The following code cannot be run from FLASH!
  911. *
  912. */
  913. ulong flash_get_size (ulong base, int banknum)
  914. {
  915. flash_info_t *info = &flash_info[banknum];
  916. int i, j;
  917. flash_sect_t sect_cnt;
  918. unsigned long sector;
  919. unsigned long tmp;
  920. int size_ratio;
  921. uchar num_erase_regions;
  922. int erase_region_size;
  923. int erase_region_count;
  924. info->start[0] = base;
  925. if (flash_detect_cfi (info)) {
  926. info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
  927. #ifdef DEBUG
  928. flash_printqry (info, 0);
  929. #endif
  930. switch (info->vendor) {
  931. case CFI_CMDSET_INTEL_STANDARD:
  932. case CFI_CMDSET_INTEL_EXTENDED:
  933. default:
  934. info->cmd_reset = FLASH_CMD_RESET;
  935. break;
  936. case CFI_CMDSET_AMD_STANDARD:
  937. case CFI_CMDSET_AMD_EXTENDED:
  938. info->cmd_reset = AMD_CMD_RESET;
  939. break;
  940. }
  941. debug ("manufacturer is %d\n", info->vendor);
  942. size_ratio = info->portwidth / info->chipwidth;
  943. /* if the chip is x8/x16 reduce the ratio by half */
  944. if ((info->interface == FLASH_CFI_X8X16)
  945. && (info->chipwidth == FLASH_CFI_BY8)) {
  946. size_ratio >>= 1;
  947. }
  948. num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
  949. debug ("size_ratio %d port %d bits chip %d bits\n",
  950. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  951. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  952. debug ("found %d erase regions\n", num_erase_regions);
  953. sect_cnt = 0;
  954. sector = base;
  955. for (i = 0; i < num_erase_regions; i++) {
  956. if (i > NUM_ERASE_REGIONS) {
  957. printf ("%d erase regions found, only %d used\n",
  958. num_erase_regions, NUM_ERASE_REGIONS);
  959. break;
  960. }
  961. tmp = flash_read_long (info, 0,
  962. FLASH_OFFSET_ERASE_REGIONS +
  963. i * 4);
  964. erase_region_size =
  965. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  966. tmp >>= 16;
  967. erase_region_count = (tmp & 0xffff) + 1;
  968. debug ("erase_region_count = %d erase_region_size = %d\n",
  969. erase_region_count, erase_region_size);
  970. for (j = 0; j < erase_region_count; j++) {
  971. info->start[sect_cnt] = sector;
  972. sector += (erase_region_size * size_ratio);
  973. /*
  974. * Only read protection status from supported devices (intel...)
  975. */
  976. switch (info->vendor) {
  977. case CFI_CMDSET_INTEL_EXTENDED:
  978. case CFI_CMDSET_INTEL_STANDARD:
  979. info->protect[sect_cnt] =
  980. flash_isset (info, sect_cnt,
  981. FLASH_OFFSET_PROTECT,
  982. FLASH_STATUS_PROTECT);
  983. break;
  984. default:
  985. info->protect[sect_cnt] = 0; /* default: not protected */
  986. }
  987. sect_cnt++;
  988. }
  989. }
  990. info->sector_count = sect_cnt;
  991. /* multiply the size by the number of chips */
  992. info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
  993. info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
  994. tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
  995. info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
  996. tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
  997. info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
  998. tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
  999. info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
  1000. info->flash_id = FLASH_MAN_CFI;
  1001. if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
  1002. info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
  1003. }
  1004. }
  1005. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1006. return (info->size);
  1007. }
  1008. /*-----------------------------------------------------------------------
  1009. */
  1010. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  1011. cfiword_t cword)
  1012. {
  1013. cfiptr_t ctladdr;
  1014. cfiptr_t cptr;
  1015. int flag;
  1016. ctladdr.cp = flash_make_addr (info, 0, 0);
  1017. cptr.cp = (uchar *) dest;
  1018. /* Check if Flash is (sufficiently) erased */
  1019. switch (info->portwidth) {
  1020. case FLASH_CFI_8BIT:
  1021. flag = ((cptr.cp[0] & cword.c) == cword.c);
  1022. break;
  1023. case FLASH_CFI_16BIT:
  1024. flag = ((cptr.wp[0] & cword.w) == cword.w);
  1025. break;
  1026. case FLASH_CFI_32BIT:
  1027. flag = ((cptr.lp[0] & cword.l) == cword.l);
  1028. break;
  1029. case FLASH_CFI_64BIT:
  1030. flag = ((cptr.llp[0] & cword.ll) == cword.ll);
  1031. break;
  1032. default:
  1033. return 2;
  1034. }
  1035. if (!flag)
  1036. return 2;
  1037. /* Disable interrupts which might cause a timeout here */
  1038. flag = disable_interrupts ();
  1039. switch (info->vendor) {
  1040. case CFI_CMDSET_INTEL_EXTENDED:
  1041. case CFI_CMDSET_INTEL_STANDARD:
  1042. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  1043. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  1044. break;
  1045. case CFI_CMDSET_AMD_EXTENDED:
  1046. case CFI_CMDSET_AMD_STANDARD:
  1047. flash_unlock_seq (info, 0);
  1048. flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
  1049. break;
  1050. }
  1051. switch (info->portwidth) {
  1052. case FLASH_CFI_8BIT:
  1053. cptr.cp[0] = cword.c;
  1054. break;
  1055. case FLASH_CFI_16BIT:
  1056. cptr.wp[0] = cword.w;
  1057. break;
  1058. case FLASH_CFI_32BIT:
  1059. cptr.lp[0] = cword.l;
  1060. break;
  1061. case FLASH_CFI_64BIT:
  1062. cptr.llp[0] = cword.ll;
  1063. break;
  1064. }
  1065. /* re-enable interrupts if necessary */
  1066. if (flag)
  1067. enable_interrupts ();
  1068. return flash_full_status_check (info, 0, info->write_tout, "write");
  1069. }
  1070. #ifdef CFG_FLASH_USE_BUFFER_WRITE
  1071. /* loop through the sectors from the highest address
  1072. * when the passed address is greater or equal to the sector address
  1073. * we have a match
  1074. */
  1075. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  1076. {
  1077. flash_sect_t sector;
  1078. for (sector = info->sector_count - 1; sector >= 0; sector--) {
  1079. if (addr >= info->start[sector])
  1080. break;
  1081. }
  1082. return sector;
  1083. }
  1084. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  1085. int len)
  1086. {
  1087. flash_sect_t sector;
  1088. int cnt;
  1089. int retcode;
  1090. volatile cfiptr_t src;
  1091. volatile cfiptr_t dst;
  1092. /* buffered writes in the AMD chip set is not supported yet */
  1093. if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
  1094. (info->vendor == CFI_CMDSET_AMD_EXTENDED))
  1095. return ERR_INVAL;
  1096. src.cp = cp;
  1097. dst.cp = (uchar *) dest;
  1098. sector = find_sector (info, dest);
  1099. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1100. flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
  1101. if ((retcode =
  1102. flash_status_check (info, sector, info->buffer_write_tout,
  1103. "write to buffer")) == ERR_OK) {
  1104. /* reduce the number of loops by the width of the port */
  1105. switch (info->portwidth) {
  1106. case FLASH_CFI_8BIT:
  1107. cnt = len;
  1108. break;
  1109. case FLASH_CFI_16BIT:
  1110. cnt = len >> 1;
  1111. break;
  1112. case FLASH_CFI_32BIT:
  1113. cnt = len >> 2;
  1114. break;
  1115. case FLASH_CFI_64BIT:
  1116. cnt = len >> 3;
  1117. break;
  1118. default:
  1119. return ERR_INVAL;
  1120. break;
  1121. }
  1122. flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
  1123. while (cnt-- > 0) {
  1124. switch (info->portwidth) {
  1125. case FLASH_CFI_8BIT:
  1126. *dst.cp++ = *src.cp++;
  1127. break;
  1128. case FLASH_CFI_16BIT:
  1129. *dst.wp++ = *src.wp++;
  1130. break;
  1131. case FLASH_CFI_32BIT:
  1132. *dst.lp++ = *src.lp++;
  1133. break;
  1134. case FLASH_CFI_64BIT:
  1135. *dst.llp++ = *src.llp++;
  1136. break;
  1137. default:
  1138. return ERR_INVAL;
  1139. break;
  1140. }
  1141. }
  1142. flash_write_cmd (info, sector, 0,
  1143. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  1144. retcode =
  1145. flash_full_status_check (info, sector,
  1146. info->buffer_write_tout,
  1147. "buffer write");
  1148. }
  1149. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1150. return retcode;
  1151. }
  1152. #endif /* CFG_FLASH_USE_BUFFER_WRITE */
  1153. #endif /* CFG_FLASH_CFI */