mc.c 28 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229
  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <linux/bug.h>
  9. #include <asm/io.h>
  10. #include <libfdt.h>
  11. #include <fdt_support.h>
  12. #include <fsl-mc/fsl_mc.h>
  13. #include <fsl-mc/fsl_mc_sys.h>
  14. #include <fsl-mc/fsl_mc_private.h>
  15. #include <fsl-mc/fsl_dpmng.h>
  16. #include <fsl-mc/fsl_dprc.h>
  17. #include <fsl-mc/fsl_dpio.h>
  18. #include <fsl-mc/fsl_dpni.h>
  19. #include <fsl-mc/fsl_qbman_portal.h>
  20. #include <fsl-mc/ldpaa_wriop.h>
  21. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  22. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  23. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  24. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  25. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. static int mc_boot_status = -1;
  28. static int mc_dpl_applied = -1;
  29. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  30. static int mc_aiop_applied = -1;
  31. #endif
  32. struct fsl_mc_io *root_mc_io = NULL;
  33. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  34. uint16_t root_dprc_handle = 0;
  35. uint16_t dflt_dprc_handle = 0;
  36. int child_dprc_id;
  37. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  38. struct fsl_dpio_obj *dflt_dpio = NULL;
  39. struct fsl_dpni_obj *dflt_dpni = NULL;
  40. #ifdef DEBUG
  41. void dump_ram_words(const char *title, void *addr)
  42. {
  43. int i;
  44. uint32_t *words = addr;
  45. printf("Dumping beginning of %s (%p):\n", title, addr);
  46. for (i = 0; i < 16; i++)
  47. printf("%#x ", words[i]);
  48. printf("\n");
  49. }
  50. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  51. {
  52. printf("MC CCSR registers:\n"
  53. "reg_gcr1 %#x\n"
  54. "reg_gsr %#x\n"
  55. "reg_sicbalr %#x\n"
  56. "reg_sicbahr %#x\n"
  57. "reg_sicapr %#x\n"
  58. "reg_mcfbalr %#x\n"
  59. "reg_mcfbahr %#x\n"
  60. "reg_mcfapr %#x\n"
  61. "reg_psr %#x\n",
  62. mc_ccsr_regs->reg_gcr1,
  63. mc_ccsr_regs->reg_gsr,
  64. mc_ccsr_regs->reg_sicbalr,
  65. mc_ccsr_regs->reg_sicbahr,
  66. mc_ccsr_regs->reg_sicapr,
  67. mc_ccsr_regs->reg_mcfbalr,
  68. mc_ccsr_regs->reg_mcfbahr,
  69. mc_ccsr_regs->reg_mcfapr,
  70. mc_ccsr_regs->reg_psr);
  71. }
  72. #else
  73. #define dump_ram_words(title, addr)
  74. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  75. #endif /* DEBUG */
  76. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  77. /**
  78. * Copying MC firmware or DPL image to DDR
  79. */
  80. static int mc_copy_image(const char *title,
  81. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  82. {
  83. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  84. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  85. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  86. return 0;
  87. }
  88. /**
  89. * MC firmware FIT image parser checks if the image is in FIT
  90. * format, verifies integrity of the image and calculates
  91. * raw image address and size values.
  92. * Returns 0 on success and a negative errno on error.
  93. * task fail.
  94. **/
  95. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  96. const void **raw_image_addr,
  97. size_t *raw_image_size)
  98. {
  99. int format;
  100. void *fit_hdr;
  101. int node_offset;
  102. const void *data;
  103. size_t size;
  104. const char *uname = "firmware";
  105. fit_hdr = (void *)mc_fw_addr;
  106. /* Check if Image is in FIT format */
  107. format = genimg_get_format(fit_hdr);
  108. if (format != IMAGE_FORMAT_FIT) {
  109. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  110. return -EINVAL;
  111. }
  112. if (!fit_check_format(fit_hdr)) {
  113. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  114. return -EINVAL;
  115. }
  116. node_offset = fit_image_get_node(fit_hdr, uname);
  117. if (node_offset < 0) {
  118. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  119. return -ENOENT;
  120. }
  121. /* Verify MC firmware image */
  122. if (!(fit_image_verify(fit_hdr, node_offset))) {
  123. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  124. return -EINVAL;
  125. }
  126. /* Get address and size of raw image */
  127. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  128. *raw_image_addr = data;
  129. *raw_image_size = size;
  130. return 0;
  131. }
  132. #endif
  133. /*
  134. * Calculates the values to be used to specify the address range
  135. * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
  136. * It returns the highest 512MB-aligned address within the given
  137. * address range, in '*aligned_base_addr', and the number of 256 MiB
  138. * blocks in it, in 'num_256mb_blocks'.
  139. */
  140. static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
  141. size_t mc_ram_size,
  142. u64 *aligned_base_addr,
  143. u8 *num_256mb_blocks)
  144. {
  145. u64 addr;
  146. u16 num_blocks;
  147. if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
  148. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  149. mc_ram_size);
  150. return -EINVAL;
  151. }
  152. num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  153. if (num_blocks < 1 || num_blocks > 0xff) {
  154. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  155. mc_ram_size);
  156. return -EINVAL;
  157. }
  158. addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
  159. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  160. if (addr < mc_private_ram_start_addr) {
  161. printf("fsl-mc: ERROR: bad start address %#llx\n",
  162. mc_private_ram_start_addr);
  163. return -EFAULT;
  164. }
  165. *aligned_base_addr = addr;
  166. *num_256mb_blocks = num_blocks;
  167. return 0;
  168. }
  169. static int mc_fixup_dpc(u64 dpc_addr)
  170. {
  171. void *blob = (void *)dpc_addr;
  172. int nodeoffset;
  173. /* delete any existing ICID pools */
  174. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  175. if (fdt_del_node(blob, nodeoffset) < 0)
  176. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  177. /* add a new pool */
  178. nodeoffset = fdt_path_offset(blob, "/resources");
  179. if (nodeoffset < 0) {
  180. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  181. return -EINVAL;
  182. }
  183. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  184. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  185. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  186. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  187. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  188. "num",
  189. FSL_DPAA2_STREAM_ID_END -
  190. FSL_DPAA2_STREAM_ID_START + 1, 1);
  191. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  192. return 0;
  193. }
  194. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  195. {
  196. u64 mc_dpc_offset;
  197. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  198. int error;
  199. void *dpc_fdt_hdr;
  200. int dpc_size;
  201. #endif
  202. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  203. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  204. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  205. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  206. #else
  207. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  208. #endif
  209. /*
  210. * Load the MC DPC blob in the MC private DRAM block:
  211. */
  212. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  213. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  214. #else
  215. /*
  216. * Get address and size of the DPC blob stored in flash:
  217. */
  218. dpc_fdt_hdr = (void *)mc_dpc_addr;
  219. error = fdt_check_header(dpc_fdt_hdr);
  220. if (error != 0) {
  221. /*
  222. * Don't return with error here, since the MC firmware can
  223. * still boot without a DPC
  224. */
  225. printf("\nfsl-mc: WARNING: No DPC image found");
  226. return 0;
  227. }
  228. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  229. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  230. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  231. dpc_size);
  232. return -EINVAL;
  233. }
  234. mc_copy_image("MC DPC blob",
  235. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  236. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  237. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  238. return -EINVAL;
  239. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  240. return 0;
  241. }
  242. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  243. {
  244. u64 mc_dpl_offset;
  245. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  246. int error;
  247. void *dpl_fdt_hdr;
  248. int dpl_size;
  249. #endif
  250. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  251. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  252. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  253. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  254. #else
  255. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  256. #endif
  257. /*
  258. * Load the MC DPL blob in the MC private DRAM block:
  259. */
  260. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  261. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  262. #else
  263. /*
  264. * Get address and size of the DPL blob stored in flash:
  265. */
  266. dpl_fdt_hdr = (void *)mc_dpl_addr;
  267. error = fdt_check_header(dpl_fdt_hdr);
  268. if (error != 0) {
  269. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  270. return error;
  271. }
  272. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  273. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  274. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  275. dpl_size);
  276. return -EINVAL;
  277. }
  278. mc_copy_image("MC DPL blob",
  279. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  280. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  281. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  282. return 0;
  283. }
  284. /**
  285. * Return the MC boot timeout value in milliseconds
  286. */
  287. static unsigned long get_mc_boot_timeout_ms(void)
  288. {
  289. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  290. char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
  291. if (timeout_ms_env_var) {
  292. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  293. if (timeout_ms == 0) {
  294. printf("fsl-mc: WARNING: Invalid value for \'"
  295. MC_BOOT_TIMEOUT_ENV_VAR
  296. "\' environment variable: %lu\n",
  297. timeout_ms);
  298. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  299. }
  300. }
  301. return timeout_ms;
  302. }
  303. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  304. static int load_mc_aiop_img(u64 aiop_fw_addr)
  305. {
  306. u64 mc_ram_addr = mc_get_dram_addr();
  307. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  308. void *aiop_img;
  309. #endif
  310. /*
  311. * Load the MC AIOP image in the MC private DRAM block:
  312. */
  313. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  314. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  315. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  316. #else
  317. aiop_img = (void *)aiop_fw_addr;
  318. mc_copy_image("MC AIOP image",
  319. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  320. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  321. #endif
  322. mc_aiop_applied = 0;
  323. return 0;
  324. }
  325. #endif
  326. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  327. {
  328. u32 reg_gsr;
  329. u32 mc_fw_boot_status;
  330. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  331. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  332. dmb();
  333. assert(timeout_ms > 0);
  334. for (;;) {
  335. udelay(1000); /* throttle polling */
  336. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  337. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  338. if (mc_fw_boot_status & 0x1)
  339. break;
  340. timeout_ms--;
  341. if (timeout_ms == 0)
  342. break;
  343. }
  344. if (timeout_ms == 0) {
  345. printf("ERROR: timeout\n");
  346. /* TODO: Get an error status from an MC CCSR register */
  347. return -ETIMEDOUT;
  348. }
  349. if (mc_fw_boot_status != 0x1) {
  350. /*
  351. * TODO: Identify critical errors from the GSR register's FS
  352. * field and for those errors, set error to -ENODEV or other
  353. * appropriate errno, so that the status property is set to
  354. * failure in the fsl,dprc device tree node.
  355. */
  356. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  357. reg_gsr);
  358. } else {
  359. printf("SUCCESS\n");
  360. }
  361. *final_reg_gsr = reg_gsr;
  362. return 0;
  363. }
  364. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  365. {
  366. int error = 0;
  367. int portal_id = 0;
  368. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  369. u64 mc_ram_addr = mc_get_dram_addr();
  370. u32 reg_gsr;
  371. u32 reg_mcfbalr;
  372. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  373. const void *raw_image_addr;
  374. size_t raw_image_size = 0;
  375. #endif
  376. struct mc_version mc_ver_info;
  377. u64 mc_ram_aligned_base_addr;
  378. u8 mc_ram_num_256mb_blocks;
  379. size_t mc_ram_size = mc_get_dram_block_size();
  380. error = calculate_mc_private_ram_params(mc_ram_addr,
  381. mc_ram_size,
  382. &mc_ram_aligned_base_addr,
  383. &mc_ram_num_256mb_blocks);
  384. if (error != 0)
  385. goto out;
  386. /*
  387. * Management Complex cores should be held at reset out of POR.
  388. * U-boot should be the first software to touch MC. To be safe,
  389. * we reset all cores again by setting GCR1 to 0. It doesn't do
  390. * anything if they are held at reset. After we setup the firmware
  391. * we kick off MC by deasserting the reset bit for core 0, and
  392. * deasserting the reset bits for Command Portal Managers.
  393. * The stop bits are not touched here. They are used to stop the
  394. * cores when they are active. Setting stop bits doesn't stop the
  395. * cores from fetching instructions when they are released from
  396. * reset.
  397. */
  398. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  399. dmb();
  400. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  401. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  402. #else
  403. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  404. &raw_image_size);
  405. if (error != 0)
  406. goto out;
  407. /*
  408. * Load the MC FW at the beginning of the MC private DRAM block:
  409. */
  410. mc_copy_image("MC Firmware",
  411. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  412. #endif
  413. dump_ram_words("firmware", (void *)mc_ram_addr);
  414. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  415. if (error != 0)
  416. goto out;
  417. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  418. dump_mc_ccsr_regs(mc_ccsr_regs);
  419. /*
  420. * Tell MC what is the address range of the DRAM block assigned to it:
  421. */
  422. reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
  423. (mc_ram_num_256mb_blocks - 1);
  424. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  425. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  426. (u32)(mc_ram_aligned_base_addr >> 32));
  427. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  428. /*
  429. * Tell the MC that we want delayed DPL deployment.
  430. */
  431. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  432. printf("\nfsl-mc: Booting Management Complex ... ");
  433. /*
  434. * Deassert reset and release MC core 0 to run
  435. */
  436. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  437. error = wait_for_mc(true, &reg_gsr);
  438. if (error != 0)
  439. goto out;
  440. /*
  441. * TODO: need to obtain the portal_id for the root container from the
  442. * DPL
  443. */
  444. portal_id = 0;
  445. /*
  446. * Initialize the global default MC portal
  447. * And check that the MC firmware is responding portal commands:
  448. */
  449. root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  450. if (!root_mc_io) {
  451. printf(" No memory: malloc() failed\n");
  452. return -ENOMEM;
  453. }
  454. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  455. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  456. portal_id, root_mc_io->mmio_regs);
  457. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  458. if (error != 0) {
  459. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  460. error);
  461. goto out;
  462. }
  463. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  464. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  465. reg_gsr & GSR_FS_MASK);
  466. out:
  467. if (error != 0)
  468. mc_boot_status = error;
  469. else
  470. mc_boot_status = 0;
  471. return error;
  472. }
  473. int mc_apply_dpl(u64 mc_dpl_addr)
  474. {
  475. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  476. int error = 0;
  477. u32 reg_gsr;
  478. u64 mc_ram_addr = mc_get_dram_addr();
  479. size_t mc_ram_size = mc_get_dram_block_size();
  480. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  481. if (error != 0)
  482. return error;
  483. /*
  484. * Tell the MC to deploy the DPL:
  485. */
  486. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  487. printf("fsl-mc: Deploying data path layout ... ");
  488. error = wait_for_mc(false, &reg_gsr);
  489. if (!error)
  490. mc_dpl_applied = 0;
  491. return error;
  492. }
  493. int get_mc_boot_status(void)
  494. {
  495. return mc_boot_status;
  496. }
  497. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  498. int get_aiop_apply_status(void)
  499. {
  500. return mc_aiop_applied;
  501. }
  502. #endif
  503. int get_dpl_apply_status(void)
  504. {
  505. return mc_dpl_applied;
  506. }
  507. /**
  508. * Return the MC address of private DRAM block.
  509. */
  510. u64 mc_get_dram_addr(void)
  511. {
  512. u64 mc_ram_addr;
  513. /*
  514. * The MC private DRAM block was already carved at the end of DRAM
  515. * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
  516. */
  517. if (gd->bd->bi_dram[1].start) {
  518. mc_ram_addr =
  519. gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
  520. } else {
  521. mc_ram_addr =
  522. gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  523. }
  524. return mc_ram_addr;
  525. }
  526. /**
  527. * Return the actual size of the MC private DRAM block.
  528. */
  529. unsigned long mc_get_dram_block_size(void)
  530. {
  531. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  532. char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
  533. if (dram_block_size_env_var) {
  534. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  535. 10);
  536. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  537. printf("fsl-mc: WARNING: Invalid value for \'"
  538. MC_MEM_SIZE_ENV_VAR
  539. "\' environment variable: %lu\n",
  540. dram_block_size);
  541. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  542. }
  543. }
  544. return dram_block_size;
  545. }
  546. int fsl_mc_ldpaa_init(bd_t *bis)
  547. {
  548. int i;
  549. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  550. if ((wriop_is_enabled_dpmac(i) == 1) &&
  551. (wriop_get_phy_address(i) != -1))
  552. ldpaa_eth_init(i, wriop_get_enet_if(i));
  553. return 0;
  554. }
  555. static int dpio_init(void)
  556. {
  557. struct qbman_swp_desc p_des;
  558. struct dpio_attr attr;
  559. struct dpio_cfg dpio_cfg;
  560. int err = 0;
  561. dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
  562. if (!dflt_dpio) {
  563. printf("No memory: malloc() failed\n");
  564. err = -ENOMEM;
  565. goto err_malloc;
  566. }
  567. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  568. dpio_cfg.num_priorities = 8;
  569. err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
  570. &dflt_dpio->dpio_handle);
  571. if (err < 0) {
  572. printf("dpio_create() failed: %d\n", err);
  573. err = -ENODEV;
  574. goto err_create;
  575. }
  576. memset(&attr, 0, sizeof(struct dpio_attr));
  577. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  578. dflt_dpio->dpio_handle, &attr);
  579. if (err < 0) {
  580. printf("dpio_get_attributes() failed: %d\n", err);
  581. goto err_get_attr;
  582. }
  583. dflt_dpio->dpio_id = attr.id;
  584. #ifdef DEBUG
  585. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  586. #endif
  587. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  588. if (err < 0) {
  589. printf("dpio_enable() failed %d\n", err);
  590. goto err_get_enable;
  591. }
  592. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  593. attr.qbman_portal_ce_offset,
  594. attr.qbman_portal_ci_offset,
  595. attr.qbman_portal_id,
  596. attr.num_priorities);
  597. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  598. + attr.qbman_portal_ce_offset);
  599. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  600. + attr.qbman_portal_ci_offset);
  601. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  602. if (dflt_dpio->sw_portal == NULL) {
  603. printf("qbman_swp_init() failed\n");
  604. goto err_get_swp_init;
  605. }
  606. return 0;
  607. err_get_swp_init:
  608. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  609. err_get_enable:
  610. free(dflt_dpio);
  611. err_get_attr:
  612. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  613. dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  614. err_create:
  615. err_malloc:
  616. return err;
  617. }
  618. static int dpio_exit(void)
  619. {
  620. int err;
  621. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  622. if (err < 0) {
  623. printf("dpio_disable() failed: %d\n", err);
  624. goto err;
  625. }
  626. err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  627. if (err < 0) {
  628. printf("dpio_destroy() failed: %d\n", err);
  629. goto err;
  630. }
  631. #ifdef DEBUG
  632. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  633. #endif
  634. if (dflt_dpio)
  635. free(dflt_dpio);
  636. return 0;
  637. err:
  638. return err;
  639. }
  640. static int dprc_init(void)
  641. {
  642. int err, child_portal_id, container_id;
  643. struct dprc_cfg cfg;
  644. uint64_t mc_portal_offset;
  645. /* Open root container */
  646. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  647. if (err < 0) {
  648. printf("dprc_get_container_id(): Root failed: %d\n", err);
  649. goto err_root_container_id;
  650. }
  651. #ifdef DEBUG
  652. printf("Root container id = %d\n", container_id);
  653. #endif
  654. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  655. &root_dprc_handle);
  656. if (err < 0) {
  657. printf("dprc_open(): Root Container failed: %d\n", err);
  658. goto err_root_open;
  659. }
  660. if (!root_dprc_handle) {
  661. printf("dprc_open(): Root Container Handle is not valid\n");
  662. goto err_root_open;
  663. }
  664. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  665. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  666. DPRC_CFG_OPT_ALLOC_ALLOWED;
  667. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  668. cfg.portal_id = 250;
  669. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  670. root_dprc_handle,
  671. &cfg,
  672. &child_dprc_id,
  673. &mc_portal_offset);
  674. if (err < 0) {
  675. printf("dprc_create_container() failed: %d\n", err);
  676. goto err_create;
  677. }
  678. dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  679. if (!dflt_mc_io) {
  680. err = -ENOMEM;
  681. printf(" No memory: malloc() failed\n");
  682. goto err_malloc;
  683. }
  684. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  685. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  686. #ifdef DEBUG
  687. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  688. child_dprc_id, dflt_mc_io->mmio_regs);
  689. #endif
  690. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  691. &dflt_dprc_handle);
  692. if (err < 0) {
  693. printf("dprc_open(): Child container failed: %d\n", err);
  694. goto err_child_open;
  695. }
  696. if (!dflt_dprc_handle) {
  697. printf("dprc_open(): Child container Handle is not valid\n");
  698. goto err_child_open;
  699. }
  700. return 0;
  701. err_child_open:
  702. free(dflt_mc_io);
  703. err_malloc:
  704. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  705. root_dprc_handle, child_dprc_id);
  706. err_create:
  707. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  708. err_root_open:
  709. err_root_container_id:
  710. return err;
  711. }
  712. static int dprc_exit(void)
  713. {
  714. int err;
  715. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  716. if (err < 0) {
  717. printf("dprc_close(): Child failed: %d\n", err);
  718. goto err;
  719. }
  720. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  721. root_dprc_handle, child_dprc_id);
  722. if (err < 0) {
  723. printf("dprc_destroy_container() failed: %d\n", err);
  724. goto err;
  725. }
  726. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  727. if (err < 0) {
  728. printf("dprc_close(): Root failed: %d\n", err);
  729. goto err;
  730. }
  731. if (dflt_mc_io)
  732. free(dflt_mc_io);
  733. if (root_mc_io)
  734. free(root_mc_io);
  735. return 0;
  736. err:
  737. return err;
  738. }
  739. static int dpbp_init(void)
  740. {
  741. int err;
  742. struct dpbp_attr dpbp_attr;
  743. struct dpbp_cfg dpbp_cfg;
  744. dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
  745. if (!dflt_dpbp) {
  746. printf("No memory: malloc() failed\n");
  747. err = -ENOMEM;
  748. goto err_malloc;
  749. }
  750. dpbp_cfg.options = 512;
  751. err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
  752. &dflt_dpbp->dpbp_handle);
  753. if (err < 0) {
  754. err = -ENODEV;
  755. printf("dpbp_create() failed: %d\n", err);
  756. goto err_create;
  757. }
  758. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  759. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  760. dflt_dpbp->dpbp_handle,
  761. &dpbp_attr);
  762. if (err < 0) {
  763. printf("dpbp_get_attributes() failed: %d\n", err);
  764. goto err_get_attr;
  765. }
  766. dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
  767. #ifdef DEBUG
  768. printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  769. #endif
  770. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  771. if (err < 0) {
  772. printf("dpbp_close() failed: %d\n", err);
  773. goto err_close;
  774. }
  775. return 0;
  776. err_close:
  777. free(dflt_dpbp);
  778. err_get_attr:
  779. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  780. dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  781. err_create:
  782. err_malloc:
  783. return err;
  784. }
  785. static int dpbp_exit(void)
  786. {
  787. int err;
  788. err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
  789. &dflt_dpbp->dpbp_handle);
  790. if (err < 0) {
  791. printf("dpbp_open() failed: %d\n", err);
  792. goto err;
  793. }
  794. err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  795. dflt_dpbp->dpbp_handle);
  796. if (err < 0) {
  797. printf("dpbp_destroy() failed: %d\n", err);
  798. goto err;
  799. }
  800. #ifdef DEBUG
  801. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  802. #endif
  803. if (dflt_dpbp)
  804. free(dflt_dpbp);
  805. return 0;
  806. err:
  807. return err;
  808. }
  809. static int dpni_init(void)
  810. {
  811. int err;
  812. struct dpni_attr dpni_attr;
  813. struct dpni_cfg dpni_cfg;
  814. dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
  815. if (!dflt_dpni) {
  816. printf("No memory: malloc() failed\n");
  817. err = -ENOMEM;
  818. goto err_malloc;
  819. }
  820. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  821. dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
  822. DPNI_OPT_MULTICAST_FILTER;
  823. err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
  824. &dflt_dpni->dpni_handle);
  825. if (err < 0) {
  826. err = -ENODEV;
  827. printf("dpni_create() failed: %d\n", err);
  828. goto err_create;
  829. }
  830. memset(&dpni_attr, 0, sizeof(struct dpni_attr));
  831. err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  832. dflt_dpni->dpni_handle,
  833. &dpni_attr);
  834. if (err < 0) {
  835. printf("dpni_get_attributes() failed: %d\n", err);
  836. goto err_get_attr;
  837. }
  838. dflt_dpni->dpni_id = dpni_attr.id;
  839. #ifdef DEBUG
  840. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  841. #endif
  842. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  843. if (err < 0) {
  844. printf("dpni_close() failed: %d\n", err);
  845. goto err_close;
  846. }
  847. return 0;
  848. err_close:
  849. free(dflt_dpni);
  850. err_get_attr:
  851. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  852. dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  853. err_create:
  854. err_malloc:
  855. return err;
  856. }
  857. static int dpni_exit(void)
  858. {
  859. int err;
  860. err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
  861. &dflt_dpni->dpni_handle);
  862. if (err < 0) {
  863. printf("dpni_open() failed: %d\n", err);
  864. goto err;
  865. }
  866. err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  867. dflt_dpni->dpni_handle);
  868. if (err < 0) {
  869. printf("dpni_destroy() failed: %d\n", err);
  870. goto err;
  871. }
  872. #ifdef DEBUG
  873. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  874. #endif
  875. if (dflt_dpni)
  876. free(dflt_dpni);
  877. return 0;
  878. err:
  879. return err;
  880. }
  881. static int mc_init_object(void)
  882. {
  883. int err = 0;
  884. err = dprc_init();
  885. if (err < 0) {
  886. printf("dprc_init() failed: %d\n", err);
  887. goto err;
  888. }
  889. err = dpbp_init();
  890. if (err < 0) {
  891. printf("dpbp_init() failed: %d\n", err);
  892. goto err;
  893. }
  894. err = dpio_init();
  895. if (err < 0) {
  896. printf("dpio_init() failed: %d\n", err);
  897. goto err;
  898. }
  899. err = dpni_init();
  900. if (err < 0) {
  901. printf("dpni_init() failed: %d\n", err);
  902. goto err;
  903. }
  904. return 0;
  905. err:
  906. return err;
  907. }
  908. int fsl_mc_ldpaa_exit(bd_t *bd)
  909. {
  910. int err = 0;
  911. if (bd && get_mc_boot_status() == -1)
  912. return 0;
  913. if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
  914. printf("ERROR: fsl-mc: DPL is not applied\n");
  915. err = -ENODEV;
  916. return err;
  917. }
  918. if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
  919. return err;
  920. err = dpbp_exit();
  921. if (err < 0) {
  922. printf("dpni_exit() failed: %d\n", err);
  923. goto err;
  924. }
  925. err = dpio_exit();
  926. if (err < 0) {
  927. printf("dpio_exit() failed: %d\n", err);
  928. goto err;
  929. }
  930. err = dpni_exit();
  931. if (err < 0) {
  932. printf("dpni_exit() failed: %d\n", err);
  933. goto err;
  934. }
  935. err = dprc_exit();
  936. if (err < 0) {
  937. printf("dprc_exit() failed: %d\n", err);
  938. goto err;
  939. }
  940. return 0;
  941. err:
  942. return err;
  943. }
  944. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  945. {
  946. int err = 0;
  947. if (argc < 3)
  948. goto usage;
  949. switch (argv[1][0]) {
  950. case 's': {
  951. char sub_cmd;
  952. u64 mc_fw_addr, mc_dpc_addr;
  953. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  954. u64 aiop_fw_addr;
  955. #endif
  956. sub_cmd = argv[2][0];
  957. switch (sub_cmd) {
  958. case 'm':
  959. if (argc < 5)
  960. goto usage;
  961. if (get_mc_boot_status() == 0) {
  962. printf("fsl-mc: MC is already booted");
  963. printf("\n");
  964. return err;
  965. }
  966. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  967. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  968. 16);
  969. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  970. err = mc_init_object();
  971. break;
  972. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  973. case 'a':
  974. if (argc < 4)
  975. goto usage;
  976. if (get_aiop_apply_status() == 0) {
  977. printf("fsl-mc: AIOP FW is already");
  978. printf(" applied\n");
  979. return err;
  980. }
  981. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  982. 16);
  983. err = load_mc_aiop_img(aiop_fw_addr);
  984. if (!err)
  985. printf("fsl-mc: AIOP FW applied\n");
  986. break;
  987. #endif
  988. default:
  989. printf("Invalid option: %s\n", argv[2]);
  990. goto usage;
  991. break;
  992. }
  993. }
  994. break;
  995. case 'a': {
  996. u64 mc_dpl_addr;
  997. if (argc < 4)
  998. goto usage;
  999. if (get_dpl_apply_status() == 0) {
  1000. printf("fsl-mc: DPL already applied\n");
  1001. return err;
  1002. }
  1003. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1004. 16);
  1005. if (get_mc_boot_status() != 0) {
  1006. printf("fsl-mc: Deploying data path layout ..");
  1007. printf("ERROR (MC is not booted)\n");
  1008. return -ENODEV;
  1009. }
  1010. if (!fsl_mc_ldpaa_exit(NULL))
  1011. err = mc_apply_dpl(mc_dpl_addr);
  1012. break;
  1013. }
  1014. default:
  1015. printf("Invalid option: %s\n", argv[1]);
  1016. goto usage;
  1017. break;
  1018. }
  1019. return err;
  1020. usage:
  1021. return CMD_RET_USAGE;
  1022. }
  1023. U_BOOT_CMD(
  1024. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1025. "DPAA2 command to manage Management Complex (MC)",
  1026. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1027. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1028. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1029. );