i2c.c 8.2 KB

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  1. /*
  2. * (C) Copyright 2003 - 2009
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Based on the MPC5xxx code.
  24. */
  25. #include <common.h>
  26. #include <asm/io.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. #ifdef CONFIG_HARD_I2C
  29. #include <mpc512x.h>
  30. #include <i2c.h>
  31. /* by default set I2C bus 0 active */
  32. static unsigned int bus_num = 0;
  33. #define I2C_TIMEOUT 100
  34. #define I2C_RETRIES 3
  35. struct mpc512x_i2c_tap {
  36. int scl2tap;
  37. int tap2tap;
  38. };
  39. static int mpc_reg_in(volatile u32 *reg);
  40. static void mpc_reg_out(volatile u32 *reg, int val, int mask);
  41. static int wait_for_bb(void);
  42. static int wait_for_pin(int *status);
  43. static int do_address(uchar chip, char rdwr_flag);
  44. static int send_bytes(uchar chip, char *buf, int len);
  45. static int receive_bytes(uchar chip, char *buf, int len);
  46. static int mpc_get_fdr(int);
  47. static int mpc_reg_in (volatile u32 *reg)
  48. {
  49. int ret = in_be32(reg) >> 24;
  50. return ret;
  51. }
  52. static void mpc_reg_out (volatile u32 *reg, int val, int mask)
  53. {
  54. if (!mask) {
  55. out_be32(reg, val << 24);
  56. } else {
  57. clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
  58. }
  59. }
  60. static int wait_for_bb (void)
  61. {
  62. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  63. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  64. int timeout = I2C_TIMEOUT;
  65. int status;
  66. status = mpc_reg_in (&regs->msr);
  67. while (timeout-- && (status & I2C_BB)) {
  68. volatile int temp;
  69. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  70. temp = mpc_reg_in (&regs->mdr);
  71. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  72. mpc_reg_out (&regs->mcr, 0, 0);
  73. mpc_reg_out (&regs->mcr, I2C_EN, 0);
  74. udelay (1000);
  75. status = mpc_reg_in (&regs->msr);
  76. }
  77. return (status & I2C_BB);
  78. }
  79. static int wait_for_pin (int *status)
  80. {
  81. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  82. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  83. int timeout = I2C_TIMEOUT;
  84. *status = mpc_reg_in (&regs->msr);
  85. while (timeout-- && !(*status & I2C_IF)) {
  86. udelay (1000);
  87. *status = mpc_reg_in (&regs->msr);
  88. }
  89. if (!(*status & I2C_IF)) {
  90. return -1;
  91. }
  92. mpc_reg_out (&regs->msr, 0, I2C_IF);
  93. return 0;
  94. }
  95. static int do_address (uchar chip, char rdwr_flag)
  96. {
  97. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  98. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  99. int status;
  100. chip <<= 1;
  101. if (rdwr_flag) {
  102. chip |= 1;
  103. }
  104. mpc_reg_out (&regs->mcr, I2C_TX, I2C_TX);
  105. mpc_reg_out (&regs->mdr, chip, 0);
  106. if (wait_for_pin (&status)) {
  107. return -2;
  108. }
  109. if (status & I2C_RXAK) {
  110. return -3;
  111. }
  112. return 0;
  113. }
  114. static int send_bytes (uchar chip, char *buf, int len)
  115. {
  116. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  117. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  118. int wrcount;
  119. int status;
  120. for (wrcount = 0; wrcount < len; ++wrcount) {
  121. mpc_reg_out (&regs->mdr, buf[wrcount], 0);
  122. if (wait_for_pin (&status)) {
  123. break;
  124. }
  125. if (status & I2C_RXAK) {
  126. break;
  127. }
  128. }
  129. return !(wrcount == len);
  130. }
  131. static int receive_bytes (uchar chip, char *buf, int len)
  132. {
  133. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  134. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  135. int dummy = 1;
  136. int rdcount = 0;
  137. int status;
  138. int i;
  139. mpc_reg_out (&regs->mcr, 0, I2C_TX);
  140. for (i = 0; i < len; ++i) {
  141. buf[rdcount] = mpc_reg_in (&regs->mdr);
  142. if (dummy) {
  143. dummy = 0;
  144. } else {
  145. rdcount++;
  146. }
  147. if (wait_for_pin (&status)) {
  148. return -4;
  149. }
  150. }
  151. mpc_reg_out (&regs->mcr, I2C_TXAK, I2C_TXAK);
  152. buf[rdcount++] = mpc_reg_in (&regs->mdr);
  153. if (wait_for_pin (&status)) {
  154. return -5;
  155. }
  156. mpc_reg_out (&regs->mcr, 0, I2C_TXAK);
  157. return 0;
  158. }
  159. /**************** I2C API ****************/
  160. void i2c_init (int speed, int saddr)
  161. {
  162. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  163. int i;
  164. for (i = 0; i < I2C_BUS_CNT; i++){
  165. volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
  166. mpc_reg_out (&regs->mcr, 0, 0);
  167. /* Set clock */
  168. mpc_reg_out (&regs->mfdr, mpc_get_fdr (speed), 0);
  169. mpc_reg_out (&regs->madr, saddr << 1, 0);
  170. /* Enable module */
  171. mpc_reg_out (&regs->mcr, I2C_EN, I2C_INIT_MASK);
  172. mpc_reg_out (&regs->msr, 0, I2C_IF);
  173. }
  174. /* Disable interrupts */
  175. out_be32(&im->i2c.icr, 0);
  176. /* Turn off filters */
  177. out_be32(&im->i2c.mifr, 0);
  178. }
  179. static int mpc_get_fdr (int speed)
  180. {
  181. static int fdr = -1;
  182. if (fdr == -1) {
  183. ulong best_speed = 0;
  184. ulong divider;
  185. ulong ips, scl;
  186. ulong bestmatch = 0xffffffffUL;
  187. int best_i = 0, best_j = 0, i, j;
  188. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  189. struct mpc512x_i2c_tap scltap[] = {
  190. {4, 1},
  191. {4, 2},
  192. {6, 4},
  193. {6, 8},
  194. {14, 16},
  195. {30, 32},
  196. {62, 64},
  197. {126, 128}
  198. };
  199. ips = gd->ips_clk;
  200. for (i = 7; i >= 0; i--) {
  201. for (j = 7; j >= 0; j--) {
  202. scl = 2 * (scltap[j].scl2tap +
  203. (SCL_Tap[i] - 1) * scltap[j].tap2tap
  204. + 2);
  205. if (ips <= speed*scl) {
  206. if ((speed*scl - ips) < bestmatch) {
  207. bestmatch = speed*scl - ips;
  208. best_i = i;
  209. best_j = j;
  210. best_speed = ips/scl;
  211. }
  212. }
  213. }
  214. }
  215. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  216. if (gd->flags & GD_FLG_RELOC) {
  217. fdr = divider;
  218. } else {
  219. debug("%ld kHz, \n", best_speed / 1000);
  220. return divider;
  221. }
  222. }
  223. return fdr;
  224. }
  225. int i2c_probe (uchar chip)
  226. {
  227. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  228. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  229. int i;
  230. for (i = 0; i < I2C_RETRIES; i++) {
  231. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  232. if (! do_address (chip, 0)) {
  233. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  234. udelay (500);
  235. break;
  236. }
  237. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  238. udelay (500);
  239. }
  240. return (i == I2C_RETRIES);
  241. }
  242. int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
  243. {
  244. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  245. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  246. char xaddr[4];
  247. int ret = -1;
  248. xaddr[0] = (addr >> 24) & 0xFF;
  249. xaddr[1] = (addr >> 16) & 0xFF;
  250. xaddr[2] = (addr >> 8) & 0xFF;
  251. xaddr[3] = addr & 0xFF;
  252. if (wait_for_bb ()) {
  253. printf ("i2c_read: bus is busy\n");
  254. goto Done;
  255. }
  256. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  257. if (do_address (chip, 0)) {
  258. printf ("i2c_read: failed to address chip\n");
  259. goto Done;
  260. }
  261. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  262. printf ("i2c_read: send_bytes failed\n");
  263. goto Done;
  264. }
  265. mpc_reg_out (&regs->mcr, I2C_RSTA, I2C_RSTA);
  266. if (do_address (chip, 1)) {
  267. printf ("i2c_read: failed to address chip\n");
  268. goto Done;
  269. }
  270. if (receive_bytes (chip, (char *)buf, len)) {
  271. printf ("i2c_read: receive_bytes failed\n");
  272. goto Done;
  273. }
  274. ret = 0;
  275. Done:
  276. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  277. return ret;
  278. }
  279. int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
  280. {
  281. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  282. volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
  283. char xaddr[4];
  284. int ret = -1;
  285. xaddr[0] = (addr >> 24) & 0xFF;
  286. xaddr[1] = (addr >> 16) & 0xFF;
  287. xaddr[2] = (addr >> 8) & 0xFF;
  288. xaddr[3] = addr & 0xFF;
  289. if (wait_for_bb ()) {
  290. printf ("i2c_write: bus is busy\n");
  291. goto Done;
  292. }
  293. mpc_reg_out (&regs->mcr, I2C_STA, I2C_STA);
  294. if (do_address (chip, 0)) {
  295. printf ("i2c_write: failed to address chip\n");
  296. goto Done;
  297. }
  298. if (send_bytes (chip, &xaddr[4-alen], alen)) {
  299. printf ("i2c_write: send_bytes failed\n");
  300. goto Done;
  301. }
  302. if (send_bytes (chip, (char *)buf, len)) {
  303. printf ("i2c_write: send_bytes failed\n");
  304. goto Done;
  305. }
  306. ret = 0;
  307. Done:
  308. mpc_reg_out (&regs->mcr, 0, I2C_STA);
  309. return ret;
  310. }
  311. int i2c_set_bus_num (unsigned int bus)
  312. {
  313. if (bus >= I2C_BUS_CNT) {
  314. return -1;
  315. }
  316. bus_num = bus;
  317. return 0;
  318. }
  319. unsigned int i2c_get_bus_num (void)
  320. {
  321. return bus_num;
  322. }
  323. #endif /* CONFIG_HARD_I2C */