salvator-common.dtsi 12 KB

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  1. /*
  2. * Device Tree Source for common parts of Salvator-X board variants
  3. *
  4. * Copyright (C) 2015-2016 Renesas Electronics Corp.
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /*
  11. * SSI-AK4613
  12. *
  13. * This command is required when Playback/Capture
  14. *
  15. * amixer set "DVC Out" 100%
  16. * amixer set "DVC In" 100%
  17. *
  18. * You can use Mute
  19. *
  20. * amixer set "DVC Out Mute" on
  21. * amixer set "DVC In Mute" on
  22. *
  23. * You can use Volume Ramp
  24. *
  25. * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
  26. * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  27. * amixer set "DVC Out Ramp" on
  28. * aplay xxx.wav &
  29. * amixer set "DVC Out" 80% // Volume Down
  30. * amixer set "DVC Out" 100% // Volume Up
  31. */
  32. #include <dt-bindings/gpio/gpio.h>
  33. / {
  34. aliases {
  35. serial0 = &scif2;
  36. serial1 = &scif1;
  37. ethernet0 = &avb;
  38. };
  39. chosen {
  40. bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  41. stdout-path = "serial0:115200n8";
  42. };
  43. audio_clkout: audio-clkout {
  44. /*
  45. * This is same as <&rcar_sound 0>
  46. * but needed to avoid cs2000/rcar_sound probe dead-lock
  47. */
  48. compatible = "fixed-clock";
  49. #clock-cells = <0>;
  50. clock-frequency = <11289600>;
  51. };
  52. backlight: backlight {
  53. compatible = "pwm-backlight";
  54. pwms = <&pwm1 0 50000>;
  55. brightness-levels = <256 128 64 16 8 4 0>;
  56. default-brightness-level = <6>;
  57. power-supply = <&reg_12v>;
  58. enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  59. };
  60. reg_1p8v: regulator0 {
  61. compatible = "regulator-fixed";
  62. regulator-name = "fixed-1.8V";
  63. regulator-min-microvolt = <1800000>;
  64. regulator-max-microvolt = <1800000>;
  65. regulator-boot-on;
  66. regulator-always-on;
  67. };
  68. reg_3p3v: regulator1 {
  69. compatible = "regulator-fixed";
  70. regulator-name = "fixed-3.3V";
  71. regulator-min-microvolt = <3300000>;
  72. regulator-max-microvolt = <3300000>;
  73. regulator-boot-on;
  74. regulator-always-on;
  75. };
  76. reg_12v: regulator2 {
  77. compatible = "regulator-fixed";
  78. regulator-name = "fixed-12V";
  79. regulator-min-microvolt = <12000000>;
  80. regulator-max-microvolt = <12000000>;
  81. regulator-boot-on;
  82. regulator-always-on;
  83. };
  84. rsnd_ak4613: sound {
  85. compatible = "simple-audio-card";
  86. simple-audio-card,format = "left_j";
  87. simple-audio-card,bitclock-master = <&sndcpu>;
  88. simple-audio-card,frame-master = <&sndcpu>;
  89. sndcpu: simple-audio-card,cpu {
  90. sound-dai = <&rcar_sound>;
  91. };
  92. sndcodec: simple-audio-card,codec {
  93. sound-dai = <&ak4613>;
  94. };
  95. };
  96. vbus0_usb2: regulator-vbus0-usb2 {
  97. compatible = "regulator-fixed";
  98. regulator-name = "USB20_VBUS0";
  99. regulator-min-microvolt = <5000000>;
  100. regulator-max-microvolt = <5000000>;
  101. gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
  102. enable-active-high;
  103. };
  104. vcc_sdhi0: regulator-vcc-sdhi0 {
  105. compatible = "regulator-fixed";
  106. regulator-name = "SDHI0 Vcc";
  107. regulator-min-microvolt = <3300000>;
  108. regulator-max-microvolt = <3300000>;
  109. gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  110. enable-active-high;
  111. };
  112. vccq_sdhi0: regulator-vccq-sdhi0 {
  113. compatible = "regulator-gpio";
  114. regulator-name = "SDHI0 VccQ";
  115. regulator-min-microvolt = <1800000>;
  116. regulator-max-microvolt = <3300000>;
  117. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
  118. gpios-states = <1>;
  119. states = <3300000 1
  120. 1800000 0>;
  121. };
  122. vcc_sdhi3: regulator-vcc-sdhi3 {
  123. compatible = "regulator-fixed";
  124. regulator-name = "SDHI3 Vcc";
  125. regulator-min-microvolt = <3300000>;
  126. regulator-max-microvolt = <3300000>;
  127. gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  128. enable-active-high;
  129. };
  130. vccq_sdhi3: regulator-vccq-sdhi3 {
  131. compatible = "regulator-gpio";
  132. regulator-name = "SDHI3 VccQ";
  133. regulator-min-microvolt = <1800000>;
  134. regulator-max-microvolt = <3300000>;
  135. gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
  136. gpios-states = <1>;
  137. states = <3300000 1
  138. 1800000 0>;
  139. };
  140. hdmi0-out {
  141. compatible = "hdmi-connector";
  142. label = "HDMI0 OUT";
  143. type = "a";
  144. port {
  145. hdmi0_con: endpoint {
  146. };
  147. };
  148. };
  149. hdmi1-out {
  150. compatible = "hdmi-connector";
  151. label = "HDMI1 OUT";
  152. type = "a";
  153. port {
  154. hdmi1_con: endpoint {
  155. };
  156. };
  157. };
  158. vga {
  159. compatible = "vga-connector";
  160. port {
  161. vga_in: endpoint {
  162. remote-endpoint = <&adv7123_out>;
  163. };
  164. };
  165. };
  166. vga-encoder {
  167. compatible = "adi,adv7123";
  168. ports {
  169. #address-cells = <1>;
  170. #size-cells = <0>;
  171. port@0 {
  172. reg = <0>;
  173. adv7123_in: endpoint {
  174. remote-endpoint = <&du_out_rgb>;
  175. };
  176. };
  177. port@1 {
  178. reg = <1>;
  179. adv7123_out: endpoint {
  180. remote-endpoint = <&vga_in>;
  181. };
  182. };
  183. };
  184. };
  185. x12_clk: x12 {
  186. compatible = "fixed-clock";
  187. #clock-cells = <0>;
  188. clock-frequency = <24576000>;
  189. };
  190. /* External DU dot clocks */
  191. x21_clk: x21-clock {
  192. compatible = "fixed-clock";
  193. #clock-cells = <0>;
  194. clock-frequency = <33000000>;
  195. };
  196. x22_clk: x22-clock {
  197. compatible = "fixed-clock";
  198. #clock-cells = <0>;
  199. clock-frequency = <33000000>;
  200. };
  201. x23_clk: x23-clock {
  202. compatible = "fixed-clock";
  203. #clock-cells = <0>;
  204. clock-frequency = <25000000>;
  205. };
  206. };
  207. &audio_clk_a {
  208. clock-frequency = <22579200>;
  209. };
  210. &avb {
  211. pinctrl-0 = <&avb_pins>;
  212. pinctrl-names = "default";
  213. renesas,no-ether-link;
  214. phy-handle = <&phy0>;
  215. reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  216. status = "okay";
  217. phy0: ethernet-phy@0 {
  218. rxc-skew-ps = <1500>;
  219. reg = <0>;
  220. interrupt-parent = <&gpio2>;
  221. interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  222. };
  223. };
  224. &du {
  225. pinctrl-0 = <&du_pins>;
  226. pinctrl-names = "default";
  227. status = "okay";
  228. ports {
  229. port@0 {
  230. endpoint {
  231. remote-endpoint = <&adv7123_in>;
  232. };
  233. };
  234. };
  235. };
  236. &ehci0 {
  237. status = "okay";
  238. };
  239. &ehci1 {
  240. status = "okay";
  241. };
  242. &extalr_clk {
  243. clock-frequency = <32768>;
  244. };
  245. &hsusb {
  246. status = "okay";
  247. };
  248. &i2c2 {
  249. pinctrl-0 = <&i2c2_pins>;
  250. pinctrl-names = "default";
  251. status = "okay";
  252. clock-frequency = <100000>;
  253. ak4613: codec@10 {
  254. compatible = "asahi-kasei,ak4613";
  255. #sound-dai-cells = <0>;
  256. reg = <0x10>;
  257. clocks = <&rcar_sound 3>;
  258. asahi-kasei,in1-single-end;
  259. asahi-kasei,in2-single-end;
  260. asahi-kasei,out1-single-end;
  261. asahi-kasei,out2-single-end;
  262. asahi-kasei,out3-single-end;
  263. asahi-kasei,out4-single-end;
  264. asahi-kasei,out5-single-end;
  265. asahi-kasei,out6-single-end;
  266. };
  267. cs2000: clk_multiplier@4f {
  268. #clock-cells = <0>;
  269. compatible = "cirrus,cs2000-cp";
  270. reg = <0x4f>;
  271. clocks = <&audio_clkout>, <&x12_clk>;
  272. clock-names = "clk_in", "ref_clk";
  273. assigned-clocks = <&cs2000>;
  274. assigned-clock-rates = <24576000>; /* 1/1 divide */
  275. };
  276. };
  277. &i2c4 {
  278. status = "okay";
  279. csa_vdd: adc@7c {
  280. compatible = "maxim,max9611";
  281. reg = <0x7c>;
  282. shunt-resistor-micro-ohms = <5000>;
  283. };
  284. csa_dvfs: adc@7f {
  285. compatible = "maxim,max9611";
  286. reg = <0x7f>;
  287. shunt-resistor-micro-ohms = <5000>;
  288. };
  289. };
  290. &i2c_dvfs {
  291. status = "okay";
  292. };
  293. &ohci0 {
  294. status = "okay";
  295. };
  296. &ohci1 {
  297. status = "okay";
  298. };
  299. &pcie_bus_clk {
  300. clock-frequency = <100000000>;
  301. };
  302. &pciec0 {
  303. status = "okay";
  304. };
  305. &pciec1 {
  306. status = "okay";
  307. };
  308. &pfc {
  309. pinctrl-0 = <&scif_clk_pins>;
  310. pinctrl-names = "default";
  311. avb_pins: avb {
  312. mux {
  313. groups = "avb_link", "avb_phy_int", "avb_mdc",
  314. "avb_mii";
  315. function = "avb";
  316. };
  317. pins_mdc {
  318. groups = "avb_mdc";
  319. drive-strength = <24>;
  320. };
  321. pins_mii_tx {
  322. pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  323. "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  324. drive-strength = <12>;
  325. };
  326. };
  327. du_pins: du {
  328. groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
  329. function = "du";
  330. };
  331. i2c2_pins: i2c2 {
  332. groups = "i2c2_a";
  333. function = "i2c2";
  334. };
  335. pwm1_pins: pwm1 {
  336. groups = "pwm1_a";
  337. function = "pwm1";
  338. };
  339. scif1_pins: scif1 {
  340. groups = "scif1_data_a", "scif1_ctrl";
  341. function = "scif1";
  342. };
  343. scif2_pins: scif2 {
  344. groups = "scif2_data_a";
  345. function = "scif2";
  346. };
  347. scif_clk_pins: scif_clk {
  348. groups = "scif_clk_a";
  349. function = "scif_clk";
  350. };
  351. sdhi0_pins: sd0 {
  352. groups = "sdhi0_data4", "sdhi0_ctrl";
  353. function = "sdhi0";
  354. power-source = <3300>;
  355. };
  356. sdhi0_pins_uhs: sd0_uhs {
  357. groups = "sdhi0_data4", "sdhi0_ctrl";
  358. function = "sdhi0";
  359. power-source = <1800>;
  360. };
  361. sdhi2_pins: sd2 {
  362. groups = "sdhi2_data8", "sdhi2_ctrl";
  363. function = "sdhi2";
  364. power-source = <1800>;
  365. };
  366. sdhi2_pins_uhs: sd2_uhs {
  367. groups = "sdhi2_data8", "sdhi2_ctrl";
  368. function = "sdhi2";
  369. power-source = <1800>;
  370. };
  371. sdhi3_pins: sd3 {
  372. groups = "sdhi3_data4", "sdhi3_ctrl";
  373. function = "sdhi3";
  374. power-source = <3300>;
  375. };
  376. sdhi3_pins_uhs: sd3_uhs {
  377. groups = "sdhi3_data4", "sdhi3_ctrl";
  378. function = "sdhi3";
  379. power-source = <1800>;
  380. };
  381. sound_pins: sound {
  382. groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
  383. function = "ssi";
  384. };
  385. sound_clk_pins: sound_clk {
  386. groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
  387. "audio_clkout_a", "audio_clkout3_a";
  388. function = "audio_clk";
  389. };
  390. usb0_pins: usb0 {
  391. groups = "usb0";
  392. function = "usb0";
  393. };
  394. usb1_pins: usb1 {
  395. mux {
  396. groups = "usb1";
  397. function = "usb1";
  398. };
  399. ovc {
  400. pins = "GP_6_27";
  401. bias-pull-up;
  402. };
  403. pwen {
  404. pins = "GP_6_26";
  405. bias-pull-down;
  406. };
  407. };
  408. };
  409. &pwm1 {
  410. pinctrl-0 = <&pwm1_pins>;
  411. pinctrl-names = "default";
  412. status = "okay";
  413. };
  414. &rcar_sound {
  415. pinctrl-0 = <&sound_pins &sound_clk_pins>;
  416. pinctrl-names = "default";
  417. /* Single DAI */
  418. #sound-dai-cells = <0>;
  419. /* audio_clkout0/1/2/3 */
  420. #clock-cells = <1>;
  421. clock-frequency = <12288000 11289600>;
  422. status = "okay";
  423. /* update <audio_clk_b> to <cs2000> */
  424. clocks = <&cpg CPG_MOD 1005>,
  425. <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
  426. <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
  427. <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
  428. <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
  429. <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
  430. <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
  431. <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
  432. <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
  433. <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
  434. <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
  435. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  436. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  437. <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
  438. <&audio_clk_a>, <&cs2000>,
  439. <&audio_clk_c>,
  440. <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
  441. rcar_sound,dai {
  442. dai0 {
  443. playback = <&ssi0 &src0 &dvc0>;
  444. capture = <&ssi1 &src1 &dvc1>;
  445. };
  446. };
  447. };
  448. &scif1 {
  449. pinctrl-0 = <&scif1_pins>;
  450. pinctrl-names = "default";
  451. uart-has-rtscts;
  452. status = "okay";
  453. };
  454. &scif2 {
  455. pinctrl-0 = <&scif2_pins>;
  456. pinctrl-names = "default";
  457. status = "okay";
  458. };
  459. &scif_clk {
  460. clock-frequency = <14745600>;
  461. };
  462. &sdhi0 {
  463. pinctrl-0 = <&sdhi0_pins>;
  464. pinctrl-1 = <&sdhi0_pins_uhs>;
  465. pinctrl-names = "default", "state_uhs";
  466. vmmc-supply = <&vcc_sdhi0>;
  467. vqmmc-supply = <&vccq_sdhi0>;
  468. cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  469. wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
  470. bus-width = <4>;
  471. sd-uhs-sdr50;
  472. sd-uhs-sdr104;
  473. status = "okay";
  474. max-frequency = <208000000>;
  475. };
  476. &sdhi2 {
  477. /* used for on-board 8bit eMMC */
  478. pinctrl-0 = <&sdhi2_pins>;
  479. pinctrl-1 = <&sdhi2_pins_uhs>;
  480. pinctrl-names = "default", "state_uhs";
  481. vmmc-supply = <&reg_3p3v>;
  482. vqmmc-supply = <&reg_1p8v>;
  483. bus-width = <8>;
  484. mmc-ddr-1_8v;
  485. mmc-hs200-1_8v;
  486. non-removable;
  487. status = "okay";
  488. max-frequency = <200000000>;
  489. };
  490. &sdhi3 {
  491. pinctrl-0 = <&sdhi3_pins>;
  492. pinctrl-1 = <&sdhi3_pins_uhs>;
  493. pinctrl-names = "default", "state_uhs";
  494. vmmc-supply = <&vcc_sdhi3>;
  495. vqmmc-supply = <&vccq_sdhi3>;
  496. cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
  497. wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
  498. bus-width = <4>;
  499. sd-uhs-sdr50;
  500. sd-uhs-sdr104;
  501. status = "okay";
  502. max-frequency = <208000000>;
  503. };
  504. &ssi1 {
  505. shared-pin;
  506. };
  507. &usb2_phy0 {
  508. pinctrl-0 = <&usb0_pins>;
  509. pinctrl-names = "default";
  510. vbus-supply = <&vbus0_usb2>;
  511. status = "okay";
  512. };
  513. &usb2_phy1 {
  514. pinctrl-0 = <&usb1_pins>;
  515. pinctrl-names = "default";
  516. status = "okay";
  517. };
  518. &wdt0 {
  519. timeout-sec = <60>;
  520. status = "okay";
  521. };
  522. &xhci0 {
  523. status = "okay";
  524. };