.. |
base_addr_a10.h
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5a7152e4fd
ARM: socfpga: arria10: add base address map for Arria10
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%!s(int64=9) %!d(string=hai) anos |
base_addr_ac5.h
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871c24bc50
ARM: socfpga: rename the cyclone5 and arria5 base address file
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%!s(int64=9) %!d(string=hai) anos |
clock_manager.h
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93b4abd3a2
arm: socfpga: clock: Clean up pll_config.h
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%!s(int64=9) %!d(string=hai) anos |
dwmmc.h
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129adf5bf4
mmc: dw_mmc: Probe the MMC from OF
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%!s(int64=9) %!d(string=hai) anos |
fpga_manager.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |
freeze_controller.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |
gpio.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |
nic301.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |
reset_manager.h
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f2f3782ead
arm: socfpga: Define NAND reset bit
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%!s(int64=9) %!d(string=hai) anos |
scan_manager.h
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bd0f5a91f3
arm: socfpga: scan: Add code to get FPGA ID
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%!s(int64=9) %!d(string=hai) anos |
scu.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |
sdram.h
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042ff2d0fa
ddr: altera: sequencer: Wrap misc remaining macros
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%!s(int64=9) %!d(string=hai) anos |
system_manager.h
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a1684b6105
arm: socfpga: fix up a questionable macro for SDMMC
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%!s(int64=9) %!d(string=hai) anos |
timer.h
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30088b0997
ARM: socfpga: move SoC headers to mach-socfpga/include/mach
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%!s(int64=10) %!d(string=hai) anos |