fsp_common.c 2.1 KB

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  1. /*
  2. * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <asm/mrccache.h>
  10. #include <asm/post.h>
  11. #include <asm/processor.h>
  12. #include <asm/fsp/fsp_support.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. int checkcpu(void)
  15. {
  16. return 0;
  17. }
  18. int print_cpuinfo(void)
  19. {
  20. post_code(POST_CPU_INFO);
  21. return default_print_cpuinfo();
  22. }
  23. int fsp_init_phase_pci(void)
  24. {
  25. u32 status;
  26. /* call into FspNotify */
  27. debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
  28. status = fsp_notify(NULL, INIT_PHASE_PCI);
  29. if (status)
  30. debug("fail, error code %x\n", status);
  31. else
  32. debug("OK\n");
  33. return status ? -EPERM : 0;
  34. }
  35. void board_final_cleanup(void)
  36. {
  37. u32 status;
  38. /* call into FspNotify */
  39. debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
  40. status = fsp_notify(NULL, INIT_PHASE_BOOT);
  41. if (status)
  42. debug("fail, error code %x\n", status);
  43. else
  44. debug("OK\n");
  45. return;
  46. }
  47. static __maybe_unused void *fsp_prepare_mrc_cache(void)
  48. {
  49. struct mrc_data_container *cache;
  50. struct mrc_region entry;
  51. int ret;
  52. ret = mrccache_get_region(NULL, &entry);
  53. if (ret)
  54. return NULL;
  55. cache = mrccache_find_current(&entry);
  56. if (!cache)
  57. return NULL;
  58. debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
  59. cache->data, cache->data_size, cache->checksum);
  60. return cache->data;
  61. }
  62. int arch_fsp_init(void)
  63. {
  64. void *nvs;
  65. if (!gd->arch.hob_list) {
  66. #ifdef CONFIG_ENABLE_MRC_CACHE
  67. nvs = fsp_prepare_mrc_cache();
  68. #else
  69. nvs = NULL;
  70. #endif
  71. /*
  72. * The first time we enter here, call fsp_init().
  73. * Note the execution does not return to this function,
  74. * instead it jumps to fsp_continue().
  75. */
  76. fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
  77. } else {
  78. /*
  79. * The second time we enter here, adjust the size of malloc()
  80. * pool before relocation. Given gd->malloc_base was adjusted
  81. * after the call to board_init_f_init_reserve() in arch/x86/
  82. * cpu/start.S, we should fix up gd->malloc_limit here.
  83. */
  84. gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
  85. }
  86. return 0;
  87. }