i2c.h 23 KB

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  1. /*
  2. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  3. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  4. * Changes for multibus/multiadapter I2C support.
  5. *
  6. * (C) Copyright 2001
  7. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. *
  11. * The original I2C interface was
  12. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  13. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  14. * but has been changed substantially.
  15. */
  16. #ifndef _I2C_H_
  17. #define _I2C_H_
  18. /*
  19. * For now there are essentially two parts to this file - driver model
  20. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  21. * most recent). The plan is to migrate everything to driver model.
  22. * The driver model structures and API are separate as they are different
  23. * enough as to be incompatible for compilation purposes.
  24. */
  25. #ifdef CONFIG_DM_I2C
  26. enum dm_i2c_chip_flags {
  27. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  28. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  29. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  30. };
  31. /**
  32. * struct dm_i2c_chip - information about an i2c chip
  33. *
  34. * An I2C chip is a device on the I2C bus. It sits at a particular address
  35. * and normally supports 7-bit or 10-bit addressing.
  36. *
  37. * To obtain this structure, use dev_get_parentdata(dev) where dev is the
  38. * chip to examine.
  39. *
  40. * @chip_addr: Chip address on bus
  41. * @offset_len: Length of offset in bytes. A single byte offset can
  42. * represent up to 256 bytes. A value larger than 1 may be
  43. * needed for larger devices.
  44. * @flags: Flags for this chip (dm_i2c_chip_flags)
  45. * @emul: Emulator for this chip address (only used for emulation)
  46. */
  47. struct dm_i2c_chip {
  48. uint chip_addr;
  49. uint offset_len;
  50. uint flags;
  51. #ifdef CONFIG_SANDBOX
  52. struct udevice *emul;
  53. #endif
  54. };
  55. /**
  56. * struct dm_i2c_bus- information about an i2c bus
  57. *
  58. * An I2C bus contains 0 or more chips on it, each at its own address. The
  59. * bus can operate at different speeds (measured in Hz, typically 100KHz
  60. * or 400KHz).
  61. *
  62. * To obtain this structure, use bus->uclass_priv where bus is the I2C
  63. * bus udevice.
  64. *
  65. * @speed_hz: Bus speed in hertz (typically 100000)
  66. */
  67. struct dm_i2c_bus {
  68. int speed_hz;
  69. };
  70. /**
  71. * dm_i2c_read() - read bytes from an I2C chip
  72. *
  73. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  74. * can use i2c_get_chip(). To obtain a bus by bus number use
  75. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  76. *
  77. * To set the address length of a devce use i2c_set_addr_len(). It
  78. * defaults to 1.
  79. *
  80. * @dev: Chip to read from
  81. * @offset: Offset within chip to start reading
  82. * @buffer: Place to put data
  83. * @len: Number of bytes to read
  84. *
  85. * @return 0 on success, -ve on failure
  86. */
  87. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  88. /**
  89. * dm_i2c_write() - write bytes to an I2C chip
  90. *
  91. * See notes for dm_i2c_read() above.
  92. *
  93. * @dev: Chip to write to
  94. * @offset: Offset within chip to start writing
  95. * @buffer: Buffer containing data to write
  96. * @len: Number of bytes to write
  97. *
  98. * @return 0 on success, -ve on failure
  99. */
  100. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  101. int len);
  102. /**
  103. * dm_i2c_probe() - probe a particular chip address
  104. *
  105. * This can be useful to check for the existence of a chip on the bus.
  106. * It is typically implemented by writing the chip address to the bus
  107. * and checking that the chip replies with an ACK.
  108. *
  109. * @bus: Bus to probe
  110. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  111. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  112. * @devp: Returns the device found, or NULL if none
  113. * @return 0 if a chip was found at that address, -ve if not
  114. */
  115. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  116. struct udevice **devp);
  117. /**
  118. * i2c_set_bus_speed() - set the speed of a bus
  119. *
  120. * @bus: Bus to adjust
  121. * @speed: Requested speed in Hz
  122. * @return 0 if OK, -EINVAL for invalid values
  123. */
  124. int i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  125. /**
  126. * i2c_get_bus_speed() - get the speed of a bus
  127. *
  128. * @bus: Bus to check
  129. * @return speed of selected I2C bus in Hz, -ve on error
  130. */
  131. int i2c_get_bus_speed(struct udevice *bus);
  132. /**
  133. * i2c_set_chip_flags() - set flags for a chip
  134. *
  135. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  136. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  137. *
  138. * @dev: Chip to adjust
  139. * @flags: New flags
  140. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  141. */
  142. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  143. /**
  144. * i2c_get_chip_flags() - get flags for a chip
  145. *
  146. * @dev: Chip to check
  147. * @flagsp: Place to put flags
  148. * @return 0 if OK, other -ve value on error
  149. */
  150. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  151. /**
  152. * i2c_set_offset_len() - set the offset length for a chip
  153. *
  154. * The offset used to access a chip may be up to 4 bytes long. Typically it
  155. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  156. * registers. The default value is 1, but you can call this function to
  157. * change it.
  158. *
  159. * @offset_len: New offset length value (typically 1 or 2)
  160. */
  161. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  162. /**
  163. * i2c_deblock() - recover a bus that is in an unknown state
  164. *
  165. * See the deblock() method in 'struct dm_i2c_ops' for full information
  166. *
  167. * @bus: Bus to recover
  168. * @return 0 if OK, -ve on error
  169. */
  170. int i2c_deblock(struct udevice *bus);
  171. #ifdef CONFIG_DM_I2C_COMPAT
  172. /**
  173. * i2c_probe() - Compatibility function for driver model
  174. *
  175. * Calls dm_i2c_probe() on the current bus
  176. */
  177. int i2c_probe(uint8_t chip_addr);
  178. /**
  179. * i2c_read() - Compatibility function for driver model
  180. *
  181. * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
  182. * set to @addr. @alen must match the current setting for the device.
  183. */
  184. int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
  185. int len);
  186. /**
  187. * i2c_write() - Compatibility function for driver model
  188. *
  189. * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
  190. * set to @addr. @alen must match the current setting for the device.
  191. */
  192. int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
  193. int len);
  194. /**
  195. * i2c_get_bus_num_fdt() - Compatibility function for driver model
  196. *
  197. * @return the bus number associated with the given device tree node
  198. */
  199. int i2c_get_bus_num_fdt(int node);
  200. /**
  201. * i2c_get_bus_num() - Compatibility function for driver model
  202. *
  203. * @return the 'current' bus number
  204. */
  205. unsigned int i2c_get_bus_num(void);
  206. /**
  207. * i2c_set_bus_num(): Compatibility function for driver model
  208. *
  209. * Sets the 'current' bus
  210. */
  211. int i2c_set_bus_num(unsigned int bus);
  212. static inline void I2C_SET_BUS(unsigned int bus)
  213. {
  214. i2c_set_bus_num(bus);
  215. }
  216. static inline unsigned int I2C_GET_BUS(void)
  217. {
  218. return i2c_get_bus_num();
  219. }
  220. #endif
  221. /*
  222. * Not all of these flags are implemented in the U-Boot API
  223. */
  224. enum dm_i2c_msg_flags {
  225. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  226. I2C_M_RD = 0x0001, /* read data, from slave to master */
  227. I2C_M_STOP = 0x8000, /* send stop after this message */
  228. I2C_M_NOSTART = 0x4000, /* no start before this message */
  229. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  230. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  231. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  232. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  233. };
  234. /**
  235. * struct i2c_msg - an I2C message
  236. *
  237. * @addr: Slave address
  238. * @flags: Flags (see enum dm_i2c_msg_flags)
  239. * @len: Length of buffer in bytes, may be 0 for a probe
  240. * @buf: Buffer to send/receive, or NULL if no data
  241. */
  242. struct i2c_msg {
  243. uint addr;
  244. uint flags;
  245. uint len;
  246. u8 *buf;
  247. };
  248. /**
  249. * struct i2c_msg_list - a list of I2C messages
  250. *
  251. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  252. * appropriate in U-Boot.
  253. *
  254. * @msg: Pointer to i2c_msg array
  255. * @nmsgs: Number of elements in the array
  256. */
  257. struct i2c_msg_list {
  258. struct i2c_msg *msgs;
  259. uint nmsgs;
  260. };
  261. /**
  262. * struct dm_i2c_ops - driver operations for I2C uclass
  263. *
  264. * Drivers should support these operations unless otherwise noted. These
  265. * operations are intended to be used by uclass code, not directly from
  266. * other code.
  267. */
  268. struct dm_i2c_ops {
  269. /**
  270. * xfer() - transfer a list of I2C messages
  271. *
  272. * @bus: Bus to read from
  273. * @msg: List of messages to transfer
  274. * @nmsgs: Number of messages in the list
  275. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  276. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  277. * flags cannot be supported, other -ve value on some other error
  278. */
  279. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  280. /**
  281. * probe_chip() - probe for the presense of a chip address
  282. *
  283. * This function is optional. If omitted, the uclass will send a zero
  284. * length message instead.
  285. *
  286. * @bus: Bus to probe
  287. * @chip_addr: Chip address to probe
  288. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  289. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  290. * to default probem other -ve value on error
  291. */
  292. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  293. /**
  294. * set_bus_speed() - set the speed of a bus (optional)
  295. *
  296. * The bus speed value will be updated by the uclass if this function
  297. * does not return an error. This method is optional - if it is not
  298. * provided then the driver can read the speed from
  299. * bus->uclass_priv->speed_hz
  300. *
  301. * @bus: Bus to adjust
  302. * @speed: Requested speed in Hz
  303. * @return 0 if OK, -EINVAL for invalid values
  304. */
  305. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  306. /**
  307. * get_bus_speed() - get the speed of a bus (optional)
  308. *
  309. * Normally this can be provided by the uclass, but if you want your
  310. * driver to check the bus speed by looking at the hardware, you can
  311. * implement that here. This method is optional. This method would
  312. * normally be expected to return bus->uclass_priv->speed_hz.
  313. *
  314. * @bus: Bus to check
  315. * @return speed of selected I2C bus in Hz, -ve on error
  316. */
  317. int (*get_bus_speed)(struct udevice *bus);
  318. /**
  319. * set_flags() - set the flags for a chip (optional)
  320. *
  321. * This is generally implemented by the uclass, but drivers can
  322. * check the value to ensure that unsupported options are not used.
  323. * This method is optional. If provided, this method will always be
  324. * called when the flags change.
  325. *
  326. * @dev: Chip to adjust
  327. * @flags: New flags value
  328. * @return 0 if OK, -EINVAL if value is unsupported
  329. */
  330. int (*set_flags)(struct udevice *dev, uint flags);
  331. /**
  332. * deblock() - recover a bus that is in an unknown state
  333. *
  334. * I2C is a synchronous protocol and resets of the processor in the
  335. * middle of an access can block the I2C Bus until a powerdown of
  336. * the full unit is done. This is because slaves can be stuck
  337. * waiting for addition bus transitions for a transaction that will
  338. * never complete. Resetting the I2C master does not help. The only
  339. * way is to force the bus through a series of transitions to make
  340. * sure that all slaves are done with the transaction. This method
  341. * performs this 'deblocking' if support by the driver.
  342. *
  343. * This method is optional.
  344. */
  345. int (*deblock)(struct udevice *bus);
  346. };
  347. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  348. /**
  349. * i2c_get_chip() - get a device to use to access a chip on a bus
  350. *
  351. * This returns the device for the given chip address. The device can then
  352. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  353. *
  354. * @bus: Bus to examine
  355. * @chip_addr: Chip address for the new device
  356. * @devp: Returns pointer to new device if found or -ENODEV if not
  357. * found
  358. */
  359. int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp);
  360. /**
  361. * i2c_get_chip() - get a device to use to access a chip on a bus number
  362. *
  363. * This returns the device for the given chip address on a particular bus
  364. * number.
  365. *
  366. * @busnum: Bus number to examine
  367. * @chip_addr: Chip address for the new device
  368. * @devp: Returns pointer to new device if found or -ENODEV if not
  369. * found
  370. */
  371. int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp);
  372. /**
  373. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  374. *
  375. * This decodes the chip address from a device tree node and puts it into
  376. * its dm_i2c_chip structure. This should be called in your driver's
  377. * ofdata_to_platdata() method.
  378. *
  379. * @blob: Device tree blob
  380. * @node: Node offset to read from
  381. * @spi: Place to put the decoded information
  382. */
  383. int i2c_chip_ofdata_to_platdata(const void *blob, int node,
  384. struct dm_i2c_chip *chip);
  385. #endif
  386. #ifndef CONFIG_DM_I2C
  387. /*
  388. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  389. *
  390. * The implementation MUST NOT use static or global variables if the
  391. * I2C routines are used to read SDRAM configuration information
  392. * because this is done before the memories are initialized. Limited
  393. * use of stack-based variables are OK (the initial stack size is
  394. * limited).
  395. *
  396. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  397. */
  398. /*
  399. * Configuration items.
  400. */
  401. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  402. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  403. /* no muxes used bus = i2c adapters */
  404. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  405. #define CONFIG_SYS_I2C_MAX_HOPS 0
  406. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  407. #else
  408. /* we use i2c muxes */
  409. #undef CONFIG_SYS_I2C_DIRECT_BUS
  410. #endif
  411. /* define the I2C bus number for RTC and DTT if not already done */
  412. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  413. #define CONFIG_SYS_RTC_BUS_NUM 0
  414. #endif
  415. #if !defined(CONFIG_SYS_DTT_BUS_NUM)
  416. #define CONFIG_SYS_DTT_BUS_NUM 0
  417. #endif
  418. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  419. #define CONFIG_SYS_SPD_BUS_NUM 0
  420. #endif
  421. struct i2c_adapter {
  422. void (*init)(struct i2c_adapter *adap, int speed,
  423. int slaveaddr);
  424. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  425. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  426. uint addr, int alen, uint8_t *buffer,
  427. int len);
  428. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  429. uint addr, int alen, uint8_t *buffer,
  430. int len);
  431. uint (*set_bus_speed)(struct i2c_adapter *adap,
  432. uint speed);
  433. int speed;
  434. int waitdelay;
  435. int slaveaddr;
  436. int init_done;
  437. int hwadapnr;
  438. char *name;
  439. };
  440. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  441. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  442. { \
  443. .init = _init, \
  444. .probe = _probe, \
  445. .read = _read, \
  446. .write = _write, \
  447. .set_bus_speed = _set_speed, \
  448. .speed = _speed, \
  449. .slaveaddr = _slaveaddr, \
  450. .init_done = 0, \
  451. .hwadapnr = _hwadapnr, \
  452. .name = #_name \
  453. };
  454. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  455. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  456. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  457. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  458. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  459. struct i2c_adapter *i2c_get_adapter(int index);
  460. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  461. struct i2c_mux {
  462. int id;
  463. char name[16];
  464. };
  465. struct i2c_next_hop {
  466. struct i2c_mux mux;
  467. uint8_t chip;
  468. uint8_t channel;
  469. };
  470. struct i2c_bus_hose {
  471. int adapter;
  472. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  473. };
  474. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  475. extern struct i2c_bus_hose i2c_bus[];
  476. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  477. #else
  478. #define I2C_ADAPTER(bus) bus
  479. #endif
  480. #define I2C_BUS gd->cur_i2c_bus
  481. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  482. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  483. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  484. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  485. #define I2C_MUX_PCA9540_ID 1
  486. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  487. #define I2C_MUX_PCA9542_ID 2
  488. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  489. #define I2C_MUX_PCA9544_ID 3
  490. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  491. #define I2C_MUX_PCA9547_ID 4
  492. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  493. #define I2C_MUX_PCA9548_ID 5
  494. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  495. #endif
  496. #ifndef I2C_SOFT_DECLARATIONS
  497. # if defined(CONFIG_MPC8260)
  498. # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
  499. # elif defined(CONFIG_8xx)
  500. # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  501. # elif (defined(CONFIG_AT91RM9200) || \
  502. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  503. defined(CONFIG_AT91SAM9263))
  504. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  505. # else
  506. # define I2C_SOFT_DECLARATIONS
  507. # endif
  508. #endif
  509. #ifdef CONFIG_8xx
  510. /* Set default value for the I2C bus speed on 8xx. In the
  511. * future, we'll define these in all 8xx board config files.
  512. */
  513. #ifndef CONFIG_SYS_I2C_SPEED
  514. #define CONFIG_SYS_I2C_SPEED 50000
  515. #endif
  516. #endif
  517. /*
  518. * Many boards/controllers/drivers don't support an I2C slave interface so
  519. * provide a default slave address for them for use in common code. A real
  520. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  521. * support a slave interface.
  522. */
  523. #ifndef CONFIG_SYS_I2C_SLAVE
  524. #define CONFIG_SYS_I2C_SLAVE 0xfe
  525. #endif
  526. /*
  527. * Initialization, must be called once on start up, may be called
  528. * repeatedly to change the speed and slave addresses.
  529. */
  530. void i2c_init(int speed, int slaveaddr);
  531. void i2c_init_board(void);
  532. #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
  533. void i2c_board_late_init(void);
  534. #endif
  535. #ifdef CONFIG_SYS_I2C
  536. /*
  537. * i2c_get_bus_num:
  538. *
  539. * Returns index of currently active I2C bus. Zero-based.
  540. */
  541. unsigned int i2c_get_bus_num(void);
  542. /*
  543. * i2c_set_bus_num:
  544. *
  545. * Change the active I2C bus. Subsequent read/write calls will
  546. * go to this one.
  547. *
  548. * bus - bus index, zero based
  549. *
  550. * Returns: 0 on success, not 0 on failure
  551. *
  552. */
  553. int i2c_set_bus_num(unsigned int bus);
  554. /*
  555. * i2c_init_all():
  556. *
  557. * Initializes all I2C adapters in the system. All i2c_adap structures must
  558. * be initialized beforehead with function pointers and data, including
  559. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  560. */
  561. void i2c_init_all(void);
  562. /*
  563. * Probe the given I2C chip address. Returns 0 if a chip responded,
  564. * not 0 on failure.
  565. */
  566. int i2c_probe(uint8_t chip);
  567. /*
  568. * Read/Write interface:
  569. * chip: I2C chip address, range 0..127
  570. * addr: Memory (register) address within the chip
  571. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  572. * memories, 0 for register type devices with only one
  573. * register)
  574. * buffer: Where to read/write the data
  575. * len: How many bytes to read/write
  576. *
  577. * Returns: 0 on success, not 0 on failure
  578. */
  579. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  580. uint8_t *buffer, int len);
  581. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  582. uint8_t *buffer, int len);
  583. /*
  584. * Utility routines to read/write registers.
  585. */
  586. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  587. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  588. /*
  589. * i2c_set_bus_speed:
  590. *
  591. * Change the speed of the active I2C bus
  592. *
  593. * speed - bus speed in Hz
  594. *
  595. * Returns: new bus speed
  596. *
  597. */
  598. unsigned int i2c_set_bus_speed(unsigned int speed);
  599. /*
  600. * i2c_get_bus_speed:
  601. *
  602. * Returns speed of currently active I2C bus in Hz
  603. */
  604. unsigned int i2c_get_bus_speed(void);
  605. /*
  606. * i2c_reloc_fixup:
  607. *
  608. * Adjusts I2C pointers after U-Boot is relocated to DRAM
  609. */
  610. void i2c_reloc_fixup(void);
  611. #if defined(CONFIG_SYS_I2C_SOFT)
  612. void i2c_soft_init(void);
  613. void i2c_soft_active(void);
  614. void i2c_soft_tristate(void);
  615. int i2c_soft_read(void);
  616. void i2c_soft_sda(int bit);
  617. void i2c_soft_scl(int bit);
  618. void i2c_soft_delay(void);
  619. #endif
  620. #else
  621. /*
  622. * Probe the given I2C chip address. Returns 0 if a chip responded,
  623. * not 0 on failure.
  624. */
  625. int i2c_probe(uchar chip);
  626. /*
  627. * Read/Write interface:
  628. * chip: I2C chip address, range 0..127
  629. * addr: Memory (register) address within the chip
  630. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  631. * memories, 0 for register type devices with only one
  632. * register)
  633. * buffer: Where to read/write the data
  634. * len: How many bytes to read/write
  635. *
  636. * Returns: 0 on success, not 0 on failure
  637. */
  638. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  639. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  640. /*
  641. * Utility routines to read/write registers.
  642. */
  643. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  644. {
  645. u8 buf;
  646. #ifdef CONFIG_8xx
  647. /* MPC8xx needs this. Maybe one day we can get rid of it. */
  648. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  649. #endif
  650. #ifdef DEBUG
  651. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  652. #endif
  653. i2c_read(addr, reg, 1, &buf, 1);
  654. return buf;
  655. }
  656. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  657. {
  658. #ifdef CONFIG_8xx
  659. /* MPC8xx needs this. Maybe one day we can get rid of it. */
  660. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  661. #endif
  662. #ifdef DEBUG
  663. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  664. __func__, addr, reg, val);
  665. #endif
  666. i2c_write(addr, reg, 1, &val, 1);
  667. }
  668. /*
  669. * Functions for setting the current I2C bus and its speed
  670. */
  671. /*
  672. * i2c_set_bus_num:
  673. *
  674. * Change the active I2C bus. Subsequent read/write calls will
  675. * go to this one.
  676. *
  677. * bus - bus index, zero based
  678. *
  679. * Returns: 0 on success, not 0 on failure
  680. *
  681. */
  682. int i2c_set_bus_num(unsigned int bus);
  683. /*
  684. * i2c_get_bus_num:
  685. *
  686. * Returns index of currently active I2C bus. Zero-based.
  687. */
  688. unsigned int i2c_get_bus_num(void);
  689. /*
  690. * i2c_set_bus_speed:
  691. *
  692. * Change the speed of the active I2C bus
  693. *
  694. * speed - bus speed in Hz
  695. *
  696. * Returns: 0 on success, not 0 on failure
  697. *
  698. */
  699. int i2c_set_bus_speed(unsigned int);
  700. /*
  701. * i2c_get_bus_speed:
  702. *
  703. * Returns speed of currently active I2C bus in Hz
  704. */
  705. unsigned int i2c_get_bus_speed(void);
  706. #endif /* CONFIG_SYS_I2C */
  707. /*
  708. * only for backwardcompatibility, should go away if we switched
  709. * completely to new multibus support.
  710. */
  711. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  712. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  713. # define CONFIG_SYS_MAX_I2C_BUS 2
  714. # endif
  715. # define I2C_MULTI_BUS 1
  716. #else
  717. # define CONFIG_SYS_MAX_I2C_BUS 1
  718. # define I2C_MULTI_BUS 0
  719. #endif
  720. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  721. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  722. static inline unsigned int I2C_GET_BUS(void)
  723. {
  724. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  725. }
  726. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  727. static inline void I2C_SET_BUS(unsigned int bus)
  728. {
  729. if (I2C_MULTI_BUS)
  730. i2c_set_bus_num(bus);
  731. }
  732. /* Multi I2C definitions */
  733. enum {
  734. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  735. I2C_8, I2C_9, I2C_10,
  736. };
  737. /* Multi I2C busses handling */
  738. #ifdef CONFIG_SOFT_I2C_MULTI_BUS
  739. extern int get_multi_scl_pin(void);
  740. extern int get_multi_sda_pin(void);
  741. extern int multi_i2c_init(void);
  742. #endif
  743. /**
  744. * Get FDT values for i2c bus.
  745. *
  746. * @param blob Device tree blbo
  747. * @return the number of I2C bus
  748. */
  749. void board_i2c_init(const void *blob);
  750. /**
  751. * Find the I2C bus number by given a FDT I2C node.
  752. *
  753. * @param blob Device tree blbo
  754. * @param node FDT I2C node to find
  755. * @return the number of I2C bus (zero based), or -1 on error
  756. */
  757. int i2c_get_bus_num_fdt(int node);
  758. /**
  759. * Reset the I2C bus represented by the given a FDT I2C node.
  760. *
  761. * @param blob Device tree blbo
  762. * @param node FDT I2C node to find
  763. * @return 0 if port was reset, -1 if not found
  764. */
  765. int i2c_reset_port_fdt(const void *blob, int node);
  766. #endif /* !CONFIG_DM_I2C */
  767. #endif /* _I2C_H_ */