init.c 9.5 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/fsl_serdes.h>
  9. #include "fm.h"
  10. struct fm_eth_info fm_info[] = {
  11. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
  12. FM_DTSEC_INFO_INITIALIZER(1, 1),
  13. #endif
  14. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
  15. FM_DTSEC_INFO_INITIALIZER(1, 2),
  16. #endif
  17. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
  18. FM_DTSEC_INFO_INITIALIZER(1, 3),
  19. #endif
  20. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
  21. FM_DTSEC_INFO_INITIALIZER(1, 4),
  22. #endif
  23. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
  24. FM_DTSEC_INFO_INITIALIZER(1, 5),
  25. #endif
  26. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
  27. FM_DTSEC_INFO_INITIALIZER(1, 6),
  28. #endif
  29. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
  30. FM_DTSEC_INFO_INITIALIZER(1, 9),
  31. #endif
  32. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
  33. FM_DTSEC_INFO_INITIALIZER(1, 10),
  34. #endif
  35. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
  36. FM_DTSEC_INFO_INITIALIZER(2, 1),
  37. #endif
  38. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
  39. FM_DTSEC_INFO_INITIALIZER(2, 2),
  40. #endif
  41. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
  42. FM_DTSEC_INFO_INITIALIZER(2, 3),
  43. #endif
  44. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
  45. FM_DTSEC_INFO_INITIALIZER(2, 4),
  46. #endif
  47. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
  48. FM_DTSEC_INFO_INITIALIZER(2, 5),
  49. #endif
  50. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
  51. FM_DTSEC_INFO_INITIALIZER(2, 6),
  52. #endif
  53. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
  54. FM_DTSEC_INFO_INITIALIZER(2, 9),
  55. #endif
  56. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
  57. FM_DTSEC_INFO_INITIALIZER(2, 10),
  58. #endif
  59. #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
  60. FM_TGEC_INFO_INITIALIZER(1, 1),
  61. #endif
  62. #if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
  63. FM_TGEC_INFO_INITIALIZER(1, 2),
  64. #endif
  65. #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
  66. FM_TGEC_INFO_INITIALIZER2(1, 3),
  67. #endif
  68. #if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
  69. FM_TGEC_INFO_INITIALIZER2(1, 4),
  70. #endif
  71. #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
  72. FM_TGEC_INFO_INITIALIZER(2, 1),
  73. #endif
  74. #if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
  75. FM_TGEC_INFO_INITIALIZER(2, 2),
  76. #endif
  77. };
  78. int fm_standard_init(bd_t *bis)
  79. {
  80. int i;
  81. struct ccsr_fman *reg;
  82. reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
  83. if (fm_init_common(0, reg))
  84. return 0;
  85. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  86. if ((fm_info[i].enabled) && (fm_info[i].index == 1))
  87. fm_eth_initialize(reg, &fm_info[i]);
  88. }
  89. #if (CONFIG_SYS_NUM_FMAN == 2)
  90. reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
  91. if (fm_init_common(1, reg))
  92. return 0;
  93. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  94. if ((fm_info[i].enabled) && (fm_info[i].index == 2))
  95. fm_eth_initialize(reg, &fm_info[i]);
  96. }
  97. #endif
  98. return 1;
  99. }
  100. /* simple linear search to map from port to array index */
  101. static int fm_port_to_index(enum fm_port port)
  102. {
  103. int i;
  104. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  105. if (fm_info[i].port == port)
  106. return i;
  107. }
  108. return -1;
  109. }
  110. /*
  111. * Determine if an interface is actually active based on HW config
  112. * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
  113. * the interface is not active based on HW cfg of the SoC
  114. */
  115. void fman_enet_init(void)
  116. {
  117. int i;
  118. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  119. phy_interface_t enet_if;
  120. enet_if = fman_port_enet_if(fm_info[i].port);
  121. if (enet_if != PHY_INTERFACE_MODE_NONE) {
  122. fm_info[i].enabled = 1;
  123. fm_info[i].enet_if = enet_if;
  124. } else {
  125. fm_info[i].enabled = 0;
  126. }
  127. }
  128. return ;
  129. }
  130. void fm_disable_port(enum fm_port port)
  131. {
  132. int i = fm_port_to_index(port);
  133. fm_info[i].enabled = 0;
  134. fman_disable_port(port);
  135. }
  136. void fm_enable_port(enum fm_port port)
  137. {
  138. int i = fm_port_to_index(port);
  139. fm_info[i].enabled = 1;
  140. fman_enable_port(port);
  141. }
  142. void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
  143. {
  144. int i = fm_port_to_index(port);
  145. if (i == -1)
  146. return;
  147. fm_info[i].bus = bus;
  148. }
  149. void fm_info_set_phy_address(enum fm_port port, int address)
  150. {
  151. int i = fm_port_to_index(port);
  152. if (i == -1)
  153. return;
  154. fm_info[i].phy_addr = address;
  155. }
  156. /*
  157. * Returns the PHY address for a given Fman port
  158. *
  159. * The port must be set via a prior call to fm_info_set_phy_address().
  160. * A negative error code is returned if the port is invalid.
  161. */
  162. int fm_info_get_phy_address(enum fm_port port)
  163. {
  164. int i = fm_port_to_index(port);
  165. if (i == -1)
  166. return -1;
  167. return fm_info[i].phy_addr;
  168. }
  169. /*
  170. * Returns the type of the data interface between the given MAC and its PHY.
  171. * This is typically determined by the RCW.
  172. */
  173. phy_interface_t fm_info_get_enet_if(enum fm_port port)
  174. {
  175. int i = fm_port_to_index(port);
  176. if (i == -1)
  177. return PHY_INTERFACE_MODE_NONE;
  178. if (fm_info[i].enabled)
  179. return fm_info[i].enet_if;
  180. return PHY_INTERFACE_MODE_NONE;
  181. }
  182. static void
  183. __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
  184. enum fm_port port, int offset)
  185. {
  186. return ;
  187. }
  188. void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
  189. enum fm_port port, int offset)
  190. __attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
  191. static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
  192. {
  193. int off;
  194. uint32_t ph;
  195. phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
  196. u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
  197. CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
  198. off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
  199. if (info->enabled) {
  200. fdt_fixup_phy_connection(blob, off, info->enet_if);
  201. board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
  202. return ;
  203. }
  204. #ifdef CONFIG_SYS_FMAN_V3
  205. /*
  206. * Physically FM1_DTSEC9 and FM1_10GEC1 use the same dual-role MAC, when
  207. * FM1_10GEC1 is enabled and FM1_DTSEC9 is disabled, ensure that the
  208. * dual-role MAC is not disabled, ditto for other dual-role MACs.
  209. */
  210. if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
  211. ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
  212. ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
  213. ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
  214. ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) ||
  215. ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) ||
  216. ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
  217. ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2)))
  218. #if (CONFIG_SYS_NUM_FMAN == 2)
  219. ||
  220. ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) ||
  221. ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) ||
  222. ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) ||
  223. ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
  224. #endif
  225. )
  226. return;
  227. #endif
  228. /* board code might have caused offset to change */
  229. off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
  230. /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
  231. if (paddr != dtsec1_addr)
  232. fdt_status_disabled(blob, off); /* disable the MAC node */
  233. /* disable the fsl,dpa-ethernet node that points to the MAC */
  234. ph = fdt_get_phandle(blob, off);
  235. do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
  236. "status", "disabled", strlen("disabled") + 1, 1);
  237. }
  238. #ifdef CONFIG_SYS_FMAN_V3
  239. static int ft_fixup_xgec(void *blob, struct fm_eth_info *info)
  240. {
  241. int off, i, ci;
  242. #define FM1_10GEC3_RX_PORT_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x488000)
  243. #define FM1_10GEC3_TX_PORT_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x4a8000)
  244. #define FM1_10GEC3_MAC_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x4e0000)
  245. if ((info->port == FM1_10GEC3) || (info->port == FM1_10GEC4)) {
  246. ci = (info->port == FM1_10GEC3) ? 2 : 3;
  247. i = (info->port == FM1_10GEC3) ? 0 : 1;
  248. off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-port-1g-rx",
  249. FM1_10GEC3_RX_PORT_ADDR +
  250. i * 0x1000);
  251. if (off > 0) {
  252. fdt_setprop(blob, off, "cell-index", &ci, sizeof(int));
  253. fdt_setprop(blob, off, "compatible",
  254. "fsl,fman-port-10g-rx", 20);
  255. } else {
  256. goto err;
  257. }
  258. off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-port-1g-tx",
  259. FM1_10GEC3_TX_PORT_ADDR +
  260. i * 0x1000);
  261. if (off > 0) {
  262. fdt_setprop(blob, off, "cell-index", &ci, sizeof(int));
  263. fdt_setprop(blob, off, "compatible",
  264. "fsl,fman-port-10g-tx", 20);
  265. } else {
  266. goto err;
  267. }
  268. off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-memac",
  269. FM1_10GEC3_MAC_ADDR +
  270. i * 0x2000);
  271. if (off > 0)
  272. fdt_setprop(blob, off, "cell-index", &ci, sizeof(int));
  273. else
  274. goto err;
  275. }
  276. return 0;
  277. err:
  278. printf("WARNING: Fail to find the node\n");
  279. return -1;
  280. }
  281. #endif
  282. void fdt_fixup_fman_ethernet(void *blob)
  283. {
  284. int i;
  285. #ifdef CONFIG_SYS_FMAN_V3
  286. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  287. ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
  288. ft_fixup_xgec(blob, &fm_info[i]);
  289. }
  290. #else
  291. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  292. if (fm_info[i].type == FM_ETH_1G_E)
  293. ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
  294. else
  295. ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
  296. }
  297. #endif
  298. }
  299. /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
  300. *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
  301. *then set the correct PHY address
  302. */
  303. void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
  304. unsigned int port_num, int phy_base_addr)
  305. {
  306. unsigned int regnum = 0;
  307. int qsgmii;
  308. int i;
  309. int phy_real_addr;
  310. qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
  311. if (!qsgmii)
  312. return;
  313. for (i = base_port; i < base_port + port_num; i++) {
  314. if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
  315. phy_real_addr = phy_base_addr + i - base_port;
  316. fm_info_set_phy_address(i, phy_real_addr);
  317. }
  318. }
  319. }
  320. /*to check whether qsgmii riser card is used*/
  321. int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
  322. unsigned int port_num, unsigned regnum)
  323. {
  324. int i;
  325. int val;
  326. if (!bus)
  327. return 0;
  328. for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
  329. val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
  330. if (val != MIIM_TIMEOUT)
  331. return 1;
  332. }
  333. return 0;
  334. }