sbc-proxstream2.c 1.2 KB

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  1. /*
  2. * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <linux/io.h>
  7. #include "../init.h"
  8. #include "../sg-regs.h"
  9. #include "sbc-regs.h"
  10. int proxstream2_sbc_init(const struct uniphier_board_data *bd)
  11. {
  12. /* necessary for ROM boot ?? */
  13. /* system bus output enable */
  14. writel(0x17, PC0CTRL);
  15. /*
  16. * Only CS1 is connected to support card.
  17. * BKSZ[1:0] should be set to "01".
  18. */
  19. writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  20. writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  21. writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  22. writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  23. if (boot_is_swapped()) {
  24. /*
  25. * Boot Swap On: boot from external NOR/SRAM
  26. * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  27. *
  28. * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  29. * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  30. */
  31. writel(0x0000bc01, SBBASE0);
  32. } else {
  33. /*
  34. * Boot Swap Off: boot from mask ROM
  35. * 0x40000000-0x41ffffff: mask ROM
  36. * 0x42000000-0x43efffff: memory bank (31MB)
  37. * 0x43f00000-0x43ffffff: peripherals (1MB)
  38. */
  39. writel(0x0000be01, SBBASE0); /* dummy */
  40. writel(0x0200be01, SBBASE1);
  41. }
  42. return 0;
  43. }