at91sam9rl_devices.c 2.8 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/at91_common.h>
  11. #include <asm/arch/clk.h>
  12. #include <asm/arch/gpio.h>
  13. /*
  14. * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  15. * peripheral pins. Good to have if hardware is soldered optionally
  16. * or in case of SPI no slave is selected. Avoid lines to float
  17. * needlessly. Use a short local PUP define.
  18. *
  19. * Due to errata "TXD floats when CTS is inactive" pullups are always
  20. * on for TXD pins.
  21. */
  22. #ifdef CONFIG_AT91_GPIO_PULLUP
  23. # define PUP CONFIG_AT91_GPIO_PULLUP
  24. #else
  25. # define PUP 0
  26. #endif
  27. void at91_serial0_hw_init(void)
  28. {
  29. at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
  30. at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
  31. at91_periph_clk_enable(ATMEL_ID_USART0);
  32. }
  33. void at91_serial1_hw_init(void)
  34. {
  35. at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
  36. at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
  37. at91_periph_clk_enable(ATMEL_ID_USART1);
  38. }
  39. void at91_serial2_hw_init(void)
  40. {
  41. at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
  42. at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
  43. at91_periph_clk_enable(ATMEL_ID_USART2);
  44. }
  45. void at91_seriald_hw_init(void)
  46. {
  47. at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
  48. at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
  49. at91_periph_clk_enable(ATMEL_ID_SYS);
  50. }
  51. #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  52. void at91_spi0_hw_init(unsigned long cs_mask)
  53. {
  54. at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
  55. at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
  56. at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
  57. at91_periph_clk_enable(ATMEL_ID_SPI);
  58. if (cs_mask & (1 << 0)) {
  59. at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
  60. }
  61. if (cs_mask & (1 << 1)) {
  62. at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
  63. }
  64. if (cs_mask & (1 << 2)) {
  65. at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
  66. }
  67. if (cs_mask & (1 << 3)) {
  68. at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
  69. }
  70. if (cs_mask & (1 << 4)) {
  71. at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
  72. }
  73. if (cs_mask & (1 << 5)) {
  74. at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
  75. }
  76. if (cs_mask & (1 << 6)) {
  77. at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
  78. }
  79. if (cs_mask & (1 << 7)) {
  80. at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
  81. }
  82. }
  83. #endif
  84. #ifdef CONFIG_GENERIC_ATMEL_MCI
  85. void at91_mci_hw_init(void)
  86. {
  87. at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* MCI CLK */
  88. at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* MCI CDA */
  89. at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* MCI DA0 */
  90. at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* MCI DA1 */
  91. at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* MCI DA2 */
  92. at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* MCI DA3 */
  93. at91_periph_clk_enable(ATMEL_ID_MCI);
  94. }
  95. #endif