tegra20-whistler.dts 1.2 KB

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  1. /dts-v1/;
  2. #include "tegra20.dtsi"
  3. / {
  4. model = "NVIDIA Tegra20 Whistler evaluation board";
  5. compatible = "nvidia,whistler", "nvidia,tegra20";
  6. chosen {
  7. stdout-path = &uarta;
  8. };
  9. aliases {
  10. i2c0 = "/i2c@7000d000";
  11. usb0 = "/usb@c5008000";
  12. sdhci0 = "/sdhci@c8000600";
  13. sdhci1 = "/sdhci@c8000400";
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = < 0x00000000 0x20000000 >;
  18. };
  19. serial@70006000 {
  20. clock-frequency = < 216000000 >;
  21. };
  22. i2c@7000d000 {
  23. status = "okay";
  24. clock-frequency = <100000>;
  25. pmic@3c {
  26. compatible = "maxim,max8907b";
  27. reg = <0x3c>;
  28. clk_32k: clock {
  29. compatible = "fixed-clock";
  30. /*
  31. * leave out for now due to CPP:
  32. * #clock-cells = <0>;
  33. */
  34. clock-frequency = <32768>;
  35. };
  36. };
  37. };
  38. usb@c5008000 {
  39. status = "okay";
  40. };
  41. sdhci@c8000400 {
  42. status = "okay";
  43. wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
  44. bus-width = <8>;
  45. };
  46. sdhci@c8000600 {
  47. status = "okay";
  48. bus-width = <8>;
  49. };
  50. clocks {
  51. compatible = "simple-bus";
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. clk32k_in: clock@0 {
  55. compatible = "fixed-clock";
  56. reg=<0>;
  57. #clock-cells = <0>;
  58. clock-frequency = <32768>;
  59. };
  60. };
  61. };