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  1. /*
  2. * armboot - Startup Code for ARM720 CPU-core
  3. *
  4. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  5. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include "config.h"
  26. #include "version.h"
  27. /*
  28. *************************************************************************
  29. *
  30. * Jump vector table as in table 3.1 in [1]
  31. *
  32. *************************************************************************
  33. */
  34. .globl _start
  35. _start: b reset
  36. ldr pc, _undefined_instruction
  37. ldr pc, _software_interrupt
  38. ldr pc, _prefetch_abort
  39. ldr pc, _data_abort
  40. ldr pc, _not_used
  41. ldr pc, _irq
  42. ldr pc, _fiq
  43. _undefined_instruction: .word undefined_instruction
  44. _software_interrupt: .word software_interrupt
  45. _prefetch_abort: .word prefetch_abort
  46. _data_abort: .word data_abort
  47. _not_used: .word not_used
  48. _irq: .word irq
  49. _fiq: .word fiq
  50. .balignl 16,0xdeadbeef
  51. /*
  52. *************************************************************************
  53. *
  54. * Startup Code (reset vector)
  55. *
  56. * do important init only if we don't start from memory!
  57. * relocate armboot to ram
  58. * setup stack
  59. * jump to second stage
  60. *
  61. *************************************************************************
  62. */
  63. _TEXT_BASE:
  64. .word TEXT_BASE
  65. .globl _armboot_start
  66. _armboot_start:
  67. .word _start
  68. /*
  69. * These are defined in the board-specific linker script.
  70. */
  71. .globl _bss_start
  72. _bss_start:
  73. .word __bss_start
  74. .globl _bss_end
  75. _bss_end:
  76. .word _end
  77. #ifdef CONFIG_USE_IRQ
  78. /* IRQ stack memory (calculated at run-time) */
  79. .globl IRQ_STACK_START
  80. IRQ_STACK_START:
  81. .word 0x0badc0de
  82. /* IRQ stack memory (calculated at run-time) */
  83. .globl FIQ_STACK_START
  84. FIQ_STACK_START:
  85. .word 0x0badc0de
  86. #endif
  87. /*
  88. * the actual reset code
  89. */
  90. reset:
  91. /*
  92. * set the cpu to SVC32 mode
  93. */
  94. mrs r0,cpsr
  95. bic r0,r0,#0x1f
  96. orr r0,r0,#0x13
  97. msr cpsr,r0
  98. /*
  99. * relocate exeception table
  100. */
  101. ldr r0, =_start
  102. ldr r1, =0x0
  103. mov r2, #16
  104. copyex:
  105. subs r2, r2, #1
  106. ldr r3, [r0], #4
  107. str r3, [r1], #4
  108. bne copyex
  109. /*
  110. * we do sys-critical inits only at reboot,
  111. * not when booting from ram!
  112. */
  113. #ifdef CONFIG_INIT_CRITICAL
  114. bl cpu_init_crit
  115. #endif
  116. /* Set up the stack */
  117. stack_setup:
  118. ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
  119. sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
  120. sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
  121. #ifdef CONFIG_USE_IRQ
  122. sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
  123. #endif
  124. sub sp, r0, #12 /* leave 3 words for abort-stack */
  125. clear_bss:
  126. ldr r0, _bss_start /* find start of bss segment */
  127. add r0, r0, #4 /* start at first byte of bss */
  128. ldr r1, _bss_end /* stop here */
  129. mov r2, #0x00000000 /* clear */
  130. clbss_l:str r2, [r0] /* clear loop... */
  131. add r0, r0, #4
  132. cmp r0, r1
  133. bne clbss_l
  134. ldr pc,_start_armboot
  135. _start_armboot: .word start_armboot
  136. /*
  137. *************************************************************************
  138. *
  139. * CPU_init_critical registers
  140. *
  141. *************************************************************************
  142. */
  143. cpu_init_crit:
  144. # actually do nothing for now!
  145. mov pc, lr
  146. /*
  147. *************************************************************************
  148. *
  149. * Interrupt handling
  150. *
  151. *************************************************************************
  152. */
  153. @
  154. @ IRQ stack frame.
  155. @
  156. #define S_FRAME_SIZE 72
  157. #define S_OLD_R0 68
  158. #define S_PSR 64
  159. #define S_PC 60
  160. #define S_LR 56
  161. #define S_SP 52
  162. #define S_IP 48
  163. #define S_FP 44
  164. #define S_R10 40
  165. #define S_R9 36
  166. #define S_R8 32
  167. #define S_R7 28
  168. #define S_R6 24
  169. #define S_R5 20
  170. #define S_R4 16
  171. #define S_R3 12
  172. #define S_R2 8
  173. #define S_R1 4
  174. #define S_R0 0
  175. #define MODE_SVC 0x13
  176. #define I_BIT 0x80
  177. /*
  178. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  179. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  180. */
  181. .macro bad_save_user_regs
  182. sub sp, sp, #S_FRAME_SIZE
  183. stmia sp, {r0 - r12} @ Calling r0-r12
  184. add r8, sp, #S_PC
  185. ldr r2, _armboot_start
  186. sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
  187. sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
  188. ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
  189. add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
  190. add r5, sp, #S_SP
  191. mov r1, lr
  192. stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
  193. mov r0, sp
  194. .endm
  195. .macro irq_save_user_regs
  196. sub sp, sp, #S_FRAME_SIZE
  197. stmia sp, {r0 - r12} @ Calling r0-r12
  198. add r8, sp, #S_PC
  199. stmdb r8, {sp, lr}^ @ Calling SP, LR
  200. str lr, [r8, #0] @ Save calling PC
  201. mrs r6, spsr
  202. str r6, [r8, #4] @ Save CPSR
  203. str r0, [r8, #8] @ Save OLD_R0
  204. mov r0, sp
  205. .endm
  206. .macro irq_restore_user_regs
  207. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  208. mov r0, r0
  209. ldr lr, [sp, #S_PC] @ Get PC
  210. add sp, sp, #S_FRAME_SIZE
  211. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  212. .endm
  213. .macro get_bad_stack
  214. ldr r13, _armboot_start @ setup our mode stack
  215. sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
  216. sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
  217. str lr, [r13] @ save caller lr / spsr
  218. mrs lr, spsr
  219. str lr, [r13, #4]
  220. mov r13, #MODE_SVC @ prepare SVC-Mode
  221. msr spsr_c, r13
  222. mov lr, pc
  223. movs pc, lr
  224. .endm
  225. .macro get_irq_stack @ setup IRQ stack
  226. ldr sp, IRQ_STACK_START
  227. .endm
  228. .macro get_fiq_stack @ setup FIQ stack
  229. ldr sp, FIQ_STACK_START
  230. .endm
  231. /*
  232. * exception handlers
  233. */
  234. .align 5
  235. undefined_instruction:
  236. get_bad_stack
  237. bad_save_user_regs
  238. bl do_undefined_instruction
  239. .align 5
  240. software_interrupt:
  241. get_bad_stack
  242. bad_save_user_regs
  243. bl do_software_interrupt
  244. .align 5
  245. prefetch_abort:
  246. get_bad_stack
  247. bad_save_user_regs
  248. bl do_prefetch_abort
  249. .align 5
  250. data_abort:
  251. get_bad_stack
  252. bad_save_user_regs
  253. bl do_data_abort
  254. .align 5
  255. not_used:
  256. get_bad_stack
  257. bad_save_user_regs
  258. bl do_not_used
  259. #ifdef CONFIG_USE_IRQ
  260. .align 5
  261. irq:
  262. get_irq_stack
  263. irq_save_user_regs
  264. bl do_irq
  265. irq_restore_user_regs
  266. .align 5
  267. fiq:
  268. get_fiq_stack
  269. /* someone ought to write a more effiction fiq_save_user_regs */
  270. irq_save_user_regs
  271. bl do_fiq
  272. irq_restore_user_regs
  273. #else
  274. .align 5
  275. irq:
  276. get_bad_stack
  277. bad_save_user_regs
  278. bl do_irq
  279. .align 5
  280. fiq:
  281. get_bad_stack
  282. bad_save_user_regs
  283. bl do_fiq
  284. #endif
  285. .align 5
  286. .globl reset_cpu
  287. reset_cpu:
  288. mov pc, r0